Lines Matching +full:per +full:- +full:module
1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP3xxx CM module functions
6 * Copyright (C) 2008-2010, 2012 Texas Instruments, Inc.
21 #include "cm-regbits-34xx.h"
32 static void _write_clktrctrl(u8 c, s16 module, u32 mask) in _write_clktrctrl() argument
36 v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); in _write_clktrctrl()
39 omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL); in _write_clktrctrl()
42 static bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask) in omap3xxx_cm_is_clkdm_in_hwsup() argument
46 v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); in omap3xxx_cm_is_clkdm_in_hwsup()
53 static void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) in omap3xxx_cm_clkdm_enable_hwsup() argument
55 _write_clktrctrl(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, module, mask); in omap3xxx_cm_clkdm_enable_hwsup()
58 static void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask) in omap3xxx_cm_clkdm_disable_hwsup() argument
60 _write_clktrctrl(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, module, mask); in omap3xxx_cm_clkdm_disable_hwsup()
63 static void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask) in omap3xxx_cm_clkdm_force_sleep() argument
65 _write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, module, mask); in omap3xxx_cm_clkdm_force_sleep()
68 static void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask) in omap3xxx_cm_clkdm_force_wakeup() argument
70 _write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, module, mask); in omap3xxx_cm_clkdm_force_wakeup()
78 * omap3xxx_cm_wait_module_ready - wait for a module to leave idle or standby
80 * @prcm_mod: PRCM module offset
84 * Wait for the PRCM to indicate that the module identified by
86 * success or -EBUSY if the module doesn't enable in time.
96 return -EINVAL; in omap3xxx_cm_wait_module_ready()
98 cm_idlest_reg = omap3xxx_cm_idlest_offs[idlest_id - 1]; in omap3xxx_cm_wait_module_ready()
106 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; in omap3xxx_cm_wait_module_ready()
110 * omap3xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components
126 idlest_offs = idlest_reg->offset & 0xff; in omap3xxx_cm_split_idlest_reg()
135 return -EINVAL; in omap3xxx_cm_split_idlest_reg()
137 offs = idlest_reg->offset; in omap3xxx_cm_split_idlest_reg()
144 /* Clockdomain low-level operations */
149 omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), in omap3xxx_clkdm_add_sleepdep()
150 clkdm1->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_add_sleepdep()
158 omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), in omap3xxx_clkdm_del_sleepdep()
159 clkdm1->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_del_sleepdep()
167 return omap2_cm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_read_sleepdep()
169 (1 << clkdm2->dep_bit)); in omap3xxx_clkdm_read_sleepdep()
177 for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { in omap3xxx_clkdm_clear_all_sleepdeps()
178 if (!cd->clkdm) in omap3xxx_clkdm_clear_all_sleepdeps()
181 mask |= 1 << cd->clkdm->dep_bit; in omap3xxx_clkdm_clear_all_sleepdeps()
182 cd->sleepdep_usecount = 0; in omap3xxx_clkdm_clear_all_sleepdeps()
184 omap2_cm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clear_all_sleepdeps()
191 omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_sleep()
192 clkdm->clktrctrl_mask); in omap3xxx_clkdm_sleep()
198 omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_wakeup()
199 clkdm->clktrctrl_mask); in omap3xxx_clkdm_wakeup()
205 if (clkdm->usecount > 0) in omap3xxx_clkdm_allow_idle()
208 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_allow_idle()
209 clkdm->clktrctrl_mask); in omap3xxx_clkdm_allow_idle()
214 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_deny_idle()
215 clkdm->clktrctrl_mask); in omap3xxx_clkdm_deny_idle()
217 if (clkdm->usecount > 0) in omap3xxx_clkdm_deny_idle()
225 if (!clkdm->clktrctrl_mask) in omap3xxx_clkdm_clk_enable()
233 if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) && in omap3xxx_clkdm_clk_enable()
234 (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { in omap3xxx_clkdm_clk_enable()
239 hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_enable()
240 clkdm->clktrctrl_mask); in omap3xxx_clkdm_clk_enable()
244 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_enable()
245 clkdm->clktrctrl_mask); in omap3xxx_clkdm_clk_enable()
247 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_enable()
248 clkdm->clktrctrl_mask); in omap3xxx_clkdm_clk_enable()
250 if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) in omap3xxx_clkdm_clk_enable()
261 if (!clkdm->clktrctrl_mask) in omap3xxx_clkdm_clk_disable()
269 if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && in omap3xxx_clkdm_clk_disable()
270 !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { in omap3xxx_clkdm_clk_disable()
271 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_disable()
272 clkdm->clktrctrl_mask); in omap3xxx_clkdm_clk_disable()
276 hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_disable()
277 clkdm->clktrctrl_mask); in omap3xxx_clkdm_clk_disable()
281 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_disable()
282 clkdm->clktrctrl_mask); in omap3xxx_clkdm_clk_disable()
284 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, in omap3xxx_clkdm_clk_disable()
285 clkdm->clktrctrl_mask); in omap3xxx_clkdm_clk_disable()
287 if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) in omap3xxx_clkdm_clk_disable()
312 * Context save/restore code - OMAP3 only
399 * As per erratum i671, ROM code does not respect the PER DPLL in omap3_cm_save_context()
532 * As per erratum i671, ROM code does not respect the PER DPLL in omap3_cm_restore_context()
643 * As per erratum i671, ROM code does not respect the PER DPLL in omap3_cm_save_scratchpad_contents()