Lines Matching +full:wp +full:- +full:content
6 * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle
48 #include <asm/cpu-type.h>
53 #include <asm/isa-rev.h>
54 #include <asm/mips-cps.h>
55 #include <asm/mips-r2-to-r6-emul.h>
73 #include <asm/mach-loongson64/cpucfg-emul.h>
146 unsigned long sp = regs->regs[29]; in show_backtrace()
147 unsigned long ra = regs->regs[31]; in show_backtrace()
148 unsigned long pc = regs->cp0_epc; in show_backtrace()
175 unsigned long __user *sp = (unsigned long __user *)regs->regs[29]; in show_stacktrace()
179 while ((unsigned long) sp & (PAGE_SIZE - 1)) { in show_stacktrace()
213 regs.regs[29] = task->thread.reg29; in show_stack()
215 regs.cp0_epc = task->thread.reg31; in show_stack()
238 for(i = -3 ; i < 6 ; i++) { in show_code()
252 unsigned int cause = regs->cp0_cause; in __show_regs()
269 pr_cont(" %0*lx", field, regs->regs[i]); in __show_regs()
277 printk("Acx : %0*lx\n", field, regs->acx); in __show_regs()
280 printk("Hi : %0*lx\n", field, regs->hi); in __show_regs()
281 printk("Lo : %0*lx\n", field, regs->lo); in __show_regs()
287 printk("epc : %0*lx %pS\n", field, regs->cp0_epc, in __show_regs()
288 (void *) regs->cp0_epc); in __show_regs()
289 printk("ra : %0*lx %pS\n", field, regs->regs[31], in __show_regs()
290 (void *) regs->regs[31]); in __show_regs()
292 printk("Status: %08x ", (uint32_t) regs->cp0_status); in __show_regs()
295 if (regs->cp0_status & ST0_KUO) in __show_regs()
297 if (regs->cp0_status & ST0_IEO) in __show_regs()
299 if (regs->cp0_status & ST0_KUP) in __show_regs()
301 if (regs->cp0_status & ST0_IEP) in __show_regs()
303 if (regs->cp0_status & ST0_KUC) in __show_regs()
305 if (regs->cp0_status & ST0_IEC) in __show_regs()
308 if (regs->cp0_status & ST0_KX) in __show_regs()
310 if (regs->cp0_status & ST0_SX) in __show_regs()
312 if (regs->cp0_status & ST0_UX) in __show_regs()
314 switch (regs->cp0_status & ST0_KSU) { in __show_regs()
328 if (regs->cp0_status & ST0_ERL) in __show_regs()
330 if (regs->cp0_status & ST0_EXL) in __show_regs()
332 if (regs->cp0_status & ST0_IE) in __show_regs()
341 printk("BadVA : %0*lx\n", field, regs->cp0_badvaddr); in __show_regs()
364 current->comm, current->pid, current_thread_info(), current, in show_registers()
365 field, current_thread_info()->tp_value); in show_registers()
370 if (tls != current_thread_info()->tp_value) in show_registers()
375 /* Necessary for getting the correct stack content */ in show_registers()
378 show_code((unsigned int __user *) regs->cp0_epc); in show_registers()
392 if (notify_die(DIE_OOPS, str, regs, 0, current->thread.trap_nr, in die()
432 __stop___dbe_table - __start___dbe_table, addr); in search_dbe_tables()
442 int data = regs->cp0_cause & 4; in do_be()
464 regs->cp0_epc = fixup->nextinsn; in do_be()
477 field, regs->cp0_epc, field, regs->regs[31]); in do_be()
478 if (notify_die(DIE_OOPS, "bus error", regs, 0, current->thread.trap_nr, in do_be()
535 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_ll()
553 regs->regs[(opcode & RT) >> 16] = value; in simulate_ll()
575 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_sc()
584 regs->regs[reg] = 0; in simulate_sc()
591 if (put_user(regs->regs[reg], vaddr)) in simulate_sc()
594 regs->regs[reg] = 1; in simulate_sc()
602 * executed on ll/sc-less processors. That's the theory. In practice a
619 return -1; /* Must be something else ... */ in simulate_llsc()
634 regs->regs[rt] = smp_processor_id(); in simulate_rdhwr()
637 regs->regs[rt] = min(current_cpu_data.dcache.linesz, in simulate_rdhwr()
641 regs->regs[rt] = read_c0_count(); in simulate_rdhwr()
647 regs->regs[rt] = 1; in simulate_rdhwr()
650 regs->regs[rt] = 2; in simulate_rdhwr()
654 regs->regs[rt] = ti->tp_value; in simulate_rdhwr()
657 return -1; in simulate_rdhwr()
672 return -1; in simulate_rdhwr_normal()
685 return -1; in simulate_rdhwr_mm()
696 return -1; /* Must be something else ... */ in simulate_sync()
700 * Loongson-3 CSR instructions emulation
722 __u64 sel = regs->regs[rs]; in simulate_loongson3_cpucfg()
730 return -1; in simulate_loongson3_cpucfg()
732 regs->regs[rd] = loongson3_cpucfg_read_synthesized( in simulate_loongson3_cpucfg()
739 return -1; in simulate_loongson3_cpucfg()
750 force_sig_fault(SIGFPE, FPE_INTOVF, (void __user *)regs->cp0_epc); in do_ov()
799 mmap_read_lock(current->mm); in process_fpemu_return()
800 vma = find_vma(current->mm, (unsigned long)fault_addr); in process_fpemu_return()
801 if (vma && (vma->vm_start <= (unsigned long)fault_addr)) in process_fpemu_return()
805 mmap_read_unlock(current->mm); in process_fpemu_return()
834 return -1; in simulate_fp()
841 regs->cp0_epc = old_epc; in simulate_fp()
842 regs->regs[31] = old_ra; in simulate_fp()
845 sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1, in simulate_fp()
852 fcr31 = mask_fcr31_x(current->thread.fpu.fcr31); in simulate_fp()
853 current->thread.fpu.fcr31 &= ~fcr31; in simulate_fp()
874 if (notify_die(DIE_FP, "FP exception", regs, 0, current->thread.trap_nr, in do_fpe()
887 * software emulator on-board, let's use it... in do_fpe()
891 * instruction, but the alternative is to pre-decode the FP in do_fpe()
897 sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1, in do_fpe()
904 fcr31 = mask_fcr31_x(current->thread.fpu.fcr31); in do_fpe()
905 current->thread.fpu.fcr31 &= ~fcr31; in do_fpe()
911 fault_addr = (void __user *) regs->cp0_epc; in do_fpe()
930 ((current->thread.emulated_fp++ > mt_fpemul_threshold))) { in mt_ase_fp_affinity()
936 if (cpumask_intersects(¤t->cpus_mask, &mt_fpu_cpumask)) { in mt_ase_fp_affinity()
939 current->thread.user_cpus_allowed in mt_ase_fp_affinity()
940 = current->cpus_mask; in mt_ase_fp_affinity()
941 cpumask_and(&tmask, ¤t->cpus_mask, in mt_ase_fp_affinity()
955 return -1; in simulate_fp()
966 if (kgdb_ll_trap(DIE_TRAP, str, regs, code, current->thread.trap_nr, in do_trap_or_bp()
971 if (notify_die(DIE_TRAP, str, regs, code, current->thread.trap_nr, in do_trap_or_bp()
979 * But should we continue the brokenness??? --macro in do_trap_or_bp()
988 (void __user *) regs->cp0_epc); in do_trap_or_bp()
1032 current->thread.trap_nr = (regs->cp0_cause >> 2) & 0x1f; in do_bp()
1033 if (get_isa16_mode(regs->cp0_epc)) { in do_bp()
1043 /* 16-bit microMIPS BREAK */ in do_bp()
1046 /* 32-bit microMIPS BREAK */ in do_bp()
1050 bcode = (opcode >> 6) & ((1 << 20) - 1); in do_bp()
1055 bcode = (opcode >> 6) & ((1 << 20) - 1); in do_bp()
1061 * Gas is bug-compatible, but not always, grrr... in do_bp()
1062 * We handle both cases with a simple heuristics. --macro in do_bp()
1065 bcode = ((bcode & ((1 << 10) - 1)) << 10) | (bcode >> 10); in do_bp()
1074 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP) in do_bp()
1080 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP) in do_bp()
1086 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP) in do_bp()
1092 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP) in do_bp()
1125 current->thread.trap_nr = (regs->cp0_cause >> 2) & 0x1f; in do_tr()
1126 if (get_isa16_mode(regs->cp0_epc)) { in do_tr()
1133 tcode = (opcode >> 12) & ((1 << 4) - 1); in do_tr()
1139 tcode = (opcode >> 6) & ((1 << 10) - 1); in do_tr()
1157 unsigned long old_epc = regs->cp0_epc; in do_ri()
1158 unsigned long old31 = regs->regs[31]; in do_ri()
1161 int status = -1; in do_ri()
1181 ¤t->thread.cp0_baduaddr, in do_ri()
1190 current->thread.trap_nr = (regs->cp0_cause >> 2) & 0x1f; in do_ri()
1192 if (notify_die(DIE_RI, "RI Fault", regs, 0, current->thread.trap_nr, in do_ri()
1201 if (!get_isa16_mode(regs->cp0_epc)) { in do_ri()
1239 regs->cp0_epc = old_epc; /* Undo skip-over. */ in do_ri()
1240 regs->regs[31] = old31; in do_ri()
1296 write_msa_csr(current->thread.fpu.msacsr); in enable_restore_fp_context()
1320 * - Restore the vector context & clobber any registers modified by in enable_restore_fp_context()
1325 * - Not restore the vector context & lose the most significant bits in enable_restore_fp_context()
1350 write_msa_csr(current->thread.fpu.msacsr); in enable_restore_fp_context()
1387 current->thread.fpu.fcr31); in enable_restore_fp_context()
1415 cpid = (regs->cp0_cause >> CAUSEB_CE) & 3; in do_cpu()
1423 old_epc = regs->cp0_epc; in do_cpu()
1424 old31 = regs->regs[31]; in do_cpu()
1426 status = -1; in do_cpu()
1431 if (!get_isa16_mode(regs->cp0_epc)) { in do_cpu()
1443 regs->cp0_epc = old_epc; /* Undo skip-over. */ in do_cpu()
1444 regs->regs[31] = old31; in do_cpu()
1459 * exceptions. Some FPU-less processors that implement one in do_cpu()
1479 sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 0, in do_cpu()
1486 fcr31 = mask_fcr31_x(current->thread.fpu.fcr31); in do_cpu()
1487 current->thread.fpu.fcr31 &= ~fcr31; in do_cpu()
1515 current->thread.trap_nr = (regs->cp0_cause >> 2) & 0x1f; in do_msa_fpe()
1517 current->thread.trap_nr, SIGFPE) == NOTIFY_STOP) in do_msa_fpe()
1569 * Clear WP (bit 22) bit of cause register so we don't loop in do_watch()
1592 int multi_match = regs->cp0_status & ST0_TS; in do_mcheck()
1608 show_code((unsigned int __user *) regs->cp0_epc); in do_mcheck()
1616 panic("Caught Machine Check exception - %scaused by multiple " in do_mcheck()
1668 * Game over - no way to handle this if it ever occurs. Most probably in do_reserved()
1673 panic("Caught reserved exception %ld - should not happen.", in do_reserved()
1674 (regs->cp0_cause & 0x7f) >> 2); in do_reserved()
1876 printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1)); in cache_parity_error()
1929 * also-undocumented instructions accessible from userspace. in do_gsexc()
1943 panic("Unhandled Loongson exception - GSCause = %08x", diag1); in do_gsexc()
1959 printk(KERN_DEBUG "SDBBP EJTAG debug exception - not handled yet, just ignored!\n"); in ejtag_exception_handler()
1970 old_epc = regs->cp0_epc; in ejtag_exception_handler()
1971 old_ra = regs->regs[31]; in ejtag_exception_handler()
1972 regs->cp0_epc = depc; in ejtag_exception_handler()
1974 depc = regs->cp0_epc; in ejtag_exception_handler()
1975 regs->cp0_epc = old_epc; in ejtag_exception_handler()
1976 regs->regs[31] = old_ra; in ejtag_exception_handler()
1982 printk(KERN_DEBUG "\n\n----- Enable EJTAG single stepping ----\n\n"); in ejtag_exception_handler()
2006 smp_processor_id(), regs->cp0_epc); in nmi_exception_handler()
2007 regs->cp0_epc = read_c0_errorepc(); in nmi_exception_handler()
2039 unsigned long jump_mask = ~((1 << 27) - 1); in set_except_vector()
2041 unsigned long jump_mask = ~((1 << 28) - 1); in set_except_vector()
2106 const int lui_offset = &except_vec_vi_lui - vec_start + 2; in set_vi_srs_handler()
2107 const int ori_offset = &except_vec_vi_ori - vec_start + 2; in set_vi_srs_handler()
2109 const int lui_offset = &except_vec_vi_lui - vec_start; in set_vi_srs_handler()
2110 const int ori_offset = &except_vec_vi_ori - vec_start; in set_vi_srs_handler()
2112 const int handler_len = &except_vec_vi_end - vec_start; in set_vi_srs_handler()
2122 set_handler(((unsigned long)b - ebase), vec_start, in set_vi_srs_handler()
2124 (handler_len - 1)); in set_vi_srs_handler()
2176 * Performance counter IRQ or -1 if shared with timer
2182 * Fast debug channel IRQ or -1 if not present
2202 * Disable coprocessors and select 32-bit or 64-bit addressing in configure_status()
2288 cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP; in per_cpu_trap_init()
2293 cp0_fdc_irq = -1; in per_cpu_trap_init()
2298 cp0_perfcount_irq = -1; in per_cpu_trap_init()
2299 cp0_fdc_irq = -1; in per_cpu_trap_init()
2308 current->active_mm = &init_mm; in per_cpu_trap_init()
2309 BUG_ON(current->mm); in per_cpu_trap_init()
2323 memcpy((void *)(ebase + offset), ((unsigned char *)addr - 1), size); in set_handler()