Lines Matching +full:data +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0+
3 * Amlogic Meson-AXG Clock Controller Driver
11 #include <linux/clk-provider.h>
13 #include <linux/reset-controller.h>
15 #include "meson-aoclk.h"
16 #include "axg-aoclk.h"
18 #include "clk-regmap.h"
19 #include "clk-dualdiv.h"
23 * Register offsets from the data sheet must be multiplied by 4.
36 .data = &(struct clk_regmap_gate_data) { \
44 .fw_name = "mpeg-clk", \
60 .data = &(struct clk_regmap_gate_data){
75 .data = &(struct clk_regmap_gate_data){
100 .data = &(struct meson_clk_dualdiv_data){
103 .shift = 0,
108 .shift = 12,
113 .shift = 0,
118 .shift = 12,
123 .shift = 28,
139 .data = &(struct clk_regmap_mux_data) {
142 .shift = 24,
158 .data = &(struct clk_regmap_gate_data){
174 .data = &(struct clk_regmap_mux_data) {
177 .shift = 10,
185 { .fw_name = "ext_32k-0", },
193 .data = &(struct clk_regmap_mux_data) {
196 .shift = 8,
203 { .fw_name = "mpeg-clk", },
212 .data = &(struct clk_regmap_mux_data) {
215 .shift = 9,
229 .data = &(struct clk_regmap_div_data) {
231 .shift = 0,
246 .data = &(struct clk_regmap_gate_data) {
324 .compatible = "amlogic,meson-axg-aoclkc",
325 .data = &axg_aoclkc_data,
333 .name = "axg-aoclkc",