Lines Matching +full:max +full:- +full:burst +full:- +full:len
1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <linux/dma-mapping.h>
46 CCTRL6, /* Cacheable write-through, allocate on writes only */
47 CCTRL7, /* Cacheable write-back, allocate on writes only */
245 * at 1byte/burst for P<->M and M<->M respectively.
246 * For typical scenario, at 1word/burst, 10MB and 20MB xfers per req
247 * should be enough for P<->M and M<->M respectively.
303 * and burst size/length are assumed same.
351 BURST, enumerator
382 /* Index of the last submitted request or -1 if the DMA is stopped */
417 /* DMA-Engine Channel */
443 /* For D-to-M and M-to-D channels */
445 int burst_len; /* the number of burst */
447 /* DMA-mapped view of the FIFO; may differ if an IOMMU is present */
460 /* DMA-Engine Device */
508 .quirk = "arm,pl330-broken-no-flushp",
512 .quirk = "arm,pl330-periph-burst",
555 return thrd->req[0].desc != NULL && thrd->req[1].desc != NULL; in _queue_full()
560 return thrd->dmac->manager == thrd; in is_manager()
563 /* If manager of the thread is in Non-Secure mode */
566 return (thrd->dmac->pcfg.mode & DMAC_MODE_NS) ? true : false; in _manager_ns()
611 else if (cond == BURST) in _emit_LD()
615 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A')); in _emit_LD()
628 if (cond == BURST) in _emit_LDP()
652 cnt--; /* DMAC increments by 1 internally */ in _emit_LP()
670 enum pl330_cond cond = arg->cond; in _emit_LPEND()
671 bool forever = arg->forever; in _emit_LPEND()
672 unsigned loop = arg->loop; in _emit_LPEND()
673 u8 bjump = arg->bjump; in _emit_LPEND()
688 else if (cond == BURST) in _emit_LPEND()
695 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'), in _emit_LPEND()
768 else if (cond == BURST) in _emit_ST()
772 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A')); in _emit_ST()
785 if (cond == BURST) in _emit_STP()
808 else if (cond == BURST) in _emit_WFP()
818 cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'P'), peri >> 3); in _emit_WFP()
844 u8 chan = arg->chan; in _emit_GO()
845 u32 addr = arg->addr; in _emit_GO()
846 unsigned ns = arg->ns; in _emit_GO()
864 /* Returns Time-Out */
867 void __iomem *regs = thrd->dmac->base; in _until_dmac_idle()
876 } while (--loops); in _until_dmac_idle()
887 void __iomem *regs = thrd->dmac->base; in _execute_DBGINSN()
890 /* If timed out due to halted state-machine */ in _execute_DBGINSN()
892 dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n"); in _execute_DBGINSN()
899 val |= (thrd->id << 8); /* Channel Number */ in _execute_DBGINSN()
912 void __iomem *regs = thrd->dmac->base; in _state()
918 val = readl(regs + CS(thrd->id)) & 0xf; in _state()
970 void __iomem *regs = thrd->dmac->base; in _stop()
988 if (inten & (1 << thrd->ev)) in _stop()
989 writel(1 << thrd->ev, regs + INTCLR); in _stop()
991 writel(inten & ~(1 << thrd->ev), regs + INTEN); in _stop()
997 void __iomem *regs = thrd->dmac->base; in _trigger()
1009 idx = 1 - thrd->lstenq; in _trigger()
1010 if (thrd->req[idx].desc != NULL) { in _trigger()
1011 req = &thrd->req[idx]; in _trigger()
1013 idx = thrd->lstenq; in _trigger()
1014 if (thrd->req[idx].desc != NULL) in _trigger()
1015 req = &thrd->req[idx]; in _trigger()
1025 if (idx == thrd->req_running) in _trigger()
1028 desc = req->desc; in _trigger()
1030 ns = desc->rqcfg.nonsecure ? 1 : 0; in _trigger()
1032 /* See 'Abort Sources' point-4 at Page 2-25 */ in _trigger()
1034 dev_info(thrd->dmac->ddma.dev, "%s:%d Recipe for ABORT!\n", in _trigger()
1037 go.chan = thrd->id; in _trigger()
1038 go.addr = req->mc_bus; in _trigger()
1043 writel(readl(regs + INTEN) | (1 << thrd->ev), regs + INTEN); in _trigger()
1048 thrd->req_running = idx; in _trigger()
1093 struct pl330_config *pcfg = pxs->desc->rqcfg.pcfg; in _ldst_memtomem()
1095 /* check lock-up free version */ in _ldst_memtomem()
1096 if (get_revision(pcfg->periph_id) >= PERIPH_REV_R1P0) { in _ldst_memtomem()
1097 while (cyc--) { in _ldst_memtomem()
1102 while (cyc--) { in _ldst_memtomem()
1129 off += _emit_LDP(dry_run, &buf[off], BURST, in _emit_load()
1162 off += _emit_STP(dry_run, &buf[off], BURST, in _emit_store()
1190 if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) in _ldst_peripheral()
1191 off += _emit_FLUSHP(dry_run, &buf[off], pxs->desc->peri); in _ldst_peripheral()
1192 while (cyc--) { in _ldst_peripheral()
1193 off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); in _ldst_peripheral()
1194 off += _emit_load(dry_run, &buf[off], cond, pxs->desc->rqtype, in _ldst_peripheral()
1195 pxs->desc->peri); in _ldst_peripheral()
1196 off += _emit_store(dry_run, &buf[off], cond, pxs->desc->rqtype, in _ldst_peripheral()
1197 pxs->desc->peri); in _ldst_peripheral()
1207 enum pl330_cond cond = BRST_LEN(pxs->ccr) > 1 ? BURST : SINGLE; in _bursts()
1209 if (pl330->quirks & PL330_QUIRK_PERIPH_BURST) in _bursts()
1210 cond = BURST; in _bursts()
1212 switch (pxs->desc->rqtype) { in _bursts()
1233 * only the unaligned burst transfers have the dregs.
1234 * so, still transfer dregs with a reduced size burst
1235 * for mem-to-mem, mem-to-dev or dev-to-mem.
1247 * dregs_len = (total bytes - BURST_TO_BYTE(bursts, ccr)) / in _dregs()
1249 * the dregs len must be smaller than burst len, in _dregs()
1251 * to use a reduced size burst len for the dregs. in _dregs()
1253 dregs_ccr = pxs->ccr; in _dregs()
1256 dregs_ccr |= (((transfer_length - 1) & 0xf) << in _dregs()
1258 dregs_ccr |= (((transfer_length - 1) & 0xf) << in _dregs()
1261 switch (pxs->desc->rqtype) { in _dregs()
1266 BURST); in _dregs()
1294 /* Max iterations possible in DMALP is 256 */ in _loop()
1324 * Max bursts that we can unroll due to limit on the in _loop()
1326 * which is 8-bits and hence 255 in _loop()
1328 cycmax = (255 - (szlp + szlpend)) / szbrst; in _loop()
1347 lpend.bjump = off - ljmp1; in _loop()
1354 lpend.bjump = off - ljmp0; in _loop()
1369 struct pl330_xfer *x = &pxs->desc->px; in _setup_loops()
1370 u32 ccr = pxs->ccr; in _setup_loops()
1371 unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr); in _setup_loops()
1372 int num_dregs = (x->bytes - BURST_TO_BYTE(bursts, ccr)) / in _setup_loops()
1379 bursts -= c; in _setup_loops()
1390 struct pl330_xfer *x = &pxs->desc->px; in _setup_xfer()
1393 /* DMAMOV SAR, x->src_addr */ in _setup_xfer()
1394 off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); in _setup_xfer()
1395 /* DMAMOV DAR, x->dst_addr */ in _setup_xfer()
1396 off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); in _setup_xfer()
1412 struct _pl330_req *req = &thrd->req[index]; in _setup_req()
1413 u8 *buf = req->mc_cpu; in _setup_req()
1416 PL330_DBGMC_START(req->mc_bus); in _setup_req()
1419 off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); in _setup_req()
1424 off += _emit_SEV(dry_run, &buf[off], thrd->ev); in _setup_req()
1435 if (rqc->src_inc) in _prepare_ccr()
1438 if (rqc->dst_inc) in _prepare_ccr()
1442 if (rqc->privileged) in _prepare_ccr()
1444 if (rqc->nonsecure) in _prepare_ccr()
1446 if (rqc->insnaccess) in _prepare_ccr()
1449 ccr |= (((rqc->brst_len - 1) & 0xf) << CC_SRCBRSTLEN_SHFT); in _prepare_ccr()
1450 ccr |= (((rqc->brst_len - 1) & 0xf) << CC_DSTBRSTLEN_SHFT); in _prepare_ccr()
1452 ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT); in _prepare_ccr()
1453 ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT); in _prepare_ccr()
1455 ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT); in _prepare_ccr()
1456 ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT); in _prepare_ccr()
1458 ccr |= (rqc->swap << CC_SWAP_SHFT); in _prepare_ccr()
1471 struct pl330_dmac *pl330 = thrd->dmac; in pl330_submit_req()
1478 switch (desc->rqtype) { in pl330_submit_req()
1489 return -ENOTSUPP; in pl330_submit_req()
1492 if (pl330->state == DYING in pl330_submit_req()
1493 || pl330->dmac_tbd.reset_chan & (1 << thrd->id)) { in pl330_submit_req()
1494 dev_info(thrd->dmac->ddma.dev, "%s:%d\n", in pl330_submit_req()
1496 return -EAGAIN; in pl330_submit_req()
1499 /* If request for non-existing peripheral */ in pl330_submit_req()
1500 if (desc->rqtype != DMA_MEM_TO_MEM && in pl330_submit_req()
1501 desc->peri >= pl330->pcfg.num_peri) { in pl330_submit_req()
1502 dev_info(thrd->dmac->ddma.dev, in pl330_submit_req()
1504 __func__, __LINE__, desc->peri); in pl330_submit_req()
1505 return -EINVAL; in pl330_submit_req()
1508 spin_lock_irqsave(&pl330->lock, flags); in pl330_submit_req()
1511 ret = -EAGAIN; in pl330_submit_req()
1517 desc->rqcfg.nonsecure = 0; in pl330_submit_req()
1519 desc->rqcfg.nonsecure = 1; in pl330_submit_req()
1521 ccr = _prepare_ccr(&desc->rqcfg); in pl330_submit_req()
1523 idx = thrd->req[0].desc == NULL ? 0 : 1; in pl330_submit_req()
1533 if (ret > pl330->mcbufsz / 2) { in pl330_submit_req()
1534 dev_info(pl330->ddma.dev, "%s:%d Try increasing mcbufsz (%i/%i)\n", in pl330_submit_req()
1535 __func__, __LINE__, ret, pl330->mcbufsz / 2); in pl330_submit_req()
1536 ret = -ENOMEM; in pl330_submit_req()
1541 thrd->lstenq = idx; in pl330_submit_req()
1542 thrd->req[idx].desc = desc; in pl330_submit_req()
1548 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_submit_req()
1561 pch = desc->pchan; in dma_pl330_rqcb()
1567 spin_lock_irqsave(&pch->lock, flags); in dma_pl330_rqcb()
1569 desc->status = DONE; in dma_pl330_rqcb()
1571 spin_unlock_irqrestore(&pch->lock, flags); in dma_pl330_rqcb()
1573 tasklet_schedule(&pch->task); in dma_pl330_rqcb()
1582 spin_lock_irqsave(&pl330->lock, flags); in pl330_dotask()
1585 if (pl330->dmac_tbd.reset_dmac) { in pl330_dotask()
1586 pl330->state = DYING; in pl330_dotask()
1588 pl330->dmac_tbd.reset_mngr = true; in pl330_dotask()
1590 pl330->dmac_tbd.reset_dmac = false; in pl330_dotask()
1593 if (pl330->dmac_tbd.reset_mngr) { in pl330_dotask()
1594 _stop(pl330->manager); in pl330_dotask()
1596 pl330->dmac_tbd.reset_chan = (1 << pl330->pcfg.num_chan) - 1; in pl330_dotask()
1598 pl330->dmac_tbd.reset_mngr = false; in pl330_dotask()
1601 for (i = 0; i < pl330->pcfg.num_chan; i++) { in pl330_dotask()
1603 if (pl330->dmac_tbd.reset_chan & (1 << i)) { in pl330_dotask()
1604 struct pl330_thread *thrd = &pl330->channels[i]; in pl330_dotask()
1605 void __iomem *regs = pl330->base; in pl330_dotask()
1610 if (readl(regs + FSC) & (1 << thrd->id)) in pl330_dotask()
1615 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_dotask()
1616 dma_pl330_rqcb(thrd->req[1 - thrd->lstenq].desc, err); in pl330_dotask()
1617 dma_pl330_rqcb(thrd->req[thrd->lstenq].desc, err); in pl330_dotask()
1618 spin_lock_irqsave(&pl330->lock, flags); in pl330_dotask()
1620 thrd->req[0].desc = NULL; in pl330_dotask()
1621 thrd->req[1].desc = NULL; in pl330_dotask()
1622 thrd->req_running = -1; in pl330_dotask()
1625 pl330->dmac_tbd.reset_chan &= ~(1 << i); in pl330_dotask()
1629 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_dotask()
1643 regs = pl330->base; in pl330_update()
1645 spin_lock_irqsave(&pl330->lock, flags); in pl330_update()
1649 pl330->dmac_tbd.reset_mngr = true; in pl330_update()
1651 pl330->dmac_tbd.reset_mngr = false; in pl330_update()
1653 val = readl(regs + FSC) & ((1 << pl330->pcfg.num_chan) - 1); in pl330_update()
1654 pl330->dmac_tbd.reset_chan |= val; in pl330_update()
1657 while (i < pl330->pcfg.num_chan) { in pl330_update()
1659 dev_info(pl330->ddma.dev, in pl330_update()
1660 "Reset Channel-%d\t CS-%x FTC-%x\n", in pl330_update()
1663 _stop(&pl330->channels[i]); in pl330_update()
1671 if (pl330->pcfg.num_events < 32 in pl330_update()
1672 && val & ~((1 << pl330->pcfg.num_events) - 1)) { in pl330_update()
1673 pl330->dmac_tbd.reset_dmac = true; in pl330_update()
1674 dev_err(pl330->ddma.dev, "%s:%d Unexpected!\n", __func__, in pl330_update()
1680 for (ev = 0; ev < pl330->pcfg.num_events; ev++) { in pl330_update()
1692 id = pl330->events[ev]; in pl330_update()
1694 thrd = &pl330->channels[id]; in pl330_update()
1696 active = thrd->req_running; in pl330_update()
1697 if (active == -1) /* Aborted */ in pl330_update()
1701 descdone = thrd->req[active].desc; in pl330_update()
1702 thrd->req[active].desc = NULL; in pl330_update()
1704 thrd->req_running = -1; in pl330_update()
1710 list_add_tail(&descdone->rqd, &pl330->req_done); in pl330_update()
1715 while (!list_empty(&pl330->req_done)) { in pl330_update()
1716 descdone = list_first_entry(&pl330->req_done, in pl330_update()
1718 list_del(&descdone->rqd); in pl330_update()
1719 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_update()
1721 spin_lock_irqsave(&pl330->lock, flags); in pl330_update()
1725 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_update()
1727 if (pl330->dmac_tbd.reset_dmac in pl330_update()
1728 || pl330->dmac_tbd.reset_mngr in pl330_update()
1729 || pl330->dmac_tbd.reset_chan) { in pl330_update()
1731 tasklet_schedule(&pl330->tasks); in pl330_update()
1740 struct pl330_dmac *pl330 = thrd->dmac; in _alloc_event()
1743 for (ev = 0; ev < pl330->pcfg.num_events; ev++) in _alloc_event()
1744 if (pl330->events[ev] == -1) { in _alloc_event()
1745 pl330->events[ev] = thrd->id; in _alloc_event()
1749 return -1; in _alloc_event()
1754 return pl330->pcfg.irq_ns & (1 << i); in _chan_ns()
1765 if (pl330->state == DYING) in pl330_request_channel()
1768 chans = pl330->pcfg.num_chan; in pl330_request_channel()
1771 thrd = &pl330->channels[i]; in pl330_request_channel()
1772 if ((thrd->free) && (!_manager_ns(thrd) || in pl330_request_channel()
1774 thrd->ev = _alloc_event(thrd); in pl330_request_channel()
1775 if (thrd->ev >= 0) { in pl330_request_channel()
1776 thrd->free = false; in pl330_request_channel()
1777 thrd->lstenq = 1; in pl330_request_channel()
1778 thrd->req[0].desc = NULL; in pl330_request_channel()
1779 thrd->req[1].desc = NULL; in pl330_request_channel()
1780 thrd->req_running = -1; in pl330_request_channel()
1793 struct pl330_dmac *pl330 = thrd->dmac; in _free_event()
1796 if (ev >= 0 && ev < pl330->pcfg.num_events in _free_event()
1797 && pl330->events[ev] == thrd->id) in _free_event()
1798 pl330->events[ev] = -1; in _free_event()
1803 if (!thrd || thrd->free) in pl330_release_channel()
1808 dma_pl330_rqcb(thrd->req[1 - thrd->lstenq].desc, PL330_ERR_ABORT); in pl330_release_channel()
1809 dma_pl330_rqcb(thrd->req[thrd->lstenq].desc, PL330_ERR_ABORT); in pl330_release_channel()
1811 _free_event(thrd, thrd->ev); in pl330_release_channel()
1812 thrd->free = true; in pl330_release_channel()
1820 void __iomem *regs = pl330->base; in read_dmac_config()
1825 pl330->pcfg.data_bus_width = 8 * (1 << val); in read_dmac_config()
1829 pl330->pcfg.data_buf_dep = val + 1; in read_dmac_config()
1834 pl330->pcfg.num_chan = val; in read_dmac_config()
1840 pl330->pcfg.num_peri = val; in read_dmac_config()
1841 pl330->pcfg.peri_ns = readl(regs + CR4); in read_dmac_config()
1843 pl330->pcfg.num_peri = 0; in read_dmac_config()
1848 pl330->pcfg.mode |= DMAC_MODE_NS; in read_dmac_config()
1850 pl330->pcfg.mode &= ~DMAC_MODE_NS; in read_dmac_config()
1855 pl330->pcfg.num_events = val; in read_dmac_config()
1857 pl330->pcfg.irq_ns = readl(regs + CR3); in read_dmac_config()
1862 struct pl330_dmac *pl330 = thrd->dmac; in _reset_thread()
1864 thrd->req[0].mc_cpu = pl330->mcode_cpu in _reset_thread()
1865 + (thrd->id * pl330->mcbufsz); in _reset_thread()
1866 thrd->req[0].mc_bus = pl330->mcode_bus in _reset_thread()
1867 + (thrd->id * pl330->mcbufsz); in _reset_thread()
1868 thrd->req[0].desc = NULL; in _reset_thread()
1870 thrd->req[1].mc_cpu = thrd->req[0].mc_cpu in _reset_thread()
1871 + pl330->mcbufsz / 2; in _reset_thread()
1872 thrd->req[1].mc_bus = thrd->req[0].mc_bus in _reset_thread()
1873 + pl330->mcbufsz / 2; in _reset_thread()
1874 thrd->req[1].desc = NULL; in _reset_thread()
1876 thrd->req_running = -1; in _reset_thread()
1881 int chans = pl330->pcfg.num_chan; in dmac_alloc_threads()
1886 pl330->channels = kcalloc(1 + chans, sizeof(*thrd), in dmac_alloc_threads()
1888 if (!pl330->channels) in dmac_alloc_threads()
1889 return -ENOMEM; in dmac_alloc_threads()
1893 thrd = &pl330->channels[i]; in dmac_alloc_threads()
1894 thrd->id = i; in dmac_alloc_threads()
1895 thrd->dmac = pl330; in dmac_alloc_threads()
1897 thrd->free = true; in dmac_alloc_threads()
1901 thrd = &pl330->channels[chans]; in dmac_alloc_threads()
1902 thrd->id = chans; in dmac_alloc_threads()
1903 thrd->dmac = pl330; in dmac_alloc_threads()
1904 thrd->free = false; in dmac_alloc_threads()
1905 pl330->manager = thrd; in dmac_alloc_threads()
1912 int chans = pl330->pcfg.num_chan; in dmac_alloc_resources()
1919 pl330->mcode_cpu = dma_alloc_attrs(pl330->ddma.dev, in dmac_alloc_resources()
1920 chans * pl330->mcbufsz, in dmac_alloc_resources()
1921 &pl330->mcode_bus, GFP_KERNEL, in dmac_alloc_resources()
1923 if (!pl330->mcode_cpu) { in dmac_alloc_resources()
1924 dev_err(pl330->ddma.dev, "%s:%d Can't allocate memory!\n", in dmac_alloc_resources()
1926 return -ENOMEM; in dmac_alloc_resources()
1931 dev_err(pl330->ddma.dev, "%s:%d Can't to create channels for DMAC!\n", in dmac_alloc_resources()
1933 dma_free_attrs(pl330->ddma.dev, in dmac_alloc_resources()
1934 chans * pl330->mcbufsz, in dmac_alloc_resources()
1935 pl330->mcode_cpu, pl330->mcode_bus, in dmac_alloc_resources()
1948 if ((pl330->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) { in pl330_add()
1949 dev_err(pl330->ddma.dev, "PERIPH_ID 0x%x !\n", in pl330_add()
1950 pl330->pcfg.periph_id); in pl330_add()
1951 return -EINVAL; in pl330_add()
1957 if (pl330->pcfg.num_events == 0) { in pl330_add()
1958 dev_err(pl330->ddma.dev, "%s:%d Can't work without events!\n", in pl330_add()
1960 return -EINVAL; in pl330_add()
1963 spin_lock_init(&pl330->lock); in pl330_add()
1965 INIT_LIST_HEAD(&pl330->req_done); in pl330_add()
1968 if (!pl330->mcbufsz) in pl330_add()
1969 pl330->mcbufsz = MCODE_BUFF_PER_REQ * 2; in pl330_add()
1972 for (i = 0; i < pl330->pcfg.num_events; i++) in pl330_add()
1973 pl330->events[i] = -1; in pl330_add()
1978 dev_err(pl330->ddma.dev, "Unable to create channels for DMAC\n"); in pl330_add()
1982 tasklet_setup(&pl330->tasks, pl330_dotask); in pl330_add()
1984 pl330->state = INIT; in pl330_add()
1995 for (i = 0; i < pl330->pcfg.num_chan; i++) { in dmac_free_threads()
1996 thrd = &pl330->channels[i]; in dmac_free_threads()
2001 kfree(pl330->channels); in dmac_free_threads()
2008 pl330->state = UNINIT; in pl330_del()
2010 tasklet_kill(&pl330->tasks); in pl330_del()
2015 dma_free_attrs(pl330->ddma.dev, in pl330_del()
2016 pl330->pcfg.num_chan * pl330->mcbufsz, pl330->mcode_cpu, in pl330_del()
2017 pl330->mcode_bus, DMA_ATTR_PRIVILEGED); in pl330_del()
2043 list_for_each_entry(desc, &pch->work_list, node) { in fill_queue()
2046 if (desc->status == BUSY) in fill_queue()
2049 ret = pl330_submit_req(pch->thread, desc); in fill_queue()
2051 desc->status = BUSY; in fill_queue()
2052 } else if (ret == -EAGAIN) { in fill_queue()
2057 desc->status = DONE; in fill_queue()
2058 dev_err(pch->dmac->ddma.dev, "%s:%d Bad Desc(%d)\n", in fill_queue()
2059 __func__, __LINE__, desc->txd.cookie); in fill_queue()
2060 tasklet_schedule(&pch->task); in fill_queue()
2072 spin_lock_irqsave(&pch->lock, flags); in pl330_tasklet()
2075 list_for_each_entry_safe(desc, _dt, &pch->work_list, node) in pl330_tasklet()
2076 if (desc->status == DONE) { in pl330_tasklet()
2077 if (!pch->cyclic) in pl330_tasklet()
2078 dma_cookie_complete(&desc->txd); in pl330_tasklet()
2079 list_move_tail(&desc->node, &pch->completed_list); in pl330_tasklet()
2085 if (list_empty(&pch->work_list)) { in pl330_tasklet()
2086 spin_lock(&pch->thread->dmac->lock); in pl330_tasklet()
2087 _stop(pch->thread); in pl330_tasklet()
2088 spin_unlock(&pch->thread->dmac->lock); in pl330_tasklet()
2090 pch->active = false; in pl330_tasklet()
2093 spin_lock(&pch->thread->dmac->lock); in pl330_tasklet()
2094 _start(pch->thread); in pl330_tasklet()
2095 spin_unlock(&pch->thread->dmac->lock); in pl330_tasklet()
2098 while (!list_empty(&pch->completed_list)) { in pl330_tasklet()
2101 desc = list_first_entry(&pch->completed_list, in pl330_tasklet()
2104 dmaengine_desc_get_callback(&desc->txd, &cb); in pl330_tasklet()
2106 if (pch->cyclic) { in pl330_tasklet()
2107 desc->status = PREP; in pl330_tasklet()
2108 list_move_tail(&desc->node, &pch->work_list); in pl330_tasklet()
2110 pch->active = true; in pl330_tasklet()
2111 spin_lock(&pch->thread->dmac->lock); in pl330_tasklet()
2112 _start(pch->thread); in pl330_tasklet()
2113 spin_unlock(&pch->thread->dmac->lock); in pl330_tasklet()
2117 desc->status = FREE; in pl330_tasklet()
2118 list_move_tail(&desc->node, &pch->dmac->desc_pool); in pl330_tasklet()
2121 dma_descriptor_unmap(&desc->txd); in pl330_tasklet()
2124 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tasklet()
2126 spin_lock_irqsave(&pch->lock, flags); in pl330_tasklet()
2129 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tasklet()
2133 pm_runtime_mark_last_busy(pch->dmac->ddma.dev); in pl330_tasklet()
2134 pm_runtime_put_autosuspend(pch->dmac->ddma.dev); in pl330_tasklet()
2141 int count = dma_spec->args_count; in of_dma_pl330_xlate()
2142 struct pl330_dmac *pl330 = ofdma->of_dma_data; in of_dma_pl330_xlate()
2151 chan_id = dma_spec->args[0]; in of_dma_pl330_xlate()
2152 if (chan_id >= pl330->num_peripherals) in of_dma_pl330_xlate()
2155 return dma_get_slave_channel(&pl330->peripherals[chan_id].chan); in of_dma_pl330_xlate()
2161 struct pl330_dmac *pl330 = pch->dmac; in pl330_alloc_chan_resources()
2164 spin_lock_irqsave(&pl330->lock, flags); in pl330_alloc_chan_resources()
2167 pch->cyclic = false; in pl330_alloc_chan_resources()
2169 pch->thread = pl330_request_channel(pl330); in pl330_alloc_chan_resources()
2170 if (!pch->thread) { in pl330_alloc_chan_resources()
2171 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_alloc_chan_resources()
2172 return -ENOMEM; in pl330_alloc_chan_resources()
2175 tasklet_setup(&pch->task, pl330_tasklet); in pl330_alloc_chan_resources()
2177 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_alloc_chan_resources()
2183 * We need the data direction between the DMAC (the dma-mapping "device") and
2203 if (pch->dir != DMA_NONE) in pl330_unprep_slave_fifo()
2204 dma_unmap_resource(pch->chan.device->dev, pch->fifo_dma, in pl330_unprep_slave_fifo()
2205 1 << pch->burst_sz, pch->dir, 0); in pl330_unprep_slave_fifo()
2206 pch->dir = DMA_NONE; in pl330_unprep_slave_fifo()
2213 struct device *dev = pch->chan.device->dev; in pl330_prep_slave_fifo()
2217 if (pch->dir == dma_dir) in pl330_prep_slave_fifo()
2221 pch->fifo_dma = dma_map_resource(dev, pch->fifo_addr, in pl330_prep_slave_fifo()
2222 1 << pch->burst_sz, dma_dir, 0); in pl330_prep_slave_fifo()
2223 if (dma_mapping_error(dev, pch->fifo_dma)) in pl330_prep_slave_fifo()
2226 pch->dir = dma_dir; in pl330_prep_slave_fifo()
2248 if (slave_config->dst_addr) in pl330_config_write()
2249 pch->fifo_addr = slave_config->dst_addr; in pl330_config_write()
2250 if (slave_config->dst_addr_width) in pl330_config_write()
2251 pch->burst_sz = __ffs(slave_config->dst_addr_width); in pl330_config_write()
2252 pch->burst_len = fixup_burst_len(slave_config->dst_maxburst, in pl330_config_write()
2253 pch->dmac->quirks); in pl330_config_write()
2255 if (slave_config->src_addr) in pl330_config_write()
2256 pch->fifo_addr = slave_config->src_addr; in pl330_config_write()
2257 if (slave_config->src_addr_width) in pl330_config_write()
2258 pch->burst_sz = __ffs(slave_config->src_addr_width); in pl330_config_write()
2259 pch->burst_len = fixup_burst_len(slave_config->src_maxburst, in pl330_config_write()
2260 pch->dmac->quirks); in pl330_config_write()
2271 memcpy(&pch->slave_config, slave_config, sizeof(*slave_config)); in pl330_config()
2281 struct pl330_dmac *pl330 = pch->dmac; in pl330_terminate_all()
2284 pm_runtime_get_sync(pl330->ddma.dev); in pl330_terminate_all()
2285 spin_lock_irqsave(&pch->lock, flags); in pl330_terminate_all()
2287 spin_lock(&pl330->lock); in pl330_terminate_all()
2288 _stop(pch->thread); in pl330_terminate_all()
2289 pch->thread->req[0].desc = NULL; in pl330_terminate_all()
2290 pch->thread->req[1].desc = NULL; in pl330_terminate_all()
2291 pch->thread->req_running = -1; in pl330_terminate_all()
2292 spin_unlock(&pl330->lock); in pl330_terminate_all()
2294 power_down = pch->active; in pl330_terminate_all()
2295 pch->active = false; in pl330_terminate_all()
2298 list_for_each_entry(desc, &pch->submitted_list, node) { in pl330_terminate_all()
2299 desc->status = FREE; in pl330_terminate_all()
2300 dma_cookie_complete(&desc->txd); in pl330_terminate_all()
2303 list_for_each_entry(desc, &pch->work_list , node) { in pl330_terminate_all()
2304 desc->status = FREE; in pl330_terminate_all()
2305 dma_cookie_complete(&desc->txd); in pl330_terminate_all()
2308 list_splice_tail_init(&pch->submitted_list, &pl330->desc_pool); in pl330_terminate_all()
2309 list_splice_tail_init(&pch->work_list, &pl330->desc_pool); in pl330_terminate_all()
2310 list_splice_tail_init(&pch->completed_list, &pl330->desc_pool); in pl330_terminate_all()
2311 spin_unlock_irqrestore(&pch->lock, flags); in pl330_terminate_all()
2312 pm_runtime_mark_last_busy(pl330->ddma.dev); in pl330_terminate_all()
2314 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_terminate_all()
2315 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_terminate_all()
2330 struct pl330_dmac *pl330 = pch->dmac; in pl330_pause()
2333 pm_runtime_get_sync(pl330->ddma.dev); in pl330_pause()
2334 spin_lock_irqsave(&pch->lock, flags); in pl330_pause()
2336 spin_lock(&pl330->lock); in pl330_pause()
2337 _stop(pch->thread); in pl330_pause()
2338 spin_unlock(&pl330->lock); in pl330_pause()
2340 spin_unlock_irqrestore(&pch->lock, flags); in pl330_pause()
2341 pm_runtime_mark_last_busy(pl330->ddma.dev); in pl330_pause()
2342 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_pause()
2350 struct pl330_dmac *pl330 = pch->dmac; in pl330_free_chan_resources()
2353 tasklet_kill(&pch->task); in pl330_free_chan_resources()
2355 pm_runtime_get_sync(pch->dmac->ddma.dev); in pl330_free_chan_resources()
2356 spin_lock_irqsave(&pl330->lock, flags); in pl330_free_chan_resources()
2358 pl330_release_channel(pch->thread); in pl330_free_chan_resources()
2359 pch->thread = NULL; in pl330_free_chan_resources()
2361 if (pch->cyclic) in pl330_free_chan_resources()
2362 list_splice_tail_init(&pch->work_list, &pch->dmac->desc_pool); in pl330_free_chan_resources()
2364 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_free_chan_resources()
2365 pm_runtime_mark_last_busy(pch->dmac->ddma.dev); in pl330_free_chan_resources()
2366 pm_runtime_put_autosuspend(pch->dmac->ddma.dev); in pl330_free_chan_resources()
2373 struct pl330_thread *thrd = pch->thread; in pl330_get_current_xferred_count()
2374 struct pl330_dmac *pl330 = pch->dmac; in pl330_get_current_xferred_count()
2375 void __iomem *regs = thrd->dmac->base; in pl330_get_current_xferred_count()
2378 pm_runtime_get_sync(pl330->ddma.dev); in pl330_get_current_xferred_count()
2380 if (desc->rqcfg.src_inc) { in pl330_get_current_xferred_count()
2381 val = readl(regs + SA(thrd->id)); in pl330_get_current_xferred_count()
2382 addr = desc->px.src_addr; in pl330_get_current_xferred_count()
2384 val = readl(regs + DA(thrd->id)); in pl330_get_current_xferred_count()
2385 addr = desc->px.dst_addr; in pl330_get_current_xferred_count()
2387 pm_runtime_mark_last_busy(pch->dmac->ddma.dev); in pl330_get_current_xferred_count()
2388 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_get_current_xferred_count()
2394 return val - addr; in pl330_get_current_xferred_count()
2415 spin_lock_irqsave(&pch->lock, flags); in pl330_tx_status()
2416 spin_lock(&pch->thread->dmac->lock); in pl330_tx_status()
2418 if (pch->thread->req_running != -1) in pl330_tx_status()
2419 running = pch->thread->req[pch->thread->req_running].desc; in pl330_tx_status()
2421 last_enq = pch->thread->req[pch->thread->lstenq].desc; in pl330_tx_status()
2424 list_for_each_entry(desc, &pch->work_list, node) { in pl330_tx_status()
2425 if (desc->status == DONE) in pl330_tx_status()
2426 transferred = desc->bytes_requested; in pl330_tx_status()
2430 else if (desc->status == BUSY) in pl330_tx_status()
2438 transferred = desc->bytes_requested; in pl330_tx_status()
2441 residual += desc->bytes_requested - transferred; in pl330_tx_status()
2442 if (desc->txd.cookie == cookie) { in pl330_tx_status()
2443 switch (desc->status) { in pl330_tx_status()
2456 if (desc->last) in pl330_tx_status()
2459 spin_unlock(&pch->thread->dmac->lock); in pl330_tx_status()
2460 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tx_status()
2473 spin_lock_irqsave(&pch->lock, flags); in pl330_issue_pending()
2474 if (list_empty(&pch->work_list)) { in pl330_issue_pending()
2480 WARN_ON(list_empty(&pch->submitted_list)); in pl330_issue_pending()
2481 pch->active = true; in pl330_issue_pending()
2482 pm_runtime_get_sync(pch->dmac->ddma.dev); in pl330_issue_pending()
2484 list_splice_tail_init(&pch->submitted_list, &pch->work_list); in pl330_issue_pending()
2485 spin_unlock_irqrestore(&pch->lock, flags); in pl330_issue_pending()
2487 pl330_tasklet(&pch->task); in pl330_issue_pending()
2498 struct dma_pl330_chan *pch = to_pchan(tx->chan); in pl330_tx_submit()
2502 spin_lock_irqsave(&pch->lock, flags); in pl330_tx_submit()
2505 while (!list_empty(&last->node)) { in pl330_tx_submit()
2506 desc = list_entry(last->node.next, struct dma_pl330_desc, node); in pl330_tx_submit()
2507 if (pch->cyclic) { in pl330_tx_submit()
2508 desc->txd.callback = last->txd.callback; in pl330_tx_submit()
2509 desc->txd.callback_param = last->txd.callback_param; in pl330_tx_submit()
2511 desc->last = false; in pl330_tx_submit()
2513 dma_cookie_assign(&desc->txd); in pl330_tx_submit()
2515 list_move_tail(&desc->node, &pch->submitted_list); in pl330_tx_submit()
2518 last->last = true; in pl330_tx_submit()
2519 cookie = dma_cookie_assign(&last->txd); in pl330_tx_submit()
2520 list_add_tail(&last->node, &pch->submitted_list); in pl330_tx_submit()
2521 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tx_submit()
2528 desc->rqcfg.swap = SWAP_NO; in _init_desc()
2529 desc->rqcfg.scctl = CCTRL0; in _init_desc()
2530 desc->rqcfg.dcctl = CCTRL0; in _init_desc()
2531 desc->txd.tx_submit = pl330_tx_submit; in _init_desc()
2533 INIT_LIST_HEAD(&desc->node); in _init_desc()
2569 desc = list_entry(pool->next, in pluck_desc()
2572 list_del_init(&desc->node); in pluck_desc()
2574 desc->status = PREP; in pluck_desc()
2575 desc->txd.callback = NULL; in pluck_desc()
2585 struct pl330_dmac *pl330 = pch->dmac; in pl330_get_desc()
2586 u8 *peri_id = pch->chan.private; in pl330_get_desc()
2590 desc = pluck_desc(&pl330->desc_pool, &pl330->pool_lock); in pl330_get_desc()
2605 desc->pchan = pch; in pl330_get_desc()
2606 desc->txd.cookie = 0; in pl330_get_desc()
2607 async_tx_ack(&desc->txd); in pl330_get_desc()
2609 desc->peri = peri_id ? pch->chan.chan_id : 0; in pl330_get_desc()
2610 desc->rqcfg.pcfg = &pch->dmac->pcfg; in pl330_get_desc()
2612 dma_async_tx_descriptor_init(&desc->txd, &pch->chan); in pl330_get_desc()
2618 dma_addr_t dst, dma_addr_t src, size_t len) in fill_px() argument
2620 px->bytes = len; in fill_px()
2621 px->dst_addr = dst; in fill_px()
2622 px->src_addr = src; in fill_px()
2627 dma_addr_t src, size_t len) in __pl330_prep_dma_memcpy() argument
2632 dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", in __pl330_prep_dma_memcpy()
2641 * going to be word-unaligned and more than 200MB, in __pl330_prep_dma_memcpy()
2647 fill_px(&desc->px, dst, src, len); in __pl330_prep_dma_memcpy()
2652 /* Call after fixing burst size */
2653 static inline int get_burst_len(struct dma_pl330_desc *desc, size_t len) in get_burst_len() argument
2655 struct dma_pl330_chan *pch = desc->pchan; in get_burst_len()
2656 struct pl330_dmac *pl330 = pch->dmac; in get_burst_len()
2659 burst_len = pl330->pcfg.data_bus_width / 8; in get_burst_len()
2660 burst_len *= pl330->pcfg.data_buf_dep / pl330->pcfg.num_chan; in get_burst_len()
2661 burst_len >>= desc->rqcfg.brst_size; in get_burst_len()
2671 struct dma_chan *chan, dma_addr_t dma_addr, size_t len, in pl330_prep_dma_cyclic() argument
2677 struct pl330_dmac *pl330 = pch->dmac; in pl330_prep_dma_cyclic()
2682 if (len % period_len != 0) in pl330_prep_dma_cyclic()
2686 dev_err(pch->dmac->ddma.dev, "%s:%d Invalid dma direction\n", in pl330_prep_dma_cyclic()
2691 pl330_config_write(chan, &pch->slave_config, direction); in pl330_prep_dma_cyclic()
2696 for (i = 0; i < len / period_len; i++) { in pl330_prep_dma_cyclic()
2701 dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", in pl330_prep_dma_cyclic()
2707 spin_lock_irqsave(&pl330->pool_lock, iflags); in pl330_prep_dma_cyclic()
2709 while (!list_empty(&first->node)) { in pl330_prep_dma_cyclic()
2710 desc = list_entry(first->node.next, in pl330_prep_dma_cyclic()
2712 list_move_tail(&desc->node, &pl330->desc_pool); in pl330_prep_dma_cyclic()
2715 list_move_tail(&first->node, &pl330->desc_pool); in pl330_prep_dma_cyclic()
2717 spin_unlock_irqrestore(&pl330->pool_lock, iflags); in pl330_prep_dma_cyclic()
2724 desc->rqcfg.src_inc = 1; in pl330_prep_dma_cyclic()
2725 desc->rqcfg.dst_inc = 0; in pl330_prep_dma_cyclic()
2727 dst = pch->fifo_dma; in pl330_prep_dma_cyclic()
2730 desc->rqcfg.src_inc = 0; in pl330_prep_dma_cyclic()
2731 desc->rqcfg.dst_inc = 1; in pl330_prep_dma_cyclic()
2732 src = pch->fifo_dma; in pl330_prep_dma_cyclic()
2739 desc->rqtype = direction; in pl330_prep_dma_cyclic()
2740 desc->rqcfg.brst_size = pch->burst_sz; in pl330_prep_dma_cyclic()
2741 desc->rqcfg.brst_len = pch->burst_len; in pl330_prep_dma_cyclic()
2742 desc->bytes_requested = period_len; in pl330_prep_dma_cyclic()
2743 fill_px(&desc->px, dst, src, period_len); in pl330_prep_dma_cyclic()
2748 list_add_tail(&desc->node, &first->node); in pl330_prep_dma_cyclic()
2756 pch->cyclic = true; in pl330_prep_dma_cyclic()
2757 desc->txd.flags = flags; in pl330_prep_dma_cyclic()
2759 return &desc->txd; in pl330_prep_dma_cyclic()
2764 dma_addr_t src, size_t len, unsigned long flags) in pl330_prep_dma_memcpy() argument
2769 int burst; in pl330_prep_dma_memcpy() local
2771 if (unlikely(!pch || !len)) in pl330_prep_dma_memcpy()
2774 pl330 = pch->dmac; in pl330_prep_dma_memcpy()
2776 desc = __pl330_prep_dma_memcpy(pch, dst, src, len); in pl330_prep_dma_memcpy()
2780 desc->rqcfg.src_inc = 1; in pl330_prep_dma_memcpy()
2781 desc->rqcfg.dst_inc = 1; in pl330_prep_dma_memcpy()
2782 desc->rqtype = DMA_MEM_TO_MEM; in pl330_prep_dma_memcpy()
2784 /* Select max possible burst size */ in pl330_prep_dma_memcpy()
2785 burst = pl330->pcfg.data_bus_width / 8; in pl330_prep_dma_memcpy()
2788 * Make sure we use a burst size that aligns with all the memcpy in pl330_prep_dma_memcpy()
2792 while ((src | dst | len) & (burst - 1)) in pl330_prep_dma_memcpy()
2793 burst /= 2; in pl330_prep_dma_memcpy()
2795 desc->rqcfg.brst_size = 0; in pl330_prep_dma_memcpy()
2796 while (burst != (1 << desc->rqcfg.brst_size)) in pl330_prep_dma_memcpy()
2797 desc->rqcfg.brst_size++; in pl330_prep_dma_memcpy()
2799 desc->rqcfg.brst_len = get_burst_len(desc, len); in pl330_prep_dma_memcpy()
2801 * If burst size is smaller than bus width then make sure we only in pl330_prep_dma_memcpy()
2802 * transfer one at a time to avoid a burst stradling an MFIFO entry. in pl330_prep_dma_memcpy()
2804 if (burst * 8 < pl330->pcfg.data_bus_width) in pl330_prep_dma_memcpy()
2805 desc->rqcfg.brst_len = 1; in pl330_prep_dma_memcpy()
2807 desc->bytes_requested = len; in pl330_prep_dma_memcpy()
2809 desc->txd.flags = flags; in pl330_prep_dma_memcpy()
2811 return &desc->txd; in pl330_prep_dma_memcpy()
2823 spin_lock_irqsave(&pl330->pool_lock, flags); in __pl330_giveback_desc()
2825 while (!list_empty(&first->node)) { in __pl330_giveback_desc()
2826 desc = list_entry(first->node.next, in __pl330_giveback_desc()
2828 list_move_tail(&desc->node, &pl330->desc_pool); in __pl330_giveback_desc()
2831 list_move_tail(&first->node, &pl330->desc_pool); in __pl330_giveback_desc()
2833 spin_unlock_irqrestore(&pl330->pool_lock, flags); in __pl330_giveback_desc()
2849 pl330_config_write(chan, &pch->slave_config, direction); in pl330_prep_slave_sg()
2860 struct pl330_dmac *pl330 = pch->dmac; in pl330_prep_slave_sg()
2862 dev_err(pch->dmac->ddma.dev, in pl330_prep_slave_sg()
2873 list_add_tail(&desc->node, &first->node); in pl330_prep_slave_sg()
2876 desc->rqcfg.src_inc = 1; in pl330_prep_slave_sg()
2877 desc->rqcfg.dst_inc = 0; in pl330_prep_slave_sg()
2878 fill_px(&desc->px, pch->fifo_dma, sg_dma_address(sg), in pl330_prep_slave_sg()
2881 desc->rqcfg.src_inc = 0; in pl330_prep_slave_sg()
2882 desc->rqcfg.dst_inc = 1; in pl330_prep_slave_sg()
2883 fill_px(&desc->px, sg_dma_address(sg), pch->fifo_dma, in pl330_prep_slave_sg()
2887 desc->rqcfg.brst_size = pch->burst_sz; in pl330_prep_slave_sg()
2888 desc->rqcfg.brst_len = pch->burst_len; in pl330_prep_slave_sg()
2889 desc->rqtype = direction; in pl330_prep_slave_sg()
2890 desc->bytes_requested = sg_dma_len(sg); in pl330_prep_slave_sg()
2894 desc->txd.flags = flg; in pl330_prep_slave_sg()
2895 return &desc->txd; in pl330_prep_slave_sg()
2916 struct pl330_dmac *pl330 = s->private; in pl330_debugfs_show()
2919 chans = pl330->pcfg.num_chan; in pl330_debugfs_show()
2920 pchs = pl330->num_peripherals; in pl330_debugfs_show()
2924 seq_puts(s, "--------\t-----\n"); in pl330_debugfs_show()
2926 struct pl330_thread *thrd = &pl330->channels[ch]; in pl330_debugfs_show()
2927 int found = -1; in pl330_debugfs_show()
2930 struct dma_pl330_chan *pch = &pl330->peripherals[pr]; in pl330_debugfs_show()
2932 if (!pch->thread || thrd->id != pch->thread->id) in pl330_debugfs_show()
2938 seq_printf(s, "%d\t\t", thrd->id); in pl330_debugfs_show()
2939 if (found == -1) in pl330_debugfs_show()
2940 seq_puts(s, "--\n"); in pl330_debugfs_show()
2952 debugfs_create_file(dev_name(pl330->ddma.dev), in init_pl330_debugfs()
3006 struct device_node *np = adev->dev.of_node; in pl330_probe()
3008 ret = dma_set_mask_and_coherent(&adev->dev, DMA_BIT_MASK(32)); in pl330_probe()
3013 pl330 = devm_kzalloc(&adev->dev, sizeof(*pl330), GFP_KERNEL); in pl330_probe()
3015 return -ENOMEM; in pl330_probe()
3017 pd = &pl330->ddma; in pl330_probe()
3018 pd->dev = &adev->dev; in pl330_probe()
3020 pl330->mcbufsz = 0; in pl330_probe()
3025 pl330->quirks |= of_quirks[i].id; in pl330_probe()
3027 res = &adev->res; in pl330_probe()
3028 pl330->base = devm_ioremap_resource(&adev->dev, res); in pl330_probe()
3029 if (IS_ERR(pl330->base)) in pl330_probe()
3030 return PTR_ERR(pl330->base); in pl330_probe()
3034 pl330->rstc = devm_reset_control_get_optional(&adev->dev, "dma"); in pl330_probe()
3035 if (IS_ERR(pl330->rstc)) { in pl330_probe()
3036 return dev_err_probe(&adev->dev, PTR_ERR(pl330->rstc), "Failed to get reset!\n"); in pl330_probe()
3038 ret = reset_control_deassert(pl330->rstc); in pl330_probe()
3040 dev_err(&adev->dev, "Couldn't deassert the device from reset!\n"); in pl330_probe()
3045 pl330->rstc_ocp = devm_reset_control_get_optional(&adev->dev, "dma-ocp"); in pl330_probe()
3046 if (IS_ERR(pl330->rstc_ocp)) { in pl330_probe()
3047 return dev_err_probe(&adev->dev, PTR_ERR(pl330->rstc_ocp), in pl330_probe()
3050 ret = reset_control_deassert(pl330->rstc_ocp); in pl330_probe()
3052 dev_err(&adev->dev, "Couldn't deassert the device from OCP reset!\n"); in pl330_probe()
3058 irq = adev->irq[i]; in pl330_probe()
3060 ret = devm_request_irq(&adev->dev, irq, in pl330_probe()
3062 dev_name(&adev->dev), pl330); in pl330_probe()
3070 pcfg = &pl330->pcfg; in pl330_probe()
3072 pcfg->periph_id = adev->periphid; in pl330_probe()
3077 INIT_LIST_HEAD(&pl330->desc_pool); in pl330_probe()
3078 spin_lock_init(&pl330->pool_lock); in pl330_probe()
3081 if (!add_desc(&pl330->desc_pool, &pl330->pool_lock, in pl330_probe()
3083 dev_warn(&adev->dev, "unable to allocate desc\n"); in pl330_probe()
3085 INIT_LIST_HEAD(&pd->channels); in pl330_probe()
3088 num_chan = max_t(int, pcfg->num_peri, pcfg->num_chan); in pl330_probe()
3090 pl330->num_peripherals = num_chan; in pl330_probe()
3092 pl330->peripherals = kcalloc(num_chan, sizeof(*pch), GFP_KERNEL); in pl330_probe()
3093 if (!pl330->peripherals) { in pl330_probe()
3094 ret = -ENOMEM; in pl330_probe()
3099 pch = &pl330->peripherals[i]; in pl330_probe()
3101 pch->chan.private = adev->dev.of_node; in pl330_probe()
3102 INIT_LIST_HEAD(&pch->submitted_list); in pl330_probe()
3103 INIT_LIST_HEAD(&pch->work_list); in pl330_probe()
3104 INIT_LIST_HEAD(&pch->completed_list); in pl330_probe()
3105 spin_lock_init(&pch->lock); in pl330_probe()
3106 pch->thread = NULL; in pl330_probe()
3107 pch->chan.device = pd; in pl330_probe()
3108 pch->dmac = pl330; in pl330_probe()
3109 pch->dir = DMA_NONE; in pl330_probe()
3112 list_add_tail(&pch->chan.device_node, &pd->channels); in pl330_probe()
3115 dma_cap_set(DMA_MEMCPY, pd->cap_mask); in pl330_probe()
3116 if (pcfg->num_peri) { in pl330_probe()
3117 dma_cap_set(DMA_SLAVE, pd->cap_mask); in pl330_probe()
3118 dma_cap_set(DMA_CYCLIC, pd->cap_mask); in pl330_probe()
3119 dma_cap_set(DMA_PRIVATE, pd->cap_mask); in pl330_probe()
3122 pd->device_alloc_chan_resources = pl330_alloc_chan_resources; in pl330_probe()
3123 pd->device_free_chan_resources = pl330_free_chan_resources; in pl330_probe()
3124 pd->device_prep_dma_memcpy = pl330_prep_dma_memcpy; in pl330_probe()
3125 pd->device_prep_dma_cyclic = pl330_prep_dma_cyclic; in pl330_probe()
3126 pd->device_tx_status = pl330_tx_status; in pl330_probe()
3127 pd->device_prep_slave_sg = pl330_prep_slave_sg; in pl330_probe()
3128 pd->device_config = pl330_config; in pl330_probe()
3129 pd->device_pause = pl330_pause; in pl330_probe()
3130 pd->device_terminate_all = pl330_terminate_all; in pl330_probe()
3131 pd->device_issue_pending = pl330_issue_pending; in pl330_probe()
3132 pd->src_addr_widths = PL330_DMA_BUSWIDTHS; in pl330_probe()
3133 pd->dst_addr_widths = PL330_DMA_BUSWIDTHS; in pl330_probe()
3134 pd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); in pl330_probe()
3135 pd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; in pl330_probe()
3136 pd->max_burst = PL330_MAX_BURST; in pl330_probe()
3140 dev_err(&adev->dev, "unable to register DMAC\n"); in pl330_probe()
3144 if (adev->dev.of_node) { in pl330_probe()
3145 ret = of_dma_controller_register(adev->dev.of_node, in pl330_probe()
3148 dev_err(&adev->dev, in pl330_probe()
3157 ret = dma_set_max_seg_size(&adev->dev, 1900800); in pl330_probe()
3159 dev_err(&adev->dev, "unable to set the seg size\n"); in pl330_probe()
3163 dev_info(&adev->dev, in pl330_probe()
3164 "Loaded driver for PL330 DMAC-%x\n", adev->periphid); in pl330_probe()
3165 dev_info(&adev->dev, in pl330_probe()
3166 "\tDBUFF-%ux%ubytes Num_Chans-%u Num_Peri-%u Num_Events-%u\n", in pl330_probe()
3167 pcfg->data_buf_dep, pcfg->data_bus_width / 8, pcfg->num_chan, in pl330_probe()
3168 pcfg->num_peri, pcfg->num_events); in pl330_probe()
3170 pm_runtime_irq_safe(&adev->dev); in pl330_probe()
3171 pm_runtime_use_autosuspend(&adev->dev); in pl330_probe()
3172 pm_runtime_set_autosuspend_delay(&adev->dev, PL330_AUTOSUSPEND_DELAY); in pl330_probe()
3173 pm_runtime_mark_last_busy(&adev->dev); in pl330_probe()
3174 pm_runtime_put_autosuspend(&adev->dev); in pl330_probe()
3179 list_for_each_entry_safe(pch, _p, &pl330->ddma.channels, in pl330_probe()
3183 list_del(&pch->chan.device_node); in pl330_probe()
3186 if (pch->thread) { in pl330_probe()
3187 pl330_terminate_all(&pch->chan); in pl330_probe()
3188 pl330_free_chan_resources(&pch->chan); in pl330_probe()
3194 if (pl330->rstc_ocp) in pl330_probe()
3195 reset_control_assert(pl330->rstc_ocp); in pl330_probe()
3197 if (pl330->rstc) in pl330_probe()
3198 reset_control_assert(pl330->rstc); in pl330_probe()
3208 pm_runtime_get_noresume(pl330->ddma.dev); in pl330_remove()
3210 if (adev->dev.of_node) in pl330_remove()
3211 of_dma_controller_free(adev->dev.of_node); in pl330_remove()
3214 irq = adev->irq[i]; in pl330_remove()
3216 devm_free_irq(&adev->dev, irq, pl330); in pl330_remove()
3219 dma_async_device_unregister(&pl330->ddma); in pl330_remove()
3222 list_for_each_entry_safe(pch, _p, &pl330->ddma.channels, in pl330_remove()
3226 list_del(&pch->chan.device_node); in pl330_remove()
3229 if (pch->thread) { in pl330_remove()
3230 pl330_terminate_all(&pch->chan); in pl330_remove()
3231 pl330_free_chan_resources(&pch->chan); in pl330_remove()
3237 if (pl330->rstc_ocp) in pl330_remove()
3238 reset_control_assert(pl330->rstc_ocp); in pl330_remove()
3240 if (pl330->rstc) in pl330_remove()
3241 reset_control_assert(pl330->rstc); in pl330_remove()
3258 .name = "dma-pl330",