Lines Matching +full:rst +full:- +full:pins
1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/pinctrl/pinconf-generic.h>
49 struct reset_control *rst; member
78 u32 value = readl(dpaux->regs + (offset << 2)); in tegra_dpaux_readl()
80 trace_dpaux_readl(dpaux->dev, offset, value); in tegra_dpaux_readl()
88 trace_dpaux_writel(dpaux->dev, offset, value); in tegra_dpaux_writel()
89 writel(value, dpaux->regs + (offset << 2)); in tegra_dpaux_writel()
98 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_write_fifo()
114 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_read_fifo()
135 if (msg->size > 16) in tegra_dpaux_transfer()
136 return -EINVAL; in tegra_dpaux_transfer()
139 * Allow zero-sized messages only for I2C, in which case they specify in tegra_dpaux_transfer()
140 * address-only transactions. in tegra_dpaux_transfer()
142 if (msg->size < 1) { in tegra_dpaux_transfer()
143 switch (msg->request & ~DP_AUX_I2C_MOT) { in tegra_dpaux_transfer()
151 return -EINVAL; in tegra_dpaux_transfer()
154 /* For non-zero-sized messages, set the CMDLEN field. */ in tegra_dpaux_transfer()
155 value = DPAUX_DP_AUXCTL_CMDLEN(msg->size - 1); in tegra_dpaux_transfer()
158 switch (msg->request & ~DP_AUX_I2C_MOT) { in tegra_dpaux_transfer()
160 if (msg->request & DP_AUX_I2C_MOT) in tegra_dpaux_transfer()
168 if (msg->request & DP_AUX_I2C_MOT) in tegra_dpaux_transfer()
176 if (msg->request & DP_AUX_I2C_MOT) in tegra_dpaux_transfer()
192 return -EINVAL; in tegra_dpaux_transfer()
195 tegra_dpaux_writel(dpaux, msg->address, DPAUX_DP_AUXADDR); in tegra_dpaux_transfer()
198 if ((msg->request & DP_AUX_I2C_READ) == 0) { in tegra_dpaux_transfer()
199 tegra_dpaux_write_fifo(dpaux, msg->buffer, msg->size); in tegra_dpaux_transfer()
200 ret = msg->size; in tegra_dpaux_transfer()
208 status = wait_for_completion_timeout(&dpaux->complete, timeout); in tegra_dpaux_transfer()
210 return -ETIMEDOUT; in tegra_dpaux_transfer()
217 return -ETIMEDOUT; in tegra_dpaux_transfer()
222 return -EIO; in tegra_dpaux_transfer()
246 if ((msg->size > 0) && (msg->reply == DP_AUX_NATIVE_REPLY_ACK)) { in tegra_dpaux_transfer()
247 if (msg->request & DP_AUX_I2C_READ) { in tegra_dpaux_transfer()
253 * an -EBUSY return value, simply reuse that instead. in tegra_dpaux_transfer()
255 if (count != msg->size) { in tegra_dpaux_transfer()
256 ret = -EBUSY; in tegra_dpaux_transfer()
260 tegra_dpaux_read_fifo(dpaux, msg->buffer, count); in tegra_dpaux_transfer()
265 msg->reply = reply; in tegra_dpaux_transfer()
275 if (dpaux->output) in tegra_dpaux_hotplug()
276 drm_helper_hpd_irq_event(dpaux->output->connector.dev); in tegra_dpaux_hotplug()
290 schedule_work(&dpaux->work); in tegra_dpaux_irq()
297 complete(&dpaux->complete); in tegra_dpaux_irq()
332 value = DPAUX_HYBRID_PADCTL_AUX_CMH(dpaux->soc->cmh) | in tegra_dpaux_pad_config()
333 DPAUX_HYBRID_PADCTL_AUX_DRVZ(dpaux->soc->drvz) | in tegra_dpaux_pad_config()
334 DPAUX_HYBRID_PADCTL_AUX_DRVI(dpaux->soc->drvi) | in tegra_dpaux_pad_config()
342 DPAUX_HYBRID_PADCTL_AUX_CMH(dpaux->soc->cmh) | in tegra_dpaux_pad_config()
343 DPAUX_HYBRID_PADCTL_AUX_DRVZ(dpaux->soc->drvz) | in tegra_dpaux_pad_config()
344 DPAUX_HYBRID_PADCTL_AUX_DRVI(dpaux->soc->drvi) | in tegra_dpaux_pad_config()
353 return -ENOTSUPP; in tegra_dpaux_pad_config()
371 "dpaux-io",
392 unsigned group, const unsigned **pins, in tegra_dpaux_get_group_pins() argument
395 *pins = tegra_dpaux_pin_numbers; in tegra_dpaux_get_group_pins()
454 dpaux = devm_kzalloc(&pdev->dev, sizeof(*dpaux), GFP_KERNEL); in tegra_dpaux_probe()
456 return -ENOMEM; in tegra_dpaux_probe()
458 dpaux->soc = of_device_get_match_data(&pdev->dev); in tegra_dpaux_probe()
459 INIT_WORK(&dpaux->work, tegra_dpaux_hotplug); in tegra_dpaux_probe()
460 init_completion(&dpaux->complete); in tegra_dpaux_probe()
461 INIT_LIST_HEAD(&dpaux->list); in tegra_dpaux_probe()
462 dpaux->dev = &pdev->dev; in tegra_dpaux_probe()
465 dpaux->regs = devm_ioremap_resource(&pdev->dev, regs); in tegra_dpaux_probe()
466 if (IS_ERR(dpaux->regs)) in tegra_dpaux_probe()
467 return PTR_ERR(dpaux->regs); in tegra_dpaux_probe()
469 dpaux->irq = platform_get_irq(pdev, 0); in tegra_dpaux_probe()
470 if (dpaux->irq < 0) { in tegra_dpaux_probe()
471 dev_err(&pdev->dev, "failed to get IRQ\n"); in tegra_dpaux_probe()
472 return -ENXIO; in tegra_dpaux_probe()
475 if (!pdev->dev.pm_domain) { in tegra_dpaux_probe()
476 dpaux->rst = devm_reset_control_get(&pdev->dev, "dpaux"); in tegra_dpaux_probe()
477 if (IS_ERR(dpaux->rst)) { in tegra_dpaux_probe()
478 dev_err(&pdev->dev, in tegra_dpaux_probe()
480 PTR_ERR(dpaux->rst)); in tegra_dpaux_probe()
481 return PTR_ERR(dpaux->rst); in tegra_dpaux_probe()
485 dpaux->clk = devm_clk_get(&pdev->dev, NULL); in tegra_dpaux_probe()
486 if (IS_ERR(dpaux->clk)) { in tegra_dpaux_probe()
487 dev_err(&pdev->dev, "failed to get module clock: %ld\n", in tegra_dpaux_probe()
488 PTR_ERR(dpaux->clk)); in tegra_dpaux_probe()
489 return PTR_ERR(dpaux->clk); in tegra_dpaux_probe()
492 dpaux->clk_parent = devm_clk_get(&pdev->dev, "parent"); in tegra_dpaux_probe()
493 if (IS_ERR(dpaux->clk_parent)) { in tegra_dpaux_probe()
494 dev_err(&pdev->dev, "failed to get parent clock: %ld\n", in tegra_dpaux_probe()
495 PTR_ERR(dpaux->clk_parent)); in tegra_dpaux_probe()
496 return PTR_ERR(dpaux->clk_parent); in tegra_dpaux_probe()
499 err = clk_set_rate(dpaux->clk_parent, 270000000); in tegra_dpaux_probe()
501 dev_err(&pdev->dev, "failed to set clock to 270 MHz: %d\n", in tegra_dpaux_probe()
506 dpaux->vdd = devm_regulator_get_optional(&pdev->dev, "vdd"); in tegra_dpaux_probe()
507 if (IS_ERR(dpaux->vdd)) { in tegra_dpaux_probe()
508 if (PTR_ERR(dpaux->vdd) != -ENODEV) { in tegra_dpaux_probe()
509 if (PTR_ERR(dpaux->vdd) != -EPROBE_DEFER) in tegra_dpaux_probe()
510 dev_err(&pdev->dev, in tegra_dpaux_probe()
512 PTR_ERR(dpaux->vdd)); in tegra_dpaux_probe()
514 return PTR_ERR(dpaux->vdd); in tegra_dpaux_probe()
517 dpaux->vdd = NULL; in tegra_dpaux_probe()
521 pm_runtime_enable(&pdev->dev); in tegra_dpaux_probe()
522 pm_runtime_get_sync(&pdev->dev); in tegra_dpaux_probe()
524 err = devm_request_irq(dpaux->dev, dpaux->irq, tegra_dpaux_irq, 0, in tegra_dpaux_probe()
525 dev_name(dpaux->dev), dpaux); in tegra_dpaux_probe()
527 dev_err(dpaux->dev, "failed to request IRQ#%u: %d\n", in tegra_dpaux_probe()
528 dpaux->irq, err); in tegra_dpaux_probe()
532 disable_irq(dpaux->irq); in tegra_dpaux_probe()
534 dpaux->aux.transfer = tegra_dpaux_transfer; in tegra_dpaux_probe()
535 dpaux->aux.dev = &pdev->dev; in tegra_dpaux_probe()
537 err = drm_dp_aux_register(&dpaux->aux); in tegra_dpaux_probe()
554 dpaux->desc.name = dev_name(&pdev->dev); in tegra_dpaux_probe()
555 dpaux->desc.pins = tegra_dpaux_pins; in tegra_dpaux_probe()
556 dpaux->desc.npins = ARRAY_SIZE(tegra_dpaux_pins); in tegra_dpaux_probe()
557 dpaux->desc.pctlops = &tegra_dpaux_pinctrl_ops; in tegra_dpaux_probe()
558 dpaux->desc.pmxops = &tegra_dpaux_pinmux_ops; in tegra_dpaux_probe()
559 dpaux->desc.owner = THIS_MODULE; in tegra_dpaux_probe()
561 dpaux->pinctrl = devm_pinctrl_register(&pdev->dev, &dpaux->desc, dpaux); in tegra_dpaux_probe()
562 if (IS_ERR(dpaux->pinctrl)) { in tegra_dpaux_probe()
563 dev_err(&pdev->dev, "failed to register pincontrol\n"); in tegra_dpaux_probe()
564 return PTR_ERR(dpaux->pinctrl); in tegra_dpaux_probe()
574 list_add_tail(&dpaux->list, &dpaux_list); in tegra_dpaux_probe()
584 cancel_work_sync(&dpaux->work); in tegra_dpaux_remove()
589 pm_runtime_put_sync(&pdev->dev); in tegra_dpaux_remove()
590 pm_runtime_disable(&pdev->dev); in tegra_dpaux_remove()
592 drm_dp_aux_unregister(&dpaux->aux); in tegra_dpaux_remove()
595 list_del(&dpaux->list); in tegra_dpaux_remove()
607 if (dpaux->rst) { in tegra_dpaux_suspend()
608 err = reset_control_assert(dpaux->rst); in tegra_dpaux_suspend()
617 clk_disable_unprepare(dpaux->clk_parent); in tegra_dpaux_suspend()
618 clk_disable_unprepare(dpaux->clk); in tegra_dpaux_suspend()
628 err = clk_prepare_enable(dpaux->clk); in tegra_dpaux_resume()
634 err = clk_prepare_enable(dpaux->clk_parent); in tegra_dpaux_resume()
642 if (dpaux->rst) { in tegra_dpaux_resume()
643 err = reset_control_deassert(dpaux->rst); in tegra_dpaux_resume()
655 clk_disable_unprepare(dpaux->clk_parent); in tegra_dpaux_resume()
657 clk_disable_unprepare(dpaux->clk); in tegra_dpaux_resume()
685 { .compatible = "nvidia,tegra194-dpaux", .data = &tegra194_dpaux_soc },
686 { .compatible = "nvidia,tegra186-dpaux", .data = &tegra210_dpaux_soc },
687 { .compatible = "nvidia,tegra210-dpaux", .data = &tegra210_dpaux_soc },
688 { .compatible = "nvidia,tegra124-dpaux", .data = &tegra124_dpaux_soc },
695 .name = "tegra-dpaux",
710 if (np == dpaux->dev->of_node) { in drm_dp_aux_find_by_of_node()
712 return &dpaux->aux; in drm_dp_aux_find_by_of_node()
726 output->connector.polled = DRM_CONNECTOR_POLL_HPD; in drm_dp_aux_attach()
727 dpaux->output = output; in drm_dp_aux_attach()
729 if (output->panel) { in drm_dp_aux_attach()
732 if (dpaux->vdd) { in drm_dp_aux_attach()
733 err = regulator_enable(dpaux->vdd); in drm_dp_aux_attach()
750 return -ETIMEDOUT; in drm_dp_aux_attach()
753 enable_irq(dpaux->irq); in drm_dp_aux_attach()
763 disable_irq(dpaux->irq); in drm_dp_aux_detach()
765 if (dpaux->output->panel) { in drm_dp_aux_detach()
768 if (dpaux->vdd) { in drm_dp_aux_detach()
769 err = regulator_disable(dpaux->vdd); in drm_dp_aux_detach()
786 return -ETIMEDOUT; in drm_dp_aux_detach()
788 dpaux->output = NULL; in drm_dp_aux_detach()