1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/dma-mapping.h>
11  *	config_drive_for_dma	-	attempt to activate IDE DMA
12  *	@drive: the drive to place in DMA mode
14  *	If the drive supports at least mode 2 DMA or UDMA of any kind
15  *	then attempt to place it into DMA mode. Drives that are known to
18  *	on the good/bad drive lists.
21 int config_drive_for_dma(ide_drive_t *drive)  in config_drive_for_dma()  argument
23 	ide_hwif_t *hwif = drive->hwif;  in config_drive_for_dma()
24 	u16 *id = drive->id;  in config_drive_for_dma()
26 	if (drive->media != ide_disk) {  in config_drive_for_dma()
27 		if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)  in config_drive_for_dma()
32 	 * Enable DMA on any drive that has  in config_drive_for_dma()
33 	 * UltraDMA (mode 0/1/2/3/4/5/6) enabled  in config_drive_for_dma()
40 	 * Enable DMA on any drive that has mode2 DMA  in config_drive_for_dma()
48 	if (ide_dma_good_drive(drive))  in config_drive_for_dma()
56 	unsigned long addr = hwif->dma_base + ATA_DMA_STATUS;  in ide_dma_sff_read_status()
58 	if (hwif->host_flags & IDE_HFLAG_MMIO)  in ide_dma_sff_read_status()
67 	unsigned long addr = hwif->dma_base + ATA_DMA_STATUS;  in ide_dma_sff_write_status()
69 	if (hwif->host_flags & IDE_HFLAG_MMIO)  in ide_dma_sff_write_status()
76  *	ide_dma_host_set	-	Enable/disable DMA on a host
77  *	@drive: drive to control
80  *	bus-mastering IDE controller behaviour.
83 void ide_dma_host_set(ide_drive_t *drive, int on)  in ide_dma_host_set()  argument
85 	ide_hwif_t *hwif = drive->hwif;  in ide_dma_host_set()
86 	u8 unit = drive->dn & 1;  in ide_dma_host_set()
87 	u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);  in ide_dma_host_set()
99  *	ide_build_dmatable	-	build IDE DMA table
115 int ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)  in ide_build_dmatable()  argument
117 	ide_hwif_t *hwif = drive->hwif;  in ide_build_dmatable()
118 	__le32 *table = (__le32 *)hwif->dmatable_cpu;  in ide_build_dmatable()
122 	u8 is_trm290 = !!(hwif->host_flags & IDE_HFLAG_TRM290);  in ide_build_dmatable()
124 	for_each_sg(hwif->sg_table, sg, cmd->sg_nents, i) {  in ide_build_dmatable()
132 		 * Most hardware requires 16-bit alignment of all blocks,  in ide_build_dmatable()
133 		 * but the trm290 requires 32-bit alignment.  in ide_build_dmatable()
140 			bcount = 0x10000 - (cur_addr & 0xffff);  in ide_build_dmatable()
146 				xcount = ((xcount >> 2) - 1) << 16;  in ide_build_dmatable()
156 			cur_len -= bcount;  in ide_build_dmatable()
162 			*--table |= cpu_to_le32(0x80000000);  in ide_build_dmatable()
167 	printk(KERN_ERR "%s: %s\n", drive->name,  in ide_build_dmatable()
175  *	ide_dma_setup	-	begin a DMA phase
176  *	@drive: target device
188 int ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)  in ide_dma_setup()  argument
190 	ide_hwif_t *hwif = drive->hwif;  in ide_dma_setup()
191 	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;  in ide_dma_setup()
192 	u8 rw = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 0 : ATA_DMA_WR;  in ide_dma_setup()
196 	if (ide_build_dmatable(drive, cmd) == 0) {  in ide_dma_setup()
197 		ide_map_sg(drive, cmd);  in ide_dma_setup()
203 		writel(hwif->dmatable_dma,  in ide_dma_setup()
204 		       (void __iomem *)(hwif->dma_base + ATA_DMA_TABLE_OFS));  in ide_dma_setup()
206 		outl(hwif->dmatable_dma, hwif->dma_base + ATA_DMA_TABLE_OFS);  in ide_dma_setup()
210 		writeb(rw, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));  in ide_dma_setup()
212 		outb(rw, hwif->dma_base + ATA_DMA_CMD);  in ide_dma_setup()
215 	dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);  in ide_dma_setup()
225  *	ide_dma_sff_timer_expiry	-	handle a DMA timeout
226  *	@drive: Drive that timed out
231  *	secondary 'I don't care what the drive thinks' timeout here)
233  *	But only one time - we clear expiry and if it's still not
238 int ide_dma_sff_timer_expiry(ide_drive_t *drive)  in ide_dma_sff_timer_expiry()  argument
240 	ide_hwif_t *hwif = drive->hwif;  in ide_dma_sff_timer_expiry()
241 	u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);  in ide_dma_sff_timer_expiry()
244 		drive->name, __func__, dma_stat);  in ide_dma_sff_timer_expiry()
249 	hwif->expiry = NULL;	/* one free ride for now */  in ide_dma_sff_timer_expiry()
252 		return -1;  in ide_dma_sff_timer_expiry()
260 	return 0;	/* Status is unknown -- reset the bus */  in ide_dma_sff_timer_expiry()
264 void ide_dma_start(ide_drive_t *drive)  in ide_dma_start()  argument
266 	ide_hwif_t *hwif = drive->hwif;  in ide_dma_start()
270 	 * been issued to the drive, as per the BM-IDE spec.  in ide_dma_start()
272 	 * we do this part before issuing the drive cmd.  in ide_dma_start()
274 	if (hwif->host_flags & IDE_HFLAG_MMIO) {  in ide_dma_start()
275 		dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));  in ide_dma_start()
277 		       (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));  in ide_dma_start()
279 		dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);  in ide_dma_start()
280 		outb(dma_cmd | ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);  in ide_dma_start()
286 int ide_dma_end(ide_drive_t *drive)  in ide_dma_end()  argument
288 	ide_hwif_t *hwif = drive->hwif;  in ide_dma_end()
292 	if (hwif->host_flags & IDE_HFLAG_MMIO) {  in ide_dma_end()
293 		dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));  in ide_dma_end()
295 		       (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));  in ide_dma_end()
297 		dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);  in ide_dma_end()
298 		outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);  in ide_dma_end()
302 	dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);  in ide_dma_end()
317 int ide_dma_test_irq(ide_drive_t *drive)  in ide_dma_test_irq()  argument
319 	ide_hwif_t *hwif = drive->hwif;  in ide_dma_test_irq()
320 	u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);  in ide_dma_test_irq()