Lines Matching +full:fiber +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0+
10 * via observation and experimentation for a setup using single-lane Serdes:
12 * SGMII PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for <= 1G)
13 * 10GBASE-KR PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for 10G)
14 * 10GBASE-KR PHYXS -- BASE-R PCS -- Fiber
18 * XAUI PHYXS -- <appropriate PCS as above>
20 * and no switching of the host interface mode occurs.
22 * If both the fiber and copper ports are connected, the first to gain
72 /* These registers appear at 0x800X and 0xa00X - the 0xa00X control
76 MV_AN_CTRL1000 = 0x8000, /* 1000base-T control register */
77 MV_AN_STAT1000 = 0x8001, /* 1000base-T status register */
126 if (phydev->drv->phy_id == MARVELL_PHY_ID_88X3310) in mv10g_hwmon_read_temp_reg()
148 *value = ((temp & 0xff) - 75) * 1000; in mv3310_hwmon_read()
153 return -EOPNOTSUPP; in mv3310_hwmon_read()
197 if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310) in mv3310_hwmon_config()
213 struct device *dev = &phydev->mdio.dev; in mv3310_hwmon_probe()
214 struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev); in mv3310_hwmon_probe()
217 priv->hwmon_name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL); in mv3310_hwmon_probe()
218 if (!priv->hwmon_name) in mv3310_hwmon_probe()
219 return -ENODEV; in mv3310_hwmon_probe()
221 for (i = j = 0; priv->hwmon_name[i]; i++) { in mv3310_hwmon_probe()
222 if (isalnum(priv->hwmon_name[i])) { in mv3310_hwmon_probe()
224 priv->hwmon_name[j] = priv->hwmon_name[i]; in mv3310_hwmon_probe()
228 priv->hwmon_name[j] = '\0'; in mv3310_hwmon_probe()
234 priv->hwmon_dev = devm_hwmon_device_register_with_info(dev, in mv3310_hwmon_probe()
235 priv->hwmon_name, phydev, in mv3310_hwmon_probe()
238 return PTR_ERR_OR_ZERO(priv->hwmon_dev); in mv3310_hwmon_probe()
260 struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev); in mv3310_power_up()
266 if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310 || in mv3310_power_up()
267 priv->firmware_ver < 0x00030000) in mv3310_power_up()
331 return -EINVAL; in mv3310_set_edpd()
348 sfp_parse_support(phydev->sfp_bus, id, support); in mv3310_sfp_insert()
349 iface = sfp_select_interface(phydev->sfp_bus, support); in mv3310_sfp_insert()
352 dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n"); in mv3310_sfp_insert()
353 return -EINVAL; in mv3310_sfp_insert()
370 if (!phydev->is_c45 || in mv3310_probe()
371 (phydev->c45_ids.devices_in_package & mmd_mask) != mmd_mask) in mv3310_probe()
372 return -ENODEV; in mv3310_probe()
379 dev_warn(&phydev->mdio.dev, in mv3310_probe()
381 return -ENODEV; in mv3310_probe()
384 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); in mv3310_probe()
386 return -ENOMEM; in mv3310_probe()
388 dev_set_drvdata(&phydev->mdio.dev, priv); in mv3310_probe()
394 priv->firmware_ver = ret << 16; in mv3310_probe()
400 priv->firmware_ver |= ret; in mv3310_probe()
403 priv->firmware_ver >> 24, (priv->firmware_ver >> 16) & 255, in mv3310_probe()
404 (priv->firmware_ver >> 8) & 255, priv->firmware_ver & 255); in mv3310_probe()
448 if (!(phydev->c45_ids.devices_in_package & MDIO_DEVS_PMAPMD)) in mv3310_has_pma_ngbaset_quirk()
452 return (phydev->c45_ids.device_ids[MDIO_MMD_PMAPMD] & in mv3310_has_pma_ngbaset_quirk()
458 struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev); in mv3310_config_init()
463 if (phydev->interface != PHY_INTERFACE_MODE_SGMII && in mv3310_config_init()
464 phydev->interface != PHY_INTERFACE_MODE_2500BASEX && in mv3310_config_init()
465 phydev->interface != PHY_INTERFACE_MODE_XAUI && in mv3310_config_init()
466 phydev->interface != PHY_INTERFACE_MODE_RXAUI && in mv3310_config_init()
467 phydev->interface != PHY_INTERFACE_MODE_10GBASER) in mv3310_config_init()
468 return -ENODEV; in mv3310_config_init()
470 phydev->mdix_ctrl = ETH_TP_MDI_AUTO; in mv3310_config_init()
480 priv->rate_match = ((val & MV_V2_PORT_MAC_TYPE_MASK) == in mv3310_config_init()
483 /* Enable EDPD mode - saving 600mW */ in mv3310_config_init()
502 phydev->supported, in mv3310_get_features()
506 phydev->supported, in mv3310_get_features()
518 switch (phydev->mdix_ctrl) { in mv3310_config_mdix()
529 return -EINVAL; in mv3310_config_mdix()
550 if (phydev->autoneg == AUTONEG_DISABLE) in mv3310_config_aneg()
560 * use vendor registers for this mode. in mv3310_config_aneg()
562 reg = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising); in mv3310_config_aneg()
589 struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev); in mv3310_update_interface()
591 /* In "XFI with Rate Matching" mode the PHY interface is fixed at in mv3310_update_interface()
595 if (priv->rate_match) { in mv3310_update_interface()
596 phydev->interface = PHY_INTERFACE_MODE_10GBASER; in mv3310_update_interface()
600 if ((phydev->interface == PHY_INTERFACE_MODE_SGMII || in mv3310_update_interface()
601 phydev->interface == PHY_INTERFACE_MODE_2500BASEX || in mv3310_update_interface()
602 phydev->interface == PHY_INTERFACE_MODE_10GBASER) && in mv3310_update_interface()
603 phydev->link) { in mv3310_update_interface()
605 * active PHYXS instance) between Cisco SGMII, 10GBase-R and in mv3310_update_interface()
607 * setting phydev->interface to communicate this to the MAC. in mv3310_update_interface()
610 switch (phydev->speed) { in mv3310_update_interface()
612 phydev->interface = PHY_INTERFACE_MODE_10GBASER; in mv3310_update_interface()
615 phydev->interface = PHY_INTERFACE_MODE_2500BASEX; in mv3310_update_interface()
620 phydev->interface = PHY_INTERFACE_MODE_SGMII; in mv3310_update_interface()
628 /* 10GBASE-ER,LR,LRM,SR do not support autonegotiation. */
631 phydev->link = 1; in mv3310_read_status_10gbaser()
632 phydev->speed = SPEED_10000; in mv3310_read_status_10gbaser()
633 phydev->duplex = DUPLEX_FULL; in mv3310_read_status_10gbaser()
634 phydev->port = PORT_FIBRE; in mv3310_read_status_10gbaser()
657 phydev->link = 0; in mv3310_read_status_copper()
668 phydev->speed = SPEED_10000; in mv3310_read_status_copper()
672 phydev->speed = SPEED_5000; in mv3310_read_status_copper()
676 phydev->speed = SPEED_2500; in mv3310_read_status_copper()
680 phydev->speed = SPEED_1000; in mv3310_read_status_copper()
684 phydev->speed = SPEED_100; in mv3310_read_status_copper()
688 phydev->speed = SPEED_10; in mv3310_read_status_copper()
692 phydev->duplex = cssr1 & MV_PCS_CSSR1_DUPLEX_FULL ? in mv3310_read_status_copper()
694 phydev->port = PORT_TP; in mv3310_read_status_copper()
695 phydev->mdix = cssr1 & MV_PCS_CSSR1_MDIX ? in mv3310_read_status_copper()
708 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val); in mv3310_read_status_copper()
721 phydev->speed = SPEED_UNKNOWN; in mv3310_read_status()
722 phydev->duplex = DUPLEX_UNKNOWN; in mv3310_read_status()
723 linkmode_zero(phydev->lp_advertising); in mv3310_read_status()
724 phydev->link = 0; in mv3310_read_status()
725 phydev->pause = 0; in mv3310_read_status()
726 phydev->asym_pause = 0; in mv3310_read_status()
727 phydev->mdix = ETH_TP_MDI_INVALID; in mv3310_read_status()
740 if (phydev->link) in mv3310_read_status()
749 switch (tuna->id) { in mv3310_get_tunable()
753 return -EOPNOTSUPP; in mv3310_get_tunable()
760 switch (tuna->id) { in mv3310_set_tunable()
764 return -EOPNOTSUPP; in mv3310_set_tunable()