Lines Matching +full:codec +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0-or-later
37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
59 #define WIDGET_CHIP_CTRL 0x15
60 #define WIDGET_DSP_CTRL 0x16
70 #define SCP_SET 0
74 #define DESKTOP_EFX_FILE "ctefx-desktop.bin"
75 #define R3DI_EFX_FILE "ctefx-r3di.bin"
107 #define VNODE_START_NID 0x80
115 #define VNODES_COUNT (VNODE_END_NID - VNODE_START_NID)
117 #define EFFECT_START_NID 0x90
126 #define OUT_EFFECTS_COUNT (OUT_EFFECT_END_NID - OUT_EFFECT_START_NID)
134 #define IN_EFFECTS_COUNT (IN_EFFECT_END_NID - IN_EFFECT_START_NID)
154 #define EFFECTS_COUNT (EFFECT_END_NID - EFFECT_START_NID)
163 * X-bass.
170 #define DSP_CAPTURE_INIT_LATENCY 0
181 int direct; /* 0:output; 1:input*/
182 int params; /* number of default non-on/off params */
187 #define EFX_DIR_OUT 0
193 .mid = 0x96,
194 .reqs = {0, 1},
197 .def_vals = {0x3F800000, 0x3F2B851F}
201 .mid = 0x96,
205 .def_vals = {0x3F800000, 0x3F266666}
209 .mid = 0x96,
213 .def_vals = {0x00000000, 0x3F000000}
217 .mid = 0x96,
221 .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
223 { .name = "X-Bass",
225 .mid = 0x96,
229 .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 .mid = 0x96,
238 .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 .mid = 0x95,
245 .reqs = {0, 1, 2, 3},
248 .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 .mid = 0x95,
256 .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
260 .mid = 0x95,
264 .def_vals = {0x00000000, 0x3F3D70A4}
268 .mid = 0x95,
272 .def_vals = {0x3F800000, 0x3F000000}
276 .mid = 0x95,
280 .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
281 0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
282 0x00000000}
290 #define TUNING_CTL_START_NID 0xC0
304 #define TUNING_CTLS_COUNT (TUNING_CTL_END_NID - TUNING_CTL_START_NID)
313 int direct; /* 0:output; 1:input*/
321 .mid = 0x95,
324 .def_val = 0x41F00000
329 .mid = 0x95,
332 .def_val = 0x3F3D70A4
337 .mid = 0x96,
340 .def_val = 0x00000000
345 .mid = 0x96,
348 .def_val = 0x00000000
353 .mid = 0x96,
356 .def_val = 0x00000000
361 .mid = 0x96,
364 .def_val = 0x00000000
369 .mid = 0x96,
372 .def_val = 0x00000000
377 .mid = 0x96,
380 .def_val = 0x00000000
385 .mid = 0x96,
388 .def_val = 0x00000000
393 .mid = 0x96,
396 .def_val = 0x00000000
401 .mid = 0x96,
404 .def_val = 0x00000000
409 .mid = 0x96,
412 .def_val = 0x00000000
435 .mid = 0x95,
441 .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
442 0x44FA0000, 0x3F800000, 0x3F800000,
443 0x3F800000, 0x00000000, 0x00000000 }
446 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
447 0x44FA0000, 0x3F19999A, 0x3F866666,
448 0x3F800000, 0x00000000, 0x00000000 }
451 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
452 0x450AC000, 0x4017AE14, 0x3F6B851F,
453 0x3F800000, 0x00000000, 0x00000000 }
456 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
457 0x44FA0000, 0x40400000, 0x3F28F5C3,
458 0x3F800000, 0x00000000, 0x00000000 }
461 .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
462 0x44E10000, 0x3FB33333, 0x3FB9999A,
463 0x3F800000, 0x3E3A2E43, 0x00000000 }
466 .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
467 0x45098000, 0x3F266666, 0x3FC00000,
468 0x3F800000, 0x00000000, 0x00000000 }
471 .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
472 0x45193000, 0x3F8E147B, 0x3F75C28F,
473 0x3F800000, 0x00000000, 0x00000000 }
476 .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
477 0x45007000, 0x3F451EB8, 0x3F7851EC,
478 0x3F800000, 0x00000000, 0x00000000 }
481 .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
482 0x451F6000, 0x3F266666, 0x3FA7D945,
483 0x3F800000, 0x3CF5C28F, 0x00000000 }
486 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
487 0x44FA0000, 0x3FB2718B, 0x3F800000,
488 0xBC07010E, 0x00000000, 0x00000000 }
491 .vals = { 0x3F800000, 0x43C20000, 0x44906000,
492 0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
493 0x3F0A3D71, 0x00000000, 0x00000000 }
496 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
497 0x44FA0000, 0x3F800000, 0x3F800000,
498 0x3E4CCCCD, 0x00000000, 0x00000000 }
501 .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
502 0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
503 0x3F800000, 0x00000000, 0x00000000 }
506 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
507 0x44FA0000, 0x3F800000, 0x3F1A043C,
508 0x3F800000, 0x00000000, 0x00000000 }
531 .mid = 0x96,
538 .vals = { 0x00000000, 0x00000000, 0x00000000,
539 0x00000000, 0x00000000, 0x00000000,
540 0x00000000, 0x00000000, 0x00000000,
541 0x00000000, 0x00000000 }
544 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
545 0x40000000, 0x00000000, 0x00000000,
546 0x00000000, 0x00000000, 0x40000000,
547 0x40000000, 0x40000000 }
550 .vals = { 0x00000000, 0x00000000, 0x40C00000,
551 0x40C00000, 0x40466666, 0x00000000,
552 0x00000000, 0x00000000, 0x00000000,
553 0x40466666, 0x40466666 }
556 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
557 0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
558 0x00000000, 0x00000000, 0x40000000,
559 0x40466666, 0x40800000 }
562 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
563 0x40466666, 0x40866666, 0xBF99999A,
564 0xBF99999A, 0x00000000, 0x00000000,
565 0x40800000, 0x40800000 }
568 .vals = { 0x00000000, 0x00000000, 0x00000000,
569 0x3F8CCCCD, 0x40800000, 0x40800000,
570 0x40800000, 0x00000000, 0x3F8CCCCD,
571 0x40466666, 0x40466666 }
574 .vals = { 0x00000000, 0x00000000, 0x40000000,
575 0x40000000, 0x00000000, 0x00000000,
576 0x00000000, 0x3F8CCCCD, 0x40000000,
577 0x40000000, 0x40000000 }
580 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
581 0x40000000, 0x40000000, 0x00000000,
582 0xBF99999A, 0xBF99999A, 0x00000000,
583 0x40466666, 0x40C00000 }
586 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
587 0x3F8CCCCD, 0x40000000, 0xBF99999A,
588 0xBF99999A, 0x00000000, 0x00000000,
589 0x40800000, 0x40800000 }
592 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
593 0xBF99999A, 0x00000000, 0x40466666,
594 0x40800000, 0x40466666, 0x00000000,
595 0x00000000, 0x3F8CCCCD }
600 * DSP reqs for handling full-range speakers/bass redirection. If a speaker is
604 * enabled. X-Bass must be disabled when using these.
607 SPEAKER_BASS_REDIRECT = 0x15,
608 SPEAKER_BASS_REDIRECT_XOVER_FREQ = 0x16,
609 /* Between 0x16-0x1a are the X-Bass reqs. */
610 SPEAKER_FULL_RANGE_FRONT_L_R = 0x1a,
611 SPEAKER_FULL_RANGE_CENTER_LFE = 0x1b,
612 SPEAKER_FULL_RANGE_REAR_L_R = 0x1c,
613 SPEAKER_FULL_RANGE_SURROUND_L_R = 0x1d,
614 SPEAKER_BASS_REDIRECT_SUB_GAIN = 0x1e,
619 * module ID 0x96, the output effects module.
625 * connect software, the QUERY_SPEAKER_EQ_ADDRESS req on mid 0x80 is
635 SPEAKER_TUNING_USE_SPEAKER_EQ = 0x1f,
636 SPEAKER_TUNING_ENABLE_CENTER_EQ = 0x20,
637 SPEAKER_TUNING_FRONT_LEFT_VOL_LEVEL = 0x21,
638 SPEAKER_TUNING_FRONT_RIGHT_VOL_LEVEL = 0x22,
639 SPEAKER_TUNING_CENTER_VOL_LEVEL = 0x23,
640 SPEAKER_TUNING_LFE_VOL_LEVEL = 0x24,
641 SPEAKER_TUNING_REAR_LEFT_VOL_LEVEL = 0x25,
642 SPEAKER_TUNING_REAR_RIGHT_VOL_LEVEL = 0x26,
643 SPEAKER_TUNING_SURROUND_LEFT_VOL_LEVEL = 0x27,
644 SPEAKER_TUNING_SURROUND_RIGHT_VOL_LEVEL = 0x28,
649 SPEAKER_TUNING_FRONT_LEFT_INVERT = 0x29,
650 SPEAKER_TUNING_FRONT_RIGHT_INVERT = 0x2a,
651 SPEAKER_TUNING_CENTER_INVERT = 0x2b,
652 SPEAKER_TUNING_LFE_INVERT = 0x2c,
653 SPEAKER_TUNING_REAR_LEFT_INVERT = 0x2d,
654 SPEAKER_TUNING_REAR_RIGHT_INVERT = 0x2e,
655 SPEAKER_TUNING_SURROUND_LEFT_INVERT = 0x2f,
656 SPEAKER_TUNING_SURROUND_RIGHT_INVERT = 0x30,
658 SPEAKER_TUNING_FRONT_LEFT_DELAY = 0x31,
659 SPEAKER_TUNING_FRONT_RIGHT_DELAY = 0x32,
660 SPEAKER_TUNING_CENTER_DELAY = 0x33,
661 SPEAKER_TUNING_LFE_DELAY = 0x34,
662 SPEAKER_TUNING_REAR_LEFT_DELAY = 0x35,
663 SPEAKER_TUNING_REAR_RIGHT_DELAY = 0x36,
664 SPEAKER_TUNING_SURROUND_LEFT_DELAY = 0x37,
665 SPEAKER_TUNING_SURROUND_RIGHT_DELAY = 0x38,
667 SPEAKER_TUNING_MAIN_VOLUME = 0x39,
668 SPEAKER_TUNING_MUTE = 0x3a,
709 #define DSP_VOL_OUT 0
720 .mid = 0x32,
724 .mid = 0x37,
738 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
739 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
741 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
743 { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 } },
747 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
748 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
750 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
752 { 0x3f, 0x3f, 0x00, 0x00, 0x02, 0x00 } },
763 { .name = "Low (16-31",
764 .vals = { 0xff, 0x2c, 0xf5, 0x32 }
766 { .name = "Medium (32-149",
767 .vals = { 0x38, 0xa8, 0x3e, 0x4c }
769 { .name = "High (150-600",
770 .vals = { 0xff, 0xff, 0xff, 0x7f }
781 .val = 0xa0
784 .val = 0xc0
787 .val = 0x80
793 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
794 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
796 VENDOR_DSPIO_STATUS = 0xF01,
797 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
798 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
799 VENDOR_DSPIO_DSP_INIT = 0x703,
800 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
801 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
804 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
805 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
806 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
807 VENDOR_CHIPIO_DATA_LOW = 0x300,
808 VENDOR_CHIPIO_DATA_HIGH = 0x400,
810 VENDOR_CHIPIO_8051_WRITE_DIRECT = 0x500,
811 VENDOR_CHIPIO_8051_READ_DIRECT = 0xD00,
813 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
814 VENDOR_CHIPIO_STATUS = 0xF01,
815 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
816 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
818 VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
819 VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
820 VENDOR_CHIPIO_8051_PMEM_READ = 0xF08,
821 VENDOR_CHIPIO_8051_IRAM_WRITE = 0x709,
822 VENDOR_CHIPIO_8051_IRAM_READ = 0xF09,
824 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
825 VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
827 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
828 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
829 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
830 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
831 VENDOR_CHIPIO_FLAG_SET = 0x70F,
832 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
833 VENDOR_CHIPIO_PARAM_SET = 0x710,
834 VENDOR_CHIPIO_PARAM_GET = 0xF10,
836 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
837 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
838 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
839 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
841 VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
842 VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
843 VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
844 VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
846 VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
847 VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
848 VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
849 VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
850 VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
851 VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
853 VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
861 CONTROL_FLAG_C_MGR = 0,
866 /* Tracker for the SPDIF-in path is bypassed/enabled */
884 /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
886 /* De-emphasis filter on DAC-1 disabled/enabled */
888 /* De-emphasis filter on DAC-2 disabled/enabled */
890 /* De-emphasis filter on DAC-3 disabled/enabled */
892 /* High-pass filter on ADC_B disabled/enabled */
894 /* High-pass filter on ADC_C disabled/enabled */
918 /* 0: None, 1: Mic1In*/
920 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
931 * sense given the fact the AE-5 uses it and has the ASI flag set.
966 VENDOR_STATUS_DSPIO_OK = 0x00,
968 VENDOR_STATUS_DSPIO_BUSY = 0x01,
970 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
972 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
980 VENDOR_STATUS_CHIPIO_OK = 0x00,
982 VENDOR_STATUS_CHIPIO_BUSY = 0x01
989 SR_6_000 = 0x00,
990 SR_8_000 = 0x01,
991 SR_9_600 = 0x02,
992 SR_11_025 = 0x03,
993 SR_16_000 = 0x04,
994 SR_22_050 = 0x05,
995 SR_24_000 = 0x06,
996 SR_32_000 = 0x07,
997 SR_44_100 = 0x08,
998 SR_48_000 = 0x09,
999 SR_88_200 = 0x0A,
1000 SR_96_000 = 0x0B,
1001 SR_144_000 = 0x0C,
1002 SR_176_400 = 0x0D,
1003 SR_192_000 = 0x0E,
1004 SR_384_000 = 0x0F,
1006 SR_COUNT = 0x10,
1008 SR_RATE_UNKNOWN = 0x1F
1012 DSP_DOWNLOAD_FAILED = -1,
1013 DSP_DOWNLOAD_INIT = 0,
1019 #define get_hdafmt_chs(fmt) (fmt & 0xf)
1020 #define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7)
1021 #define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f)
1022 #define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
1095 /* AE-5 Control values */
1101 struct hda_codec *codec; member
1110 * AE-5 all use PCI region 2 to toggle GPIO and other currently unknown
1148 #define ca0132_quirk(spec) ((spec)->quirk)
1149 #define ca0132_use_pci_mmio(spec) ((spec)->use_pci_mmio)
1150 #define ca0132_use_alt_functions(spec) ((spec)->use_alt_functions)
1151 #define ca0132_use_alt_controls(spec) ((spec)->use_alt_controls)
1160 { 0x0b, 0x90170110 }, /* Builtin Speaker */
1161 { 0x0c, 0x411111f0 }, /* N/A */
1162 { 0x0d, 0x411111f0 }, /* N/A */
1163 { 0x0e, 0x411111f0 }, /* N/A */
1164 { 0x0f, 0x0321101f }, /* HP */
1165 { 0x10, 0x411111f0 }, /* Headset? disabled for now */
1166 { 0x11, 0x03a11021 }, /* Mic */
1167 { 0x12, 0xd5a30140 }, /* Builtin Mic */
1168 { 0x13, 0x411111f0 }, /* N/A */
1169 { 0x18, 0x411111f0 }, /* N/A */
1175 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1176 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1177 { 0x0d, 0x014510f0 }, /* Digital Out */
1178 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1179 { 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1180 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1181 { 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1182 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1183 { 0x13, 0x908700f0 }, /* What U Hear In*/
1184 { 0x18, 0x50d000f0 }, /* N/A */
1190 { 0x0b, 0x01047110 }, /* Port G -- Lineout FRONT L/R */
1191 { 0x0c, 0x414510f0 }, /* SPDIF Out 1 - Disabled*/
1192 { 0x0d, 0x014510f0 }, /* Digital Out */
1193 { 0x0e, 0x41c520f0 }, /* SPDIF In - Disabled*/
1194 { 0x0f, 0x0122711f }, /* Port A -- BackPanel HP */
1195 { 0x10, 0x01017111 }, /* Port D -- Center/LFE */
1196 { 0x11, 0x01017114 }, /* Port B -- LineMicIn2 / Rear L/R */
1197 { 0x12, 0x01a271f0 }, /* Port C -- LineIn1 */
1198 { 0x13, 0x908700f0 }, /* What U Hear In*/
1199 { 0x18, 0x50d000f0 }, /* N/A */
1205 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1206 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1207 { 0x0d, 0x014510f0 }, /* Digital Out */
1208 { 0x0e, 0x01c520f0 }, /* SPDIF In */
1209 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1210 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1211 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1212 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1213 { 0x13, 0x908700f0 }, /* What U Hear In*/
1214 { 0x18, 0x50d000f0 }, /* N/A */
1218 /* Sound Blaster AE-5 pin configs taken from Windows Driver */
1220 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1221 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1222 { 0x0d, 0x014510f0 }, /* Digital Out */
1223 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1224 { 0x0f, 0x01017114 }, /* Port A -- Rear L/R. */
1225 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1226 { 0x11, 0x012170ff }, /* Port B -- LineMicIn2 / Rear Headphone */
1227 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1228 { 0x13, 0x908700f0 }, /* What U Hear In*/
1229 { 0x18, 0x50d000f0 }, /* N/A */
1235 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1236 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1237 { 0x0d, 0x014510f0 }, /* Digital Out */
1238 { 0x0e, 0x41c520f0 }, /* SPDIF In */
1239 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1240 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1241 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1242 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1243 { 0x13, 0x908700f0 }, /* What U Hear In*/
1244 { 0x18, 0x500000f0 }, /* N/A */
1249 { 0x0b, 0x01017010 },
1250 { 0x0c, 0x014510f0 },
1251 { 0x0d, 0x414510f0 },
1252 { 0x0e, 0x01c520f0 },
1253 { 0x0f, 0x01017114 },
1254 { 0x10, 0x01017011 },
1255 { 0x11, 0x018170ff },
1256 { 0x12, 0x01a170f0 },
1257 { 0x13, 0x908700f0 },
1258 { 0x18, 0x500000f0 },
1263 SND_PCI_QUIRK(0x1028, 0x057b, "Alienware M17x R4", QUIRK_ALIENWARE_M17XR4),
1264 SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1265 SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1266 SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1267 SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1268 SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1269 SND_PCI_QUIRK(0x1102, 0x0027, "Sound Blaster Z", QUIRK_SBZ),
1270 SND_PCI_QUIRK(0x1102, 0x0033, "Sound Blaster ZxR", QUIRK_SBZ),
1271 SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1272 SND_PCI_QUIRK(0x1458, 0xA026, "Gigabyte G1.Sniper Z97", QUIRK_R3DI),
1273 SND_PCI_QUIRK(0x1458, 0xA036, "Gigabyte GA-Z170X-Gaming 7", QUIRK_R3DI),
1274 SND_PCI_QUIRK(0x3842, 0x1038, "EVGA X99 Classified", QUIRK_R3DI),
1275 SND_PCI_QUIRK(0x1102, 0x0013, "Recon3D", QUIRK_R3D),
1276 SND_PCI_QUIRK(0x1102, 0x0018, "Recon3D", QUIRK_R3D),
1277 SND_PCI_QUIRK(0x1102, 0x0051, "Sound Blaster AE-5", QUIRK_AE5),
1278 SND_PCI_QUIRK(0x1102, 0x0191, "Sound Blaster AE-5 Plus", QUIRK_AE5),
1279 SND_PCI_QUIRK(0x1102, 0x0081, "Sound Blaster AE-7", QUIRK_AE7),
1287 unsigned int dac2port; /* ParamID 0x0d value. */
1322 { .dac2port = 0x24,
1326 .mmio_gpio_count = 0,
1327 .scp_cmds_count = 0,
1331 { .dac2port = 0x21,
1334 .hda_gpio_set = 0,
1335 .mmio_gpio_count = 0,
1336 .scp_cmds_count = 0,
1345 { .dac2port = 0x24,
1350 .scp_cmds_count = 0,
1354 { .dac2port = 0x21,
1358 .mmio_gpio_set = { 0 },
1359 .scp_cmds_count = 0,
1368 { .dac2port = 0x18,
1372 .mmio_gpio_set = { 0, 1, 1 },
1373 .scp_cmds_count = 0,
1376 { .dac2port = 0x12,
1380 .mmio_gpio_set = { 1, 1, 0 },
1381 .scp_cmds_count = 0,
1390 { .dac2port = 0x24,
1394 .mmio_gpio_set = { 1, 1, 0 },
1395 .scp_cmds_count = 0,
1399 { .dac2port = 0x21,
1403 .mmio_gpio_set = { 0, 1, 1 },
1404 .scp_cmds_count = 0,
1413 { .dac2port = 0xa4,
1415 .mmio_gpio_count = 0,
1417 .scp_cmd_mid = { 0x96, 0x96 },
1422 .chipio_write_addr = 0x0018b03c,
1423 .chipio_write_data = 0x00000012
1426 { .dac2port = 0xa1,
1428 .mmio_gpio_count = 0,
1430 .scp_cmd_mid = { 0x96, 0x96 },
1435 .chipio_write_addr = 0x0018b03c,
1436 .chipio_write_data = 0x00000012
1444 { .dac2port = 0x58,
1447 .mmio_gpio_pin = { 0 },
1450 .scp_cmd_mid = { 0x96, 0x96 },
1455 .chipio_write_addr = 0x0018b03c,
1456 .chipio_write_data = 0x00000000
1459 { .dac2port = 0x58,
1462 .mmio_gpio_pin = { 0 },
1465 .scp_cmd_mid = { 0x96, 0x96 },
1470 .chipio_write_addr = 0x0018b03c,
1471 .chipio_write_data = 0x00000010
1477 * CA0132 codec access
1479 static unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid, in codec_send_command() argument
1483 response = snd_hda_codec_read(codec, nid, 0, verb, parm); in codec_send_command()
1486 return ((response == -1) ? -1 : 0); in codec_send_command()
1489 static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid, in codec_set_converter_format() argument
1492 return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT, in codec_set_converter_format()
1493 converter_format & 0xffff, res); in codec_set_converter_format()
1496 static int codec_set_converter_stream_channel(struct hda_codec *codec, in codec_set_converter_stream_channel() argument
1500 unsigned char converter_stream_channel = 0; in codec_set_converter_stream_channel()
1502 converter_stream_channel = (stream << 4) | (channel & 0x0f); in codec_set_converter_stream_channel()
1503 return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID, in codec_set_converter_stream_channel()
1508 static int chipio_send(struct hda_codec *codec, in chipio_send() argument
1517 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_send()
1520 return 0; in chipio_send()
1524 return -EIO; in chipio_send()
1528 * Write chip address through the vendor widget -- NOT protected by the Mutex!
1530 static int chipio_write_address(struct hda_codec *codec, in chipio_write_address() argument
1533 struct ca0132_spec *spec = codec->spec; in chipio_write_address()
1536 if (spec->curr_chip_addx == chip_addx) in chipio_write_address()
1537 return 0; in chipio_write_address()
1540 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW, in chipio_write_address()
1541 chip_addx & 0xffff); in chipio_write_address()
1543 if (res != -EIO) { in chipio_write_address()
1545 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH, in chipio_write_address()
1549 spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx; in chipio_write_address()
1555 * Write data through the vendor widget -- NOT protected by the Mutex!
1557 static int chipio_write_data(struct hda_codec *codec, unsigned int data) in chipio_write_data() argument
1559 struct ca0132_spec *spec = codec->spec; in chipio_write_data()
1563 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); in chipio_write_data()
1565 if (res != -EIO) { in chipio_write_data()
1567 res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH, in chipio_write_data()
1573 spec->curr_chip_addx = (res != -EIO) ? in chipio_write_data()
1574 (spec->curr_chip_addx + 4) : ~0U; in chipio_write_data()
1579 * Write multiple data through the vendor widget -- NOT protected by the Mutex!
1581 static int chipio_write_data_multiple(struct hda_codec *codec, in chipio_write_data_multiple() argument
1585 int status = 0; in chipio_write_data_multiple()
1588 codec_dbg(codec, "chipio_write_data null ptr\n"); in chipio_write_data_multiple()
1589 return -EINVAL; in chipio_write_data_multiple()
1592 while ((count-- != 0) && (status == 0)) in chipio_write_data_multiple()
1593 status = chipio_write_data(codec, *data++); in chipio_write_data_multiple()
1600 * Read data through the vendor widget -- NOT protected by the Mutex!
1602 static int chipio_read_data(struct hda_codec *codec, unsigned int *data) in chipio_read_data() argument
1604 struct ca0132_spec *spec = codec->spec; in chipio_read_data()
1608 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); in chipio_read_data()
1610 if (res != -EIO) { in chipio_read_data()
1612 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in chipio_read_data()
1615 if (res != -EIO) { in chipio_read_data()
1617 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_read_data()
1619 0); in chipio_read_data()
1624 spec->curr_chip_addx = (res != -EIO) ? in chipio_read_data()
1625 (spec->curr_chip_addx + 4) : ~0U; in chipio_read_data()
1633 static int chipio_write(struct hda_codec *codec, in chipio_write() argument
1636 struct ca0132_spec *spec = codec->spec; in chipio_write()
1639 mutex_lock(&spec->chipio_mutex); in chipio_write()
1642 err = chipio_write_address(codec, chip_addx); in chipio_write()
1643 if (err < 0) in chipio_write()
1646 err = chipio_write_data(codec, data); in chipio_write()
1647 if (err < 0) in chipio_write()
1651 mutex_unlock(&spec->chipio_mutex); in chipio_write()
1659 static int chipio_write_no_mutex(struct hda_codec *codec, in chipio_write_no_mutex() argument
1666 err = chipio_write_address(codec, chip_addx); in chipio_write_no_mutex()
1667 if (err < 0) in chipio_write_no_mutex()
1670 err = chipio_write_data(codec, data); in chipio_write_no_mutex()
1671 if (err < 0) in chipio_write_no_mutex()
1682 static int chipio_write_multiple(struct hda_codec *codec, in chipio_write_multiple() argument
1687 struct ca0132_spec *spec = codec->spec; in chipio_write_multiple()
1690 mutex_lock(&spec->chipio_mutex); in chipio_write_multiple()
1691 status = chipio_write_address(codec, chip_addx); in chipio_write_multiple()
1692 if (status < 0) in chipio_write_multiple()
1695 status = chipio_write_data_multiple(codec, data, count); in chipio_write_multiple()
1697 mutex_unlock(&spec->chipio_mutex); in chipio_write_multiple()
1706 static int chipio_read(struct hda_codec *codec, in chipio_read() argument
1709 struct ca0132_spec *spec = codec->spec; in chipio_read()
1712 mutex_lock(&spec->chipio_mutex); in chipio_read()
1715 err = chipio_write_address(codec, chip_addx); in chipio_read()
1716 if (err < 0) in chipio_read()
1719 err = chipio_read_data(codec, data); in chipio_read()
1720 if (err < 0) in chipio_read()
1724 mutex_unlock(&spec->chipio_mutex); in chipio_read()
1731 static void chipio_set_control_flag(struct hda_codec *codec, in chipio_set_control_flag() argument
1738 flag_bit = (flag_state ? 1 : 0); in chipio_set_control_flag()
1740 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_flag()
1747 static void chipio_set_control_param(struct hda_codec *codec, in chipio_set_control_param() argument
1750 struct ca0132_spec *spec = codec->spec; in chipio_set_control_param()
1755 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1758 mutex_lock(&spec->chipio_mutex); in chipio_set_control_param()
1759 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param()
1760 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1763 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1767 mutex_unlock(&spec->chipio_mutex); in chipio_set_control_param()
1774 static void chipio_set_control_param_no_mutex(struct hda_codec *codec, in chipio_set_control_param_no_mutex() argument
1781 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1784 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param_no_mutex()
1785 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1788 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1798 static void chipio_set_stream_source_dest(struct hda_codec *codec, in chipio_set_stream_source_dest() argument
1801 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1803 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1805 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1812 static void chipio_set_stream_channels(struct hda_codec *codec, in chipio_set_stream_channels() argument
1815 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_channels()
1817 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_channels()
1824 static void chipio_set_stream_control(struct hda_codec *codec, in chipio_set_stream_control() argument
1827 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_control()
1829 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_control()
1837 static void chipio_set_conn_rate_no_mutex(struct hda_codec *codec, in chipio_set_conn_rate_no_mutex() argument
1840 chipio_set_control_param_no_mutex(codec, in chipio_set_conn_rate_no_mutex()
1842 chipio_set_control_param_no_mutex(codec, in chipio_set_conn_rate_no_mutex()
1849 static void chipio_set_conn_rate(struct hda_codec *codec, in chipio_set_conn_rate() argument
1852 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid); in chipio_set_conn_rate()
1853 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE, in chipio_set_conn_rate()
1860 * 0x80-0xFF.
1862 static void chipio_8051_write_direct(struct hda_codec *codec, in chipio_8051_write_direct() argument
1868 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr); in chipio_8051_write_direct()
1874 static void chipio_enable_clocks(struct hda_codec *codec) in chipio_enable_clocks() argument
1876 struct ca0132_spec *spec = codec->spec; in chipio_enable_clocks()
1878 mutex_lock(&spec->chipio_mutex); in chipio_enable_clocks()
1879 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1880 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0); in chipio_enable_clocks()
1881 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1882 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); in chipio_enable_clocks()
1883 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1885 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1886 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x0b); in chipio_enable_clocks()
1887 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1889 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1890 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); in chipio_enable_clocks()
1891 mutex_unlock(&spec->chipio_mutex); in chipio_enable_clocks()
1897 static int dspio_send(struct hda_codec *codec, unsigned int reg, in dspio_send() argument
1905 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data); in dspio_send()
1906 if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY)) in dspio_send()
1911 return -EIO; in dspio_send()
1917 static void dspio_write_wait(struct hda_codec *codec) in dspio_write_wait() argument
1923 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write_wait()
1924 VENDOR_DSPIO_STATUS, 0); in dspio_write_wait()
1935 static int dspio_write(struct hda_codec *codec, unsigned int scp_data) in dspio_write() argument
1937 struct ca0132_spec *spec = codec->spec; in dspio_write()
1940 dspio_write_wait(codec); in dspio_write()
1942 mutex_lock(&spec->chipio_mutex); in dspio_write()
1943 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW, in dspio_write()
1944 scp_data & 0xffff); in dspio_write()
1945 if (status < 0) in dspio_write()
1948 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH, in dspio_write()
1950 if (status < 0) in dspio_write()
1954 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write()
1955 VENDOR_DSPIO_STATUS, 0); in dspio_write()
1957 mutex_unlock(&spec->chipio_mutex); in dspio_write()
1960 -EIO : 0; in dspio_write()
1966 static int dspio_write_multiple(struct hda_codec *codec, in dspio_write_multiple() argument
1969 int status = 0; in dspio_write_multiple()
1973 return -EINVAL; in dspio_write_multiple()
1975 count = 0; in dspio_write_multiple()
1977 status = dspio_write(codec, *buffer++); in dspio_write_multiple()
1978 if (status != 0) in dspio_write_multiple()
1986 static int dspio_read(struct hda_codec *codec, unsigned int *data) in dspio_read() argument
1990 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0); in dspio_read()
1991 if (status == -EIO) in dspio_read()
1994 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0); in dspio_read()
1995 if (status == -EIO || in dspio_read()
1997 return -EIO; in dspio_read()
1999 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_read()
2000 VENDOR_DSPIO_SCP_READ_DATA, 0); in dspio_read()
2002 return 0; in dspio_read()
2005 static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer, in dspio_read_multiple() argument
2008 int status = 0; in dspio_read_multiple()
2015 return -1; in dspio_read_multiple()
2017 count = 0; in dspio_read_multiple()
2019 status = dspio_read(codec, buffer++); in dspio_read_multiple()
2020 if (status != 0) in dspio_read_multiple()
2026 if (status == 0) { in dspio_read_multiple()
2028 status = dspio_read(codec, &dummy); in dspio_read_multiple()
2029 if (status != 0) in dspio_read_multiple()
2048 unsigned int header = 0; in make_scp_header()
2050 header = (data_size & 0x1f) << 27; in make_scp_header()
2051 header |= (error_flag & 0x01) << 26; in make_scp_header()
2052 header |= (resp_flag & 0x01) << 25; in make_scp_header()
2053 header |= (device_flag & 0x01) << 24; in make_scp_header()
2054 header |= (req & 0x7f) << 17; in make_scp_header()
2055 header |= (get_flag & 0x01) << 16; in make_scp_header()
2056 header |= (source_id & 0xff) << 8; in make_scp_header()
2057 header |= target_id & 0xff; in make_scp_header()
2073 *data_size = (header >> 27) & 0x1f; in extract_scp_header()
2075 *error_flag = (header >> 26) & 0x01; in extract_scp_header()
2077 *resp_flag = (header >> 25) & 0x01; in extract_scp_header()
2079 *device_flag = (header >> 24) & 0x01; in extract_scp_header()
2081 *req = (header >> 17) & 0x7f; in extract_scp_header()
2083 *get_flag = (header >> 16) & 0x01; in extract_scp_header()
2085 *source_id = (header >> 8) & 0xff; in extract_scp_header()
2087 *target_id = header & 0xff; in extract_scp_header()
2098 static void dspio_clear_response_queue(struct hda_codec *codec) in dspio_clear_response_queue() argument
2101 unsigned int dummy = 0; in dspio_clear_response_queue()
2106 status = dspio_read(codec, &dummy); in dspio_clear_response_queue()
2107 } while (status == 0 && time_before(jiffies, timeout)); in dspio_clear_response_queue()
2110 static int dspio_get_response_data(struct hda_codec *codec) in dspio_get_response_data() argument
2112 struct ca0132_spec *spec = codec->spec; in dspio_get_response_data()
2113 unsigned int data = 0; in dspio_get_response_data()
2116 if (dspio_read(codec, &data) < 0) in dspio_get_response_data()
2117 return -EIO; in dspio_get_response_data()
2119 if ((data & 0x00ffffff) == spec->wait_scp_header) { in dspio_get_response_data()
2120 spec->scp_resp_header = data; in dspio_get_response_data()
2121 spec->scp_resp_count = data >> 27; in dspio_get_response_data()
2122 count = spec->wait_num_data; in dspio_get_response_data()
2123 dspio_read_multiple(codec, spec->scp_resp_data, in dspio_get_response_data()
2124 &spec->scp_resp_count, count); in dspio_get_response_data()
2125 return 0; in dspio_get_response_data()
2128 return -EIO; in dspio_get_response_data()
2134 static int dspio_send_scp_message(struct hda_codec *codec, in dspio_send_scp_message() argument
2141 struct ca0132_spec *spec = codec->spec; in dspio_send_scp_message()
2142 int status = -1; in dspio_send_scp_message()
2143 unsigned int scp_send_size = 0; in dspio_send_scp_message()
2152 *bytes_returned = 0; in dspio_send_scp_message()
2162 return -EINVAL; in dspio_send_scp_message()
2166 return -EINVAL; in dspio_send_scp_message()
2168 spec->wait_scp_header = *((unsigned int *)send_buf); in dspio_send_scp_message()
2173 spec->wait_scp_header &= 0xffff0000; in dspio_send_scp_message()
2174 spec->wait_scp_header |= (resp_src_id << 8) | (resp_target_id); in dspio_send_scp_message()
2175 spec->wait_num_data = return_buf_size/sizeof(unsigned int) - 1; in dspio_send_scp_message()
2176 spec->wait_scp = 1; in dspio_send_scp_message()
2180 status = dspio_write_multiple(codec, (unsigned int *)send_buf, in dspio_send_scp_message()
2182 if (status < 0) { in dspio_send_scp_message()
2183 spec->wait_scp = 0; in dspio_send_scp_message()
2189 memset(return_buf, 0, return_buf_size); in dspio_send_scp_message()
2192 } while (spec->wait_scp && time_before(jiffies, timeout)); in dspio_send_scp_message()
2194 if (!spec->wait_scp) { in dspio_send_scp_message()
2196 memcpy(&ret_msg->hdr, &spec->scp_resp_header, 4); in dspio_send_scp_message()
2197 memcpy(&ret_msg->data, spec->scp_resp_data, in dspio_send_scp_message()
2198 spec->wait_num_data); in dspio_send_scp_message()
2199 *bytes_returned = (spec->scp_resp_count + 1) * 4; in dspio_send_scp_message()
2200 status = 0; in dspio_send_scp_message()
2202 status = -EIO; in dspio_send_scp_message()
2204 spec->wait_scp = 0; in dspio_send_scp_message()
2212 * @codec: the HDA codec
2224 static int dspio_scp(struct hda_codec *codec, in dspio_scp() argument
2228 int status = 0; in dspio_scp()
2234 memset(&scp_send, 0, sizeof(scp_send)); in dspio_scp()
2235 memset(&scp_reply, 0, sizeof(scp_reply)); in dspio_scp()
2237 if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS)) in dspio_scp()
2238 return -EINVAL; in dspio_scp()
2241 codec_dbg(codec, "dspio_scp get but has no buffer\n"); in dspio_scp()
2242 return -EINVAL; in dspio_scp()
2245 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { in dspio_scp()
2246 codec_dbg(codec, "dspio_scp bad resp buf len parms\n"); in dspio_scp()
2247 return -EINVAL; in dspio_scp()
2251 0, 0, 0, len/sizeof(unsigned int)); in dspio_scp()
2252 if (data != NULL && len > 0) { in dspio_scp()
2257 ret_bytes = 0; in dspio_scp()
2259 status = dspio_send_scp_message(codec, (unsigned char *)&scp_send, in dspio_scp()
2263 if (status < 0) { in dspio_scp()
2264 codec_dbg(codec, "dspio_scp: send scp msg failed\n"); in dspio_scp()
2276 return 0; in dspio_scp()
2279 ret_size = (ret_bytes - sizeof(scp_reply.hdr)) in dspio_scp()
2283 codec_dbg(codec, "reply too long for buf\n"); in dspio_scp()
2284 return -EINVAL; in dspio_scp()
2286 codec_dbg(codec, "RetLen and HdrLen .NE.\n"); in dspio_scp()
2287 return -EINVAL; in dspio_scp()
2289 codec_dbg(codec, "NULL reply\n"); in dspio_scp()
2290 return -EINVAL; in dspio_scp()
2296 codec_dbg(codec, "reply ill-formed or errflag set\n"); in dspio_scp()
2297 return -EIO; in dspio_scp()
2306 static int dspio_set_param(struct hda_codec *codec, int mod_id, in dspio_set_param() argument
2309 return dspio_scp(codec, mod_id, src_id, req, SCP_SET, data, len, NULL, in dspio_set_param()
2313 static int dspio_set_uint_param(struct hda_codec *codec, int mod_id, in dspio_set_uint_param() argument
2316 return dspio_set_param(codec, mod_id, 0x20, req, &data, in dspio_set_uint_param()
2320 static int dspio_set_uint_param_no_source(struct hda_codec *codec, int mod_id, in dspio_set_uint_param_no_source() argument
2323 return dspio_set_param(codec, mod_id, 0x00, req, &data, in dspio_set_uint_param_no_source()
2330 static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan) in dspio_alloc_dma_chan() argument
2332 int status = 0; in dspio_alloc_dma_chan()
2335 codec_dbg(codec, " dspio_alloc_dma_chan() -- begin\n"); in dspio_alloc_dma_chan()
2336 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_alloc_dma_chan()
2337 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0, in dspio_alloc_dma_chan()
2340 if (status < 0) { in dspio_alloc_dma_chan()
2341 codec_dbg(codec, "dspio_alloc_dma_chan: SCP Failed\n"); in dspio_alloc_dma_chan()
2345 if ((*dma_chan + 1) == 0) { in dspio_alloc_dma_chan()
2346 codec_dbg(codec, "no free dma channels to allocate\n"); in dspio_alloc_dma_chan()
2347 return -EBUSY; in dspio_alloc_dma_chan()
2350 codec_dbg(codec, "dspio_alloc_dma_chan: chan=%d\n", *dma_chan); in dspio_alloc_dma_chan()
2351 codec_dbg(codec, " dspio_alloc_dma_chan() -- complete\n"); in dspio_alloc_dma_chan()
2359 static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan) in dspio_free_dma_chan() argument
2361 int status = 0; in dspio_free_dma_chan()
2362 unsigned int dummy = 0; in dspio_free_dma_chan()
2364 codec_dbg(codec, " dspio_free_dma_chan() -- begin\n"); in dspio_free_dma_chan()
2365 codec_dbg(codec, "dspio_free_dma_chan: chan=%d\n", dma_chan); in dspio_free_dma_chan()
2367 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_free_dma_chan()
2371 if (status < 0) { in dspio_free_dma_chan()
2372 codec_dbg(codec, "dspio_free_dma_chan: SCP Failed\n"); in dspio_free_dma_chan()
2376 codec_dbg(codec, " dspio_free_dma_chan() -- complete\n"); in dspio_free_dma_chan()
2384 static int dsp_set_run_state(struct hda_codec *codec) in dsp_set_run_state() argument
2390 err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg); in dsp_set_run_state()
2391 if (err < 0) in dsp_set_run_state()
2397 if (halt_state != 0) { in dsp_set_run_state()
2400 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, in dsp_set_run_state()
2402 if (err < 0) in dsp_set_run_state()
2407 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, in dsp_set_run_state()
2409 if (err < 0) in dsp_set_run_state()
2413 return 0; in dsp_set_run_state()
2419 static int dsp_reset(struct hda_codec *codec) in dsp_reset() argument
2424 codec_dbg(codec, "dsp_reset\n"); in dsp_reset()
2426 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); in dsp_reset()
2427 retry--; in dsp_reset()
2428 } while (res == -EIO && retry); in dsp_reset()
2431 codec_dbg(codec, "dsp_reset timeout\n"); in dsp_reset()
2432 return -EIO; in dsp_reset()
2435 return 0; in dsp_reset()
2462 static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan) in dsp_is_dma_active() argument
2466 chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg); in dsp_is_dma_active()
2469 (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0); in dsp_is_dma_active()
2472 static int dsp_dma_setup_common(struct hda_codec *codec, in dsp_dma_setup_common() argument
2478 int status = 0; in dsp_dma_setup_common()
2484 codec_dbg(codec, "-- dsp_dma_setup_common() -- Begin ---------\n"); in dsp_dma_setup_common()
2487 codec_dbg(codec, "dma chan num invalid\n"); in dsp_dma_setup_common()
2488 return -EINVAL; in dsp_dma_setup_common()
2491 if (dsp_is_dma_active(codec, dma_chan)) { in dsp_dma_setup_common()
2492 codec_dbg(codec, "dma already active\n"); in dsp_dma_setup_common()
2493 return -EBUSY; in dsp_dma_setup_common()
2499 codec_dbg(codec, "invalid chip addr\n"); in dsp_dma_setup_common()
2500 return -ENXIO; in dsp_dma_setup_common()
2504 active = 0; in dsp_dma_setup_common()
2506 codec_dbg(codec, " dsp_dma_setup_common() start reg pgm\n"); in dsp_dma_setup_common()
2509 status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET, in dsp_dma_setup_common()
2512 if (status < 0) { in dsp_dma_setup_common()
2513 codec_dbg(codec, "read CHNLPROP Reg fail\n"); in dsp_dma_setup_common()
2516 codec_dbg(codec, "dsp_dma_setup_common() Read CHNLPROP\n"); in dsp_dma_setup_common()
2526 status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop); in dsp_dma_setup_common()
2527 if (status < 0) { in dsp_dma_setup_common()
2528 codec_dbg(codec, "write CHNLPROP Reg fail\n"); in dsp_dma_setup_common()
2531 codec_dbg(codec, " dsp_dma_setup_common() Write CHNLPROP\n"); in dsp_dma_setup_common()
2534 status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET, in dsp_dma_setup_common()
2537 if (status < 0) { in dsp_dma_setup_common()
2538 codec_dbg(codec, "read ACTIVE Reg fail\n"); in dsp_dma_setup_common()
2541 codec_dbg(codec, "dsp_dma_setup_common() Read ACTIVE\n"); in dsp_dma_setup_common()
2547 status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active); in dsp_dma_setup_common()
2548 if (status < 0) { in dsp_dma_setup_common()
2549 codec_dbg(codec, "write ACTIVE Reg fail\n"); in dsp_dma_setup_common()
2553 codec_dbg(codec, " dsp_dma_setup_common() Write ACTIVE\n"); in dsp_dma_setup_common()
2555 status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan), in dsp_dma_setup_common()
2557 if (status < 0) { in dsp_dma_setup_common()
2558 codec_dbg(codec, "write AUDCHSEL Reg fail\n"); in dsp_dma_setup_common()
2561 codec_dbg(codec, " dsp_dma_setup_common() Write AUDCHSEL\n"); in dsp_dma_setup_common()
2563 status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan), in dsp_dma_setup_common()
2565 if (status < 0) { in dsp_dma_setup_common()
2566 codec_dbg(codec, "write IRQCNT Reg fail\n"); in dsp_dma_setup_common()
2569 codec_dbg(codec, " dsp_dma_setup_common() Write IRQCNT\n"); in dsp_dma_setup_common()
2571 codec_dbg(codec, in dsp_dma_setup_common()
2572 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " in dsp_dma_setup_common()
2573 "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", in dsp_dma_setup_common()
2577 codec_dbg(codec, "-- dsp_dma_setup_common() -- Complete ------\n"); in dsp_dma_setup_common()
2579 return 0; in dsp_dma_setup_common()
2583 * Setup the DSP DMA per-transfer-specific registers
2585 static int dsp_dma_setup(struct hda_codec *codec, in dsp_dma_setup() argument
2590 int status = 0; in dsp_dma_setup()
2597 unsigned int dma_cfg = 0; in dsp_dma_setup()
2598 unsigned int adr_ofs = 0; in dsp_dma_setup()
2599 unsigned int xfr_cnt = 0; in dsp_dma_setup()
2600 const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT - in dsp_dma_setup()
2603 codec_dbg(codec, "-- dsp_dma_setup() -- Begin ---------\n"); in dsp_dma_setup()
2606 codec_dbg(codec, "count too big\n"); in dsp_dma_setup()
2607 return -EINVAL; in dsp_dma_setup()
2612 codec_dbg(codec, "invalid chip addr\n"); in dsp_dma_setup()
2613 return -ENXIO; in dsp_dma_setup()
2616 codec_dbg(codec, " dsp_dma_setup() start reg pgm\n"); in dsp_dma_setup()
2619 incr_field = 0; in dsp_dma_setup()
2630 status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan), in dsp_dma_setup()
2632 if (status < 0) { in dsp_dma_setup()
2633 codec_dbg(codec, "write DMACFG Reg fail\n"); in dsp_dma_setup()
2636 codec_dbg(codec, " dsp_dma_setup() Write DMACFG\n"); in dsp_dma_setup()
2638 adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT + in dsp_dma_setup()
2639 (code ? 0 : 1)); in dsp_dma_setup()
2641 status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan), in dsp_dma_setup()
2643 if (status < 0) { in dsp_dma_setup()
2644 codec_dbg(codec, "write DSPADROFS Reg fail\n"); in dsp_dma_setup()
2647 codec_dbg(codec, " dsp_dma_setup() Write DSPADROFS\n"); in dsp_dma_setup()
2649 base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT; in dsp_dma_setup()
2651 cur_cnt = (count - 1) << DSPDMAC_XFRCNT_CCNT_LOBIT; in dsp_dma_setup()
2655 status = chipio_write(codec, in dsp_dma_setup()
2657 if (status < 0) { in dsp_dma_setup()
2658 codec_dbg(codec, "write XFRCNT Reg fail\n"); in dsp_dma_setup()
2661 codec_dbg(codec, " dsp_dma_setup() Write XFRCNT\n"); in dsp_dma_setup()
2663 codec_dbg(codec, in dsp_dma_setup()
2664 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " in dsp_dma_setup()
2665 "ADROFS=0x%x, XFRCNT=0x%x\n", in dsp_dma_setup()
2668 codec_dbg(codec, "-- dsp_dma_setup() -- Complete ---------\n"); in dsp_dma_setup()
2670 return 0; in dsp_dma_setup()
2676 static int dsp_dma_start(struct hda_codec *codec, in dsp_dma_start() argument
2679 unsigned int reg = 0; in dsp_dma_start()
2680 int status = 0; in dsp_dma_start()
2682 codec_dbg(codec, "-- dsp_dma_start() -- Begin ---------\n"); in dsp_dma_start()
2685 status = chipio_read(codec, in dsp_dma_start()
2688 if (status < 0) { in dsp_dma_start()
2689 codec_dbg(codec, "read CHNLSTART reg fail\n"); in dsp_dma_start()
2692 codec_dbg(codec, "-- dsp_dma_start() Read CHNLSTART\n"); in dsp_dma_start()
2698 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, in dsp_dma_start()
2700 if (status < 0) { in dsp_dma_start()
2701 codec_dbg(codec, "write CHNLSTART reg fail\n"); in dsp_dma_start()
2704 codec_dbg(codec, "-- dsp_dma_start() -- Complete ---------\n"); in dsp_dma_start()
2712 static int dsp_dma_stop(struct hda_codec *codec, in dsp_dma_stop() argument
2715 unsigned int reg = 0; in dsp_dma_stop()
2716 int status = 0; in dsp_dma_stop()
2718 codec_dbg(codec, "-- dsp_dma_stop() -- Begin ---------\n"); in dsp_dma_stop()
2721 status = chipio_read(codec, in dsp_dma_stop()
2724 if (status < 0) { in dsp_dma_stop()
2725 codec_dbg(codec, "read CHNLSTART reg fail\n"); in dsp_dma_stop()
2728 codec_dbg(codec, "-- dsp_dma_stop() Read CHNLSTART\n"); in dsp_dma_stop()
2733 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, in dsp_dma_stop()
2735 if (status < 0) { in dsp_dma_stop()
2736 codec_dbg(codec, "write CHNLSTART reg fail\n"); in dsp_dma_stop()
2739 codec_dbg(codec, "-- dsp_dma_stop() -- Complete ---------\n"); in dsp_dma_stop()
2747 * @codec: the HDA codec
2755 static int dsp_allocate_router_ports(struct hda_codec *codec, in dsp_allocate_router_ports() argument
2761 int status = 0; in dsp_allocate_router_ports()
2765 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2766 if (status < 0) in dsp_allocate_router_ports()
2770 val |= (ports_per_channel - 1) << 4; in dsp_allocate_router_ports()
2771 val |= num_chans - 1; in dsp_allocate_router_ports()
2773 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2777 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2781 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2782 if (status < 0) in dsp_allocate_router_ports()
2785 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2786 VENDOR_CHIPIO_PORT_ALLOC_GET, 0); in dsp_allocate_router_ports()
2790 return (res < 0) ? res : 0; in dsp_allocate_router_ports()
2796 static int dsp_free_router_ports(struct hda_codec *codec) in dsp_free_router_ports() argument
2798 int status = 0; in dsp_free_router_ports()
2800 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2801 if (status < 0) in dsp_free_router_ports()
2804 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_free_router_ports()
2808 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2816 static int dsp_allocate_ports(struct hda_codec *codec, in dsp_allocate_ports() argument
2822 codec_dbg(codec, " dsp_allocate_ports() -- begin\n"); in dsp_allocate_ports()
2825 codec_dbg(codec, "bad rate multiple\n"); in dsp_allocate_ports()
2826 return -EINVAL; in dsp_allocate_ports()
2829 status = dsp_allocate_router_ports(codec, num_chans, in dsp_allocate_ports()
2830 rate_multi, 0, port_map); in dsp_allocate_ports()
2832 codec_dbg(codec, " dsp_allocate_ports() -- complete\n"); in dsp_allocate_ports()
2837 static int dsp_allocate_ports_format(struct hda_codec *codec, in dsp_allocate_ports_format() argument
2844 unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1; in dsp_allocate_ports_format()
2849 codec_dbg(codec, "bad rate multiple\n"); in dsp_allocate_ports_format()
2850 return -EINVAL; in dsp_allocate_ports_format()
2855 status = dsp_allocate_ports(codec, num_chans, rate_multi, port_map); in dsp_allocate_ports_format()
2863 static int dsp_free_ports(struct hda_codec *codec) in dsp_free_ports() argument
2867 codec_dbg(codec, " dsp_free_ports() -- begin\n"); in dsp_free_ports()
2869 status = dsp_free_router_ports(codec); in dsp_free_ports()
2870 if (status < 0) { in dsp_free_ports()
2871 codec_dbg(codec, "free router ports fail\n"); in dsp_free_ports()
2874 codec_dbg(codec, " dsp_free_ports() -- complete\n"); in dsp_free_ports()
2883 struct hda_codec *codec; member
2891 DMA_STATE_STOP = 0,
2895 static int dma_convert_to_hda_format(struct hda_codec *codec, in dma_convert_to_hda_format() argument
2903 channels, SNDRV_PCM_FORMAT_S32_LE, 32, 0); in dma_convert_to_hda_format()
2908 return 0; in dma_convert_to_hda_format()
2916 struct hda_codec *codec = dma->codec; in dma_reset() local
2917 struct ca0132_spec *spec = codec->spec; in dma_reset()
2920 if (dma->dmab->area) in dma_reset()
2921 snd_hda_codec_load_dsp_cleanup(codec, dma->dmab); in dma_reset()
2923 status = snd_hda_codec_load_dsp_prepare(codec, in dma_reset()
2924 dma->m_converter_format, in dma_reset()
2925 dma->buf_size, in dma_reset()
2926 dma->dmab); in dma_reset()
2927 if (status < 0) in dma_reset()
2929 spec->dsp_stream_id = status; in dma_reset()
2930 return 0; in dma_reset()
2945 return 0; in dma_set_state()
2948 snd_hda_codec_load_dsp_trigger(dma->codec, cmd); in dma_set_state()
2949 return 0; in dma_set_state()
2954 return dma->dmab->bytes; in dma_get_buffer_size()
2959 return dma->dmab->area; in dma_get_buffer_addr()
2966 memcpy(dma->dmab->area, data, count); in dma_xfer()
2967 return 0; in dma_xfer()
2975 *format = dma->m_converter_format; in dma_get_converter_format()
2980 struct ca0132_spec *spec = dma->codec->spec; in dma_get_stream_id()
2982 return spec->dsp_stream_id; in dma_get_stream_id()
2992 static const u32 g_magic_value = 0x4c46584d;
2993 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
2997 return p->magic == g_magic_value; in is_valid()
3002 return g_chip_addr_magic_value == p->chip_addr; in is_hci_prog_list_seg()
3007 return p->count == 0; in is_last()
3012 return struct_size(p, data, p->count); in dsp_sizeof()
3024 #define INVALID_DMA_CHANNEL (~0U)
3031 static int dspxfr_hci_write(struct hda_codec *codec, in dspxfr_hci_write() argument
3038 if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) { in dspxfr_hci_write()
3039 codec_dbg(codec, "hci_write invalid params\n"); in dspxfr_hci_write()
3040 return -EINVAL; in dspxfr_hci_write()
3043 count = fls->count; in dspxfr_hci_write()
3044 data = (u32 *)(fls->data); in dspxfr_hci_write()
3046 status = chipio_write(codec, data[0], data[1]); in dspxfr_hci_write()
3047 if (status < 0) { in dspxfr_hci_write()
3048 codec_dbg(codec, "hci_write chipio failed\n"); in dspxfr_hci_write()
3051 count -= 2; in dspxfr_hci_write()
3054 return 0; in dspxfr_hci_write()
3058 * Write a block of data into DSP code or data RAM using pre-allocated
3061 * @codec: the HDA codec
3063 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3072 static int dspxfr_one_seg(struct hda_codec *codec, in dspxfr_one_seg() argument
3080 int status = 0; in dspxfr_one_seg()
3101 return -EINVAL; in dspxfr_one_seg()
3108 codec_dbg(codec, "hci_write\n"); in dspxfr_one_seg()
3109 return dspxfr_hci_write(codec, hci_write); in dspxfr_one_seg()
3112 if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { in dspxfr_one_seg()
3113 codec_dbg(codec, "Invalid Params\n"); in dspxfr_one_seg()
3114 return -EINVAL; in dspxfr_one_seg()
3117 data = fls->data; in dspxfr_one_seg()
3118 chip_addx = fls->chip_addr; in dspxfr_one_seg()
3119 words_to_write = fls->count; in dspxfr_one_seg()
3122 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0; in dspxfr_one_seg()
3124 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); in dspxfr_one_seg()
3129 codec_dbg(codec, "Invalid chip_addx Params\n"); in dspxfr_one_seg()
3130 return -EINVAL; in dspxfr_one_seg()
3139 codec_dbg(codec, "dma_engine buffer NULL\n"); in dspxfr_one_seg()
3140 return -EINVAL; in dspxfr_one_seg()
3144 sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1; in dspxfr_one_seg()
3148 hda_frame_size_words = ((sample_rate_div == 0) ? 0 : in dspxfr_one_seg()
3151 if (hda_frame_size_words == 0) { in dspxfr_one_seg()
3152 codec_dbg(codec, "frmsz zero\n"); in dspxfr_one_seg()
3153 return -EINVAL; in dspxfr_one_seg()
3159 buffer_size_words -= buffer_size_words % hda_frame_size_words; in dspxfr_one_seg()
3160 codec_dbg(codec, in dspxfr_one_seg()
3161 "chpadr=0x%08x frmsz=%u nchan=%u " in dspxfr_one_seg()
3167 codec_dbg(codec, "dspxfr_one_seg:failed\n"); in dspxfr_one_seg()
3168 return -EINVAL; in dspxfr_one_seg()
3177 words_to_write -= remainder_words; in dspxfr_one_seg()
3179 while (words_to_write != 0) { in dspxfr_one_seg()
3181 codec_dbg(codec, "dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n", in dspxfr_one_seg()
3185 status = dsp_dma_stop(codec, dma_chan, ovly); in dspxfr_one_seg()
3186 if (status < 0) in dspxfr_one_seg()
3188 status = dsp_dma_setup_common(codec, chip_addx, in dspxfr_one_seg()
3190 if (status < 0) in dspxfr_one_seg()
3195 status = dsp_dma_setup(codec, chip_addx, in dspxfr_one_seg()
3197 if (status < 0) in dspxfr_one_seg()
3199 status = dsp_dma_start(codec, dma_chan, ovly); in dspxfr_one_seg()
3200 if (status < 0) in dspxfr_one_seg()
3202 if (!dsp_is_dma_active(codec, dma_chan)) { in dspxfr_one_seg()
3203 codec_dbg(codec, "dspxfr:DMA did not start\n"); in dspxfr_one_seg()
3204 return -EIO; in dspxfr_one_seg()
3207 if (status < 0) in dspxfr_one_seg()
3209 if (remainder_words != 0) { in dspxfr_one_seg()
3210 status = chipio_write_multiple(codec, in dspxfr_one_seg()
3214 if (status < 0) in dspxfr_one_seg()
3216 remainder_words = 0; in dspxfr_one_seg()
3219 status = dspxfr_hci_write(codec, hci_write); in dspxfr_one_seg()
3220 if (status < 0) in dspxfr_one_seg()
3227 dma_active = dsp_is_dma_active(codec, dma_chan); in dspxfr_one_seg()
3235 codec_dbg(codec, "+++++ DMA complete\n"); in dspxfr_one_seg()
3239 if (status < 0) in dspxfr_one_seg()
3244 words_to_write -= run_size_words; in dspxfr_one_seg()
3247 if (remainder_words != 0) { in dspxfr_one_seg()
3248 status = chipio_write_multiple(codec, chip_addx_remainder, in dspxfr_one_seg()
3258 * @codec: the HDA codec
3260 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3268 static int dspxfr_image(struct hda_codec *codec, in dspxfr_image() argument
3275 struct ca0132_spec *spec = codec->spec; in dspxfr_image()
3277 unsigned short hda_format = 0; in dspxfr_image()
3279 unsigned char stream_id = 0; in dspxfr_image()
3285 return -EINVAL; in dspxfr_image()
3289 return -ENOMEM; in dspxfr_image()
3291 dma_engine->dmab = kzalloc(sizeof(*dma_engine->dmab), GFP_KERNEL); in dspxfr_image()
3292 if (!dma_engine->dmab) { in dspxfr_image()
3294 return -ENOMEM; in dspxfr_image()
3297 dma_engine->codec = codec; in dspxfr_image()
3298 dma_convert_to_hda_format(codec, sample_rate, channels, &hda_format); in dspxfr_image()
3299 dma_engine->m_converter_format = hda_format; in dspxfr_image()
3300 dma_engine->buf_size = (ovly ? DSP_DMA_WRITE_BUFLEN_OVLY : in dspxfr_image()
3303 dma_chan = ovly ? INVALID_DMA_CHANNEL : 0; in dspxfr_image()
3305 status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL, in dspxfr_image()
3308 if (status < 0) { in dspxfr_image()
3309 codec_dbg(codec, "set converter format fail\n"); in dspxfr_image()
3313 status = snd_hda_codec_load_dsp_prepare(codec, in dspxfr_image()
3314 dma_engine->m_converter_format, in dspxfr_image()
3315 dma_engine->buf_size, in dspxfr_image()
3316 dma_engine->dmab); in dspxfr_image()
3317 if (status < 0) in dspxfr_image()
3319 spec->dsp_stream_id = status; in dspxfr_image()
3322 status = dspio_alloc_dma_chan(codec, &dma_chan); in dspxfr_image()
3323 if (status < 0) { in dspxfr_image()
3324 codec_dbg(codec, "alloc dmachan fail\n"); in dspxfr_image()
3330 port_map_mask = 0; in dspxfr_image()
3331 status = dsp_allocate_ports_format(codec, hda_format, in dspxfr_image()
3333 if (status < 0) { in dspxfr_image()
3334 codec_dbg(codec, "alloc ports fail\n"); in dspxfr_image()
3339 status = codec_set_converter_stream_channel(codec, in dspxfr_image()
3340 WIDGET_CHIP_CTRL, stream_id, 0, &response); in dspxfr_image()
3341 if (status < 0) { in dspxfr_image()
3342 codec_dbg(codec, "set stream chan fail\n"); in dspxfr_image()
3348 codec_dbg(codec, "FLS check fail\n"); in dspxfr_image()
3349 status = -EINVAL; in dspxfr_image()
3352 status = dspxfr_one_seg(codec, fls_data, reloc, in dspxfr_image()
3355 if (status < 0) in dspxfr_image()
3365 if (port_map_mask != 0) in dspxfr_image()
3366 status = dsp_free_ports(codec); in dspxfr_image()
3368 if (status < 0) in dspxfr_image()
3371 status = codec_set_converter_stream_channel(codec, in dspxfr_image()
3372 WIDGET_CHIP_CTRL, 0, 0, &response); in dspxfr_image()
3376 dspio_free_dma_chan(codec, dma_chan); in dspxfr_image()
3378 if (dma_engine->dmab->area) in dspxfr_image()
3379 snd_hda_codec_load_dsp_cleanup(codec, dma_engine->dmab); in dspxfr_image()
3380 kfree(dma_engine->dmab); in dspxfr_image()
3389 static void dspload_post_setup(struct hda_codec *codec) in dspload_post_setup() argument
3391 struct ca0132_spec *spec = codec->spec; in dspload_post_setup()
3392 codec_dbg(codec, "---- dspload_post_setup ------\n"); in dspload_post_setup()
3395 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); in dspload_post_setup()
3396 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); in dspload_post_setup()
3399 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002); in dspload_post_setup()
3404 * dspload_image - Download DSP from a DSP Image Fast Load structure.
3406 * @codec: the HDA codec
3409 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3412 * @router_chans: number of audio router channels to be allocated (0 means use
3416 * linear, non-constant sized element array of structures, each of which
3421 static int dspload_image(struct hda_codec *codec, in dspload_image() argument
3428 int status = 0; in dspload_image()
3432 codec_dbg(codec, "---- dspload_image begin ------\n"); in dspload_image()
3433 if (router_chans == 0) { in dspload_image()
3449 codec_dbg(codec, "Ready to program DMA\n"); in dspload_image()
3451 status = dsp_reset(codec); in dspload_image()
3453 if (status < 0) in dspload_image()
3456 codec_dbg(codec, "dsp_reset() complete\n"); in dspload_image()
3457 status = dspxfr_image(codec, fls, reloc, sample_rate, channels, in dspload_image()
3460 if (status < 0) in dspload_image()
3463 codec_dbg(codec, "dspxfr_image() complete\n"); in dspload_image()
3465 dspload_post_setup(codec); in dspload_image()
3466 status = dsp_set_run_state(codec); in dspload_image()
3469 codec_dbg(codec, "LOAD FINISHED\n"); in dspload_image()
3470 } while (0); in dspload_image()
3476 static bool dspload_is_loaded(struct hda_codec *codec) in dspload_is_loaded() argument
3478 unsigned int data = 0; in dspload_is_loaded()
3479 int status = 0; in dspload_is_loaded()
3481 status = chipio_read(codec, 0x40004, &data); in dspload_is_loaded()
3482 if ((status < 0) || (data != 1)) in dspload_is_loaded()
3488 #define dspload_is_loaded(codec) false argument
3491 static bool dspload_wait_loaded(struct hda_codec *codec) in dspload_wait_loaded() argument
3496 if (dspload_is_loaded(codec)) { in dspload_wait_loaded()
3497 codec_info(codec, "ca0132 DSP downloaded and running\n"); in dspload_wait_loaded()
3503 codec_err(codec, "ca0132 failed to download DSP\n"); in dspload_wait_loaded()
3508 * ca0113 related functions. The ca0113 acts as the HDA bus for the pci-e
3514 * For cards with PCI-E region2 (Sound Blaster Z/ZxR, Recon3D, and AE-5)
3515 * the mmio address 0x320 is used to set GPIO pins. The format for the data
3518 * AE-5 note: The AE-5 seems to use pins 2 and 3 to somehow set the color value
3519 * of the on-card LED. It seems to use pin 2 for data, then toggles 3 to on and
3522 static void ca0113_mmio_gpio_set(struct hda_codec *codec, unsigned int gpio_pin, in ca0113_mmio_gpio_set() argument
3525 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_gpio_set()
3528 gpio_data = gpio_pin & 0xF; in ca0113_mmio_gpio_set()
3529 gpio_data |= ((enable << 8) & 0x100); in ca0113_mmio_gpio_set()
3531 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3535 * Special pci region2 commands that are only used by the AE-5. They follow
3540 * target-id, and value.
3542 static void ca0113_mmio_command_set(struct hda_codec *codec, unsigned int group, in ca0113_mmio_command_set() argument
3545 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_command_set()
3548 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3549 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3550 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3551 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3552 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3554 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3555 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3557 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3558 write_val = (target & 0xff); in ca0113_mmio_command_set()
3562 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3568 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3569 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3570 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3572 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3573 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3574 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3575 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3581 static void ca0113_mmio_command_set_type2(struct hda_codec *codec, in ca0113_mmio_command_set_type2() argument
3584 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_command_set_type2()
3587 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3588 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3589 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3590 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3591 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3593 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3594 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3596 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3597 write_val = (target & 0xff); in ca0113_mmio_command_set_type2()
3601 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3603 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3604 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3605 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3607 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3608 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3609 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3610 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3621 static void ca0132_gpio_init(struct hda_codec *codec) in ca0132_gpio_init() argument
3623 struct ca0132_spec *spec = codec->spec; in ca0132_gpio_init()
3629 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3630 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ca0132_gpio_init()
3631 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23); in ca0132_gpio_init()
3634 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3635 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); in ca0132_gpio_init()
3644 static void ca0132_gpio_setup(struct hda_codec *codec) in ca0132_gpio_setup() argument
3646 struct ca0132_spec *spec = codec->spec; in ca0132_gpio_setup()
3650 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3651 AC_VERB_SET_GPIO_DIRECTION, 0x07); in ca0132_gpio_setup()
3652 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3653 AC_VERB_SET_GPIO_MASK, 0x07); in ca0132_gpio_setup()
3654 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3655 AC_VERB_SET_GPIO_DATA, 0x04); in ca0132_gpio_setup()
3656 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3657 AC_VERB_SET_GPIO_DATA, 0x06); in ca0132_gpio_setup()
3660 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3661 AC_VERB_SET_GPIO_DIRECTION, 0x1E); in ca0132_gpio_setup()
3662 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3663 AC_VERB_SET_GPIO_MASK, 0x1F); in ca0132_gpio_setup()
3664 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3665 AC_VERB_SET_GPIO_DATA, 0x0C); in ca0132_gpio_setup()
3677 /* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3679 /* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3694 /* Set GPIO bit 1 to 0 for rear mic */
3695 R3DI_REAR_MIC = 0,
3701 /* Set GPIO bit 2 to 0 for headphone */
3702 R3DI_HEADPHONE_OUT = 0,
3708 R3DI_DSP_DOWNLOADING = 0,
3714 static void r3di_gpio_mic_set(struct hda_codec *codec, in r3di_gpio_mic_set() argument
3720 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_mic_set()
3730 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_mic_set()
3734 static void r3di_gpio_dsp_status_set(struct hda_codec *codec, in r3di_gpio_dsp_status_set() argument
3740 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_dsp_status_set()
3745 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3749 /* Set DOWNLOADING bit to 0. */ in r3di_gpio_dsp_status_set()
3752 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3759 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3767 struct hda_codec *codec, in ca0132_playback_pcm_prepare() argument
3772 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_prepare()
3774 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); in ca0132_playback_pcm_prepare()
3776 return 0; in ca0132_playback_pcm_prepare()
3780 struct hda_codec *codec, in ca0132_playback_pcm_cleanup() argument
3783 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_cleanup()
3785 if (spec->dsp_state == DSP_DOWNLOADING) in ca0132_playback_pcm_cleanup()
3786 return 0; in ca0132_playback_pcm_cleanup()
3790 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) in ca0132_playback_pcm_cleanup()
3793 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_playback_pcm_cleanup()
3795 return 0; in ca0132_playback_pcm_cleanup()
3799 struct hda_codec *codec, in ca0132_playback_pcm_delay() argument
3802 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_delay()
3804 struct snd_pcm_runtime *runtime = substream->runtime; in ca0132_playback_pcm_delay()
3806 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_playback_pcm_delay()
3807 return 0; in ca0132_playback_pcm_delay()
3810 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) { in ca0132_playback_pcm_delay()
3811 if ((spec->effects_switch[SURROUND - EFFECT_START_NID]) || in ca0132_playback_pcm_delay()
3812 (spec->effects_switch[DIALOG_PLUS - EFFECT_START_NID])) in ca0132_playback_pcm_delay()
3817 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_playback_pcm_delay()
3820 return (latency * runtime->rate) / 1000; in ca0132_playback_pcm_delay()
3827 struct hda_codec *codec, in ca0132_dig_playback_pcm_open() argument
3830 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_open()
3831 return snd_hda_multi_out_dig_open(codec, &spec->multiout); in ca0132_dig_playback_pcm_open()
3835 struct hda_codec *codec, in ca0132_dig_playback_pcm_prepare() argument
3840 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_prepare()
3841 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, in ca0132_dig_playback_pcm_prepare()
3846 struct hda_codec *codec, in ca0132_dig_playback_pcm_cleanup() argument
3849 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_cleanup()
3850 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout); in ca0132_dig_playback_pcm_cleanup()
3854 struct hda_codec *codec, in ca0132_dig_playback_pcm_close() argument
3857 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_close()
3858 return snd_hda_multi_out_dig_close(codec, &spec->multiout); in ca0132_dig_playback_pcm_close()
3865 struct hda_codec *codec, in ca0132_capture_pcm_prepare() argument
3870 snd_hda_codec_setup_stream(codec, hinfo->nid, in ca0132_capture_pcm_prepare()
3871 stream_tag, 0, format); in ca0132_capture_pcm_prepare()
3873 return 0; in ca0132_capture_pcm_prepare()
3877 struct hda_codec *codec, in ca0132_capture_pcm_cleanup() argument
3880 struct ca0132_spec *spec = codec->spec; in ca0132_capture_pcm_cleanup()
3882 if (spec->dsp_state == DSP_DOWNLOADING) in ca0132_capture_pcm_cleanup()
3883 return 0; in ca0132_capture_pcm_cleanup()
3885 snd_hda_codec_cleanup_stream(codec, hinfo->nid); in ca0132_capture_pcm_cleanup()
3886 return 0; in ca0132_capture_pcm_cleanup()
3890 struct hda_codec *codec, in ca0132_capture_pcm_delay() argument
3893 struct ca0132_spec *spec = codec->spec; in ca0132_capture_pcm_delay()
3895 struct snd_pcm_runtime *runtime = substream->runtime; in ca0132_capture_pcm_delay()
3897 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_capture_pcm_delay()
3898 return 0; in ca0132_capture_pcm_delay()
3900 if (spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) in ca0132_capture_pcm_delay()
3903 return (latency * runtime->rate) / 1000; in ca0132_capture_pcm_delay()
3924 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3942 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3951 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3967 * values -90 to 9. -90 is the lowest decibel value for both the ADC's and the
3971 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
3972 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
3973 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
3974 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
3975 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
3976 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
3977 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
3978 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
3979 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
3980 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
3981 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
3982 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
3983 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
3984 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
3985 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
3986 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
3987 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
3991 * This table counts from float 0 to 1 in increments of .01, which is
3995 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
3996 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
3997 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
3998 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
3999 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4000 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4001 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4002 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4003 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4004 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4005 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4006 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4007 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4008 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4009 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4010 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4011 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4015 * This table counts from float 10 to 1000, which is the range of the x-bass
4019 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
4020 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
4021 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
4022 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
4023 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
4024 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
4025 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
4026 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
4027 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
4028 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
4029 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
4030 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
4031 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
4032 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
4033 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
4034 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
4035 0x44728000, 0x44750000, 0x44778000, 0x447A0000
4042 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
4043 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
4044 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
4045 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
4046 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
4047 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
4048 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
4049 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
4050 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
4051 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
4052 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
4053 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
4054 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
4055 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
4056 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
4057 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
4058 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
4059 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
4060 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
4061 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
4062 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
4063 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
4064 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
4065 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
4066 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
4067 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
4068 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
4072 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4073 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4074 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4075 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4076 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4077 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4078 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4079 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4080 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4081 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4082 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4083 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4084 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4085 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4086 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4087 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4088 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4092 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4093 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4094 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4095 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4096 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4097 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
4098 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
4099 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
4100 0x41C00000
4103 static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid, in tuning_ctl_set() argument
4106 int i = 0; in tuning_ctl_set()
4108 for (i = 0; i < TUNING_CTLS_COUNT; i++) in tuning_ctl_set()
4112 snd_hda_power_up(codec); in tuning_ctl_set()
4113 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20, in tuning_ctl_set()
4116 snd_hda_power_down(codec); in tuning_ctl_set()
4124 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in tuning_ctl_get() local
4125 struct ca0132_spec *spec = codec->spec; in tuning_ctl_get()
4127 long *valp = ucontrol->value.integer.value; in tuning_ctl_get()
4128 int idx = nid - TUNING_CTL_START_NID; in tuning_ctl_get()
4130 *valp = spec->cur_ctl_vals[idx]; in tuning_ctl_get()
4131 return 0; in tuning_ctl_get()
4138 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in voice_focus_ctl_info()
4139 uinfo->count = chs == 3 ? 2 : 1; in voice_focus_ctl_info()
4140 uinfo->value.integer.min = 20; in voice_focus_ctl_info()
4141 uinfo->value.integer.max = 180; in voice_focus_ctl_info()
4142 uinfo->value.integer.step = 1; in voice_focus_ctl_info()
4144 return 0; in voice_focus_ctl_info()
4150 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in voice_focus_ctl_put() local
4151 struct ca0132_spec *spec = codec->spec; in voice_focus_ctl_put()
4153 long *valp = ucontrol->value.integer.value; in voice_focus_ctl_put()
4156 idx = nid - TUNING_CTL_START_NID; in voice_focus_ctl_put()
4158 if (spec->cur_ctl_vals[idx] == *valp) in voice_focus_ctl_put()
4159 return 0; in voice_focus_ctl_put()
4161 spec->cur_ctl_vals[idx] = *valp; in voice_focus_ctl_put()
4163 idx = *valp - 20; in voice_focus_ctl_put()
4164 tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx); in voice_focus_ctl_put()
4173 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in mic_svm_ctl_info()
4174 uinfo->count = chs == 3 ? 2 : 1; in mic_svm_ctl_info()
4175 uinfo->value.integer.min = 0; in mic_svm_ctl_info()
4176 uinfo->value.integer.max = 100; in mic_svm_ctl_info()
4177 uinfo->value.integer.step = 1; in mic_svm_ctl_info()
4179 return 0; in mic_svm_ctl_info()
4185 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in mic_svm_ctl_put() local
4186 struct ca0132_spec *spec = codec->spec; in mic_svm_ctl_put()
4188 long *valp = ucontrol->value.integer.value; in mic_svm_ctl_put()
4191 idx = nid - TUNING_CTL_START_NID; in mic_svm_ctl_put()
4193 if (spec->cur_ctl_vals[idx] == *valp) in mic_svm_ctl_put()
4194 return 0; in mic_svm_ctl_put()
4196 spec->cur_ctl_vals[idx] = *valp; in mic_svm_ctl_put()
4199 tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx); in mic_svm_ctl_put()
4201 return 0; in mic_svm_ctl_put()
4208 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in equalizer_ctl_info()
4209 uinfo->count = chs == 3 ? 2 : 1; in equalizer_ctl_info()
4210 uinfo->value.integer.min = 0; in equalizer_ctl_info()
4211 uinfo->value.integer.max = 48; in equalizer_ctl_info()
4212 uinfo->value.integer.step = 1; in equalizer_ctl_info()
4214 return 0; in equalizer_ctl_info()
4220 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in equalizer_ctl_put() local
4221 struct ca0132_spec *spec = codec->spec; in equalizer_ctl_put()
4223 long *valp = ucontrol->value.integer.value; in equalizer_ctl_put()
4226 idx = nid - TUNING_CTL_START_NID; in equalizer_ctl_put()
4228 if (spec->cur_ctl_vals[idx] == *valp) in equalizer_ctl_put()
4229 return 0; in equalizer_ctl_put()
4231 spec->cur_ctl_vals[idx] = *valp; in equalizer_ctl_put()
4234 tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx); in equalizer_ctl_put()
4239 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
4240 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
4242 static int add_tuning_control(struct hda_codec *codec, in add_tuning_control() argument
4249 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in add_tuning_control()
4253 knew.tlv.c = 0; in add_tuning_control()
4254 knew.tlv.p = 0; in add_tuning_control()
4274 return 0; in add_tuning_control()
4277 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in add_tuning_control()
4279 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in add_tuning_control()
4282 static int add_tuning_ctls(struct hda_codec *codec) in add_tuning_ctls() argument
4287 for (i = 0; i < TUNING_CTLS_COUNT; i++) { in add_tuning_ctls()
4288 err = add_tuning_control(codec, in add_tuning_ctls()
4293 if (err < 0) in add_tuning_ctls()
4297 return 0; in add_tuning_ctls()
4300 static void ca0132_init_tuning_defaults(struct hda_codec *codec) in ca0132_init_tuning_defaults() argument
4302 struct ca0132_spec *spec = codec->spec; in ca0132_init_tuning_defaults()
4305 /* Wedge Angle defaults to 30. 10 below is 30 - 20. 20 is min. */ in ca0132_init_tuning_defaults()
4306 spec->cur_ctl_vals[WEDGE_ANGLE - TUNING_CTL_START_NID] = 10; in ca0132_init_tuning_defaults()
4308 spec->cur_ctl_vals[SVM_LEVEL - TUNING_CTL_START_NID] = 74; in ca0132_init_tuning_defaults()
4310 /* EQ defaults to 0dB. */ in ca0132_init_tuning_defaults()
4312 spec->cur_ctl_vals[i] = 24; in ca0132_init_tuning_defaults()
4319 * If jack inserted, headphone will be selected, else built-in speakers
4322 static int ca0132_select_out(struct hda_codec *codec) in ca0132_select_out() argument
4324 struct ca0132_spec *spec = codec->spec; in ca0132_select_out()
4331 codec_dbg(codec, "ca0132_select_out\n"); in ca0132_select_out()
4333 snd_hda_power_up_pm(codec); in ca0132_select_out()
4335 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_select_out()
4338 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp); in ca0132_select_out()
4341 spec->vnode_lswitch[VNID_HP_SEL - VNODE_START_NID]; in ca0132_select_out()
4344 spec->cur_out_type = HEADPHONE_OUT; in ca0132_select_out()
4346 spec->cur_out_type = SPEAKER_OUT; in ca0132_select_out()
4348 if (spec->cur_out_type == SPEAKER_OUT) { in ca0132_select_out()
4349 codec_dbg(codec, "ca0132_select_out speaker\n"); in ca0132_select_out()
4352 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4353 if (err < 0) in ca0132_select_out()
4357 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4358 if (err < 0) in ca0132_select_out()
4362 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4363 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4364 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4365 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4366 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4367 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4368 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4369 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4372 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4373 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4374 snd_hda_set_pin_ctl(codec, spec->out_pins[1], in ca0132_select_out()
4377 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4378 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4379 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4382 codec_dbg(codec, "ca0132_select_out hp\n"); in ca0132_select_out()
4385 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4386 if (err < 0) in ca0132_select_out()
4390 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4391 if (err < 0) in ca0132_select_out()
4395 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4396 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4397 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4398 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4399 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4400 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4401 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4402 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4405 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4406 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4407 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4410 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4411 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4412 snd_hda_set_pin_ctl(codec, spec->out_pins[1], in ca0132_select_out()
4417 snd_hda_power_down_pm(codec); in ca0132_select_out()
4419 return err < 0 ? err : 0; in ca0132_select_out()
4422 static int ae5_headphone_gain_set(struct hda_codec *codec, long val);
4423 static int zxr_headphone_gain_set(struct hda_codec *codec, long val);
4424 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val);
4426 static void ae5_mmio_select_out(struct hda_codec *codec) in ae5_mmio_select_out() argument
4428 struct ca0132_spec *spec = codec->spec; in ae5_mmio_select_out()
4437 for (i = 0; i < AE_CA0113_OUT_SET_COMMANDS; i++) in ae5_mmio_select_out()
4438 ca0113_mmio_command_set(codec, out_cmds->group[i], in ae5_mmio_select_out()
4439 out_cmds->target[i], in ae5_mmio_select_out()
4440 out_cmds->vals[spec->cur_out_type][i]); in ae5_mmio_select_out()
4443 static int ca0132_alt_set_full_range_speaker(struct hda_codec *codec) in ca0132_alt_set_full_range_speaker() argument
4445 struct ca0132_spec *spec = codec->spec; in ca0132_alt_set_full_range_speaker()
4450 /* 2.0/4.0 setup has no LFE channel, so setting full-range does nothing. */ in ca0132_alt_set_full_range_speaker()
4451 if (spec->channel_cfg_val == SPEAKER_CHANNELS_4_0 in ca0132_alt_set_full_range_speaker()
4452 || spec->channel_cfg_val == SPEAKER_CHANNELS_2_0) in ca0132_alt_set_full_range_speaker()
4453 return 0; in ca0132_alt_set_full_range_speaker()
4455 /* Set front L/R full range. Zero for full-range, one for redirection. */ in ca0132_alt_set_full_range_speaker()
4456 tmp = spec->speaker_range_val[0] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4457 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4459 if (err < 0) in ca0132_alt_set_full_range_speaker()
4462 /* When setting full-range rear, both rear and center/lfe are set. */ in ca0132_alt_set_full_range_speaker()
4463 tmp = spec->speaker_range_val[1] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4464 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4466 if (err < 0) in ca0132_alt_set_full_range_speaker()
4469 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4471 if (err < 0) in ca0132_alt_set_full_range_speaker()
4475 * Only the AE series cards set this value when setting full-range, in ca0132_alt_set_full_range_speaker()
4479 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4481 if (err < 0) in ca0132_alt_set_full_range_speaker()
4485 return 0; in ca0132_alt_set_full_range_speaker()
4488 static int ca0132_alt_surround_set_bass_redirection(struct hda_codec *codec, in ca0132_alt_surround_set_bass_redirection() argument
4491 struct ca0132_spec *spec = codec->spec; in ca0132_alt_surround_set_bass_redirection()
4495 if (val && spec->channel_cfg_val != SPEAKER_CHANNELS_4_0 && in ca0132_alt_surround_set_bass_redirection()
4496 spec->channel_cfg_val != SPEAKER_CHANNELS_2_0) in ca0132_alt_surround_set_bass_redirection()
4501 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp); in ca0132_alt_surround_set_bass_redirection()
4502 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4507 tmp = float_xbass_xover_lookup[spec->xbass_xover_freq]; in ca0132_alt_surround_set_bass_redirection()
4508 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_surround_set_bass_redirection()
4510 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4514 return 0; in ca0132_alt_surround_set_bass_redirection()
4521 static void ca0132_alt_select_out_get_quirk_data(struct hda_codec *codec, in ca0132_alt_select_out_get_quirk_data() argument
4524 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out_get_quirk_data()
4529 for (i = 0; i < ARRAY_SIZE(quirk_out_set_data); i++) { in ca0132_alt_select_out_get_quirk_data()
4537 static int ca0132_alt_select_out_quirk_set(struct hda_codec *codec) in ca0132_alt_select_out_quirk_set() argument
4541 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out_quirk_set()
4545 ca0132_alt_select_out_get_quirk_data(codec, &quirk_data); in ca0132_alt_select_out_quirk_set()
4547 return 0; in ca0132_alt_select_out_quirk_set()
4549 out_info = &quirk_data->out_set_info[spec->cur_out_type]; in ca0132_alt_select_out_quirk_set()
4550 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4551 ae5_mmio_select_out(codec); in ca0132_alt_select_out_quirk_set()
4553 if (out_info->has_hda_gpio) { in ca0132_alt_select_out_quirk_set()
4554 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4555 AC_VERB_GET_GPIO_DATA, 0); in ca0132_alt_select_out_quirk_set()
4557 if (out_info->hda_gpio_set) in ca0132_alt_select_out_quirk_set()
4558 gpio_data |= (1 << out_info->hda_gpio_pin); in ca0132_alt_select_out_quirk_set()
4560 gpio_data &= ~(1 << out_info->hda_gpio_pin); in ca0132_alt_select_out_quirk_set()
4562 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4566 if (out_info->mmio_gpio_count) { in ca0132_alt_select_out_quirk_set()
4567 for (i = 0; i < out_info->mmio_gpio_count; i++) { in ca0132_alt_select_out_quirk_set()
4568 ca0113_mmio_gpio_set(codec, out_info->mmio_gpio_pin[i], in ca0132_alt_select_out_quirk_set()
4569 out_info->mmio_gpio_set[i]); in ca0132_alt_select_out_quirk_set()
4573 if (out_info->scp_cmds_count) { in ca0132_alt_select_out_quirk_set()
4574 for (i = 0; i < out_info->scp_cmds_count; i++) { in ca0132_alt_select_out_quirk_set()
4575 err = dspio_set_uint_param(codec, in ca0132_alt_select_out_quirk_set()
4576 out_info->scp_cmd_mid[i], in ca0132_alt_select_out_quirk_set()
4577 out_info->scp_cmd_req[i], in ca0132_alt_select_out_quirk_set()
4578 out_info->scp_cmd_val[i]); in ca0132_alt_select_out_quirk_set()
4579 if (err < 0) in ca0132_alt_select_out_quirk_set()
4584 chipio_set_control_param(codec, 0x0d, out_info->dac2port); in ca0132_alt_select_out_quirk_set()
4586 if (out_info->has_chipio_write) { in ca0132_alt_select_out_quirk_set()
4587 chipio_write(codec, out_info->chipio_write_addr, in ca0132_alt_select_out_quirk_set()
4588 out_info->chipio_write_data); in ca0132_alt_select_out_quirk_set()
4591 if (quirk_data->has_headphone_gain) { in ca0132_alt_select_out_quirk_set()
4592 if (spec->cur_out_type != HEADPHONE_OUT) { in ca0132_alt_select_out_quirk_set()
4593 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4594 ae5_headphone_gain_set(codec, 2); in ca0132_alt_select_out_quirk_set()
4596 zxr_headphone_gain_set(codec, 0); in ca0132_alt_select_out_quirk_set()
4598 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4599 ae5_headphone_gain_set(codec, in ca0132_alt_select_out_quirk_set()
4600 spec->ae5_headphone_gain_val); in ca0132_alt_select_out_quirk_set()
4602 zxr_headphone_gain_set(codec, in ca0132_alt_select_out_quirk_set()
4603 spec->zxr_gain_set); in ca0132_alt_select_out_quirk_set()
4607 return 0; in ca0132_alt_select_out_quirk_set()
4610 static void ca0132_set_out_node_pincfg(struct hda_codec *codec, hda_nid_t nid, in ca0132_set_out_node_pincfg() argument
4615 pin_ctl = snd_hda_codec_read(codec, nid, 0, in ca0132_set_out_node_pincfg()
4616 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_set_out_node_pincfg()
4620 snd_hda_set_pin_ctl(codec, nid, pin_ctl); in ca0132_set_out_node_pincfg()
4629 * It also adds the ability to auto-detect the front headphone port.
4631 static int ca0132_alt_select_out(struct hda_codec *codec) in ca0132_alt_select_out() argument
4633 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out()
4639 hda_nid_t headphone_nid = spec->out_pins[1]; in ca0132_alt_select_out()
4641 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_select_out()
4643 snd_hda_power_up_pm(codec); in ca0132_alt_select_out()
4645 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_alt_select_out()
4653 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp) || in ca0132_alt_select_out()
4654 snd_hda_jack_detect(codec, spec->unsol_tag_front_hp); in ca0132_alt_select_out()
4657 spec->cur_out_type = HEADPHONE_OUT; in ca0132_alt_select_out()
4659 spec->cur_out_type = SPEAKER_OUT; in ca0132_alt_select_out()
4661 spec->cur_out_type = spec->out_enum_val; in ca0132_alt_select_out()
4663 outfx_set = spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]; in ca0132_alt_select_out()
4666 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE); in ca0132_alt_select_out()
4667 if (err < 0) in ca0132_alt_select_out()
4670 if (ca0132_alt_select_out_quirk_set(codec) < 0) in ca0132_alt_select_out()
4673 switch (spec->cur_out_type) { in ca0132_alt_select_out()
4675 codec_dbg(codec, "%s speaker\n", __func__); in ca0132_alt_select_out()
4678 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4679 AC_VERB_SET_EAPD_BTLENABLE, 0x01); in ca0132_alt_select_out()
4682 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0); in ca0132_alt_select_out()
4683 /* Set front L-R to output. */ in ca0132_alt_select_out()
4684 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0); in ca0132_alt_select_out()
4686 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0); in ca0132_alt_select_out()
4688 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0); in ca0132_alt_select_out()
4695 if (!outfx_set && spec->channel_cfg_val == SPEAKER_CHANNELS_2_0) in ca0132_alt_select_out()
4698 tmp = speaker_channel_cfgs[spec->channel_cfg_val].val; in ca0132_alt_select_out()
4700 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_alt_select_out()
4701 if (err < 0) in ca0132_alt_select_out()
4706 codec_dbg(codec, "%s hp\n", __func__); in ca0132_alt_select_out()
4707 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4708 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_alt_select_out()
4711 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0); in ca0132_alt_select_out()
4712 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0); in ca0132_alt_select_out()
4713 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0); in ca0132_alt_select_out()
4716 if (snd_hda_jack_detect(codec, spec->unsol_tag_front_hp)) in ca0132_alt_select_out()
4717 headphone_nid = spec->out_pins[2]; in ca0132_alt_select_out()
4718 else if (snd_hda_jack_detect(codec, spec->unsol_tag_hp)) in ca0132_alt_select_out()
4719 headphone_nid = spec->out_pins[1]; in ca0132_alt_select_out()
4721 ca0132_set_out_node_pincfg(codec, headphone_nid, 1, 1); in ca0132_alt_select_out()
4724 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE); in ca0132_alt_select_out()
4726 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO); in ca0132_alt_select_out()
4728 if (err < 0) in ca0132_alt_select_out()
4733 * If output effects are enabled, set the X-Bass effect value again to in ca0132_alt_select_out()
4738 ca0132_effects_set(codec, X_BASS, in ca0132_alt_select_out()
4739 spec->effects_switch[X_BASS - EFFECT_START_NID]); in ca0132_alt_select_out()
4741 /* Set speaker EQ bypass attenuation to 0. */ in ca0132_alt_select_out()
4742 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO); in ca0132_alt_select_out()
4743 if (err < 0) in ca0132_alt_select_out()
4750 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4752 if (err < 0) in ca0132_alt_select_out()
4755 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_alt_select_out()
4756 err = ca0132_alt_surround_set_bass_redirection(codec, in ca0132_alt_select_out()
4757 spec->bass_redirection_val); in ca0132_alt_select_out()
4759 err = ca0132_alt_surround_set_bass_redirection(codec, 0); in ca0132_alt_select_out()
4762 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4764 if (err < 0) in ca0132_alt_select_out()
4767 if (spec->cur_out_type == SPEAKER_OUT) { in ca0132_alt_select_out()
4768 err = ca0132_alt_set_full_range_speaker(codec); in ca0132_alt_select_out()
4769 if (err < 0) in ca0132_alt_select_out()
4774 snd_hda_power_down_pm(codec); in ca0132_alt_select_out()
4776 return err < 0 ? err : 0; in ca0132_alt_select_out()
4786 ca0132_alt_select_out(spec->codec); in ca0132_unsol_hp_delayed()
4788 ca0132_select_out(spec->codec); in ca0132_unsol_hp_delayed()
4790 jack = snd_hda_jack_tbl_get(spec->codec, spec->unsol_tag_hp); in ca0132_unsol_hp_delayed()
4792 jack->block_report = 0; in ca0132_unsol_hp_delayed()
4793 snd_hda_jack_report_sync(spec->codec); in ca0132_unsol_hp_delayed()
4797 static void ca0132_set_dmic(struct hda_codec *codec, int enable);
4798 static int ca0132_mic_boost_set(struct hda_codec *codec, long val);
4799 static void resume_mic1(struct hda_codec *codec, unsigned int oldval);
4800 static int stop_mic1(struct hda_codec *codec);
4801 static int ca0132_cvoice_switch_set(struct hda_codec *codec);
4802 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val);
4807 static int ca0132_set_vipsource(struct hda_codec *codec, int val) in ca0132_set_vipsource() argument
4809 struct ca0132_spec *spec = codec->spec; in ca0132_set_vipsource()
4812 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_set_vipsource()
4813 return 0; in ca0132_set_vipsource()
4815 /* if CrystalVoice if off, vipsource should be 0 */ in ca0132_set_vipsource()
4816 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] || in ca0132_set_vipsource()
4817 (val == 0)) { in ca0132_set_vipsource()
4818 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_set_vipsource()
4819 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_set_vipsource()
4820 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_set_vipsource()
4821 if (spec->cur_mic_type == DIGITAL_MIC) in ca0132_set_vipsource()
4825 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4827 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4829 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); in ca0132_set_vipsource()
4830 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); in ca0132_set_vipsource()
4831 if (spec->cur_mic_type == DIGITAL_MIC) in ca0132_set_vipsource()
4835 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4837 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4839 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val); in ca0132_set_vipsource()
4845 static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val) in ca0132_alt_set_vipsource() argument
4847 struct ca0132_spec *spec = codec->spec; in ca0132_alt_set_vipsource()
4850 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_alt_set_vipsource()
4851 return 0; in ca0132_alt_set_vipsource()
4853 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_set_vipsource()
4855 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_set_vipsource()
4856 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_set_vipsource()
4858 /* if CrystalVoice is off, vipsource should be 0 */ in ca0132_alt_set_vipsource()
4859 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] || in ca0132_alt_set_vipsource()
4860 (val == 0) || spec->in_enum_val == REAR_LINE_IN) { in ca0132_alt_set_vipsource()
4861 codec_dbg(codec, "%s: off.", __func__); in ca0132_alt_set_vipsource()
4862 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_alt_set_vipsource()
4865 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4867 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_set_vipsource()
4868 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_set_vipsource()
4870 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_set_vipsource()
4873 if (spec->in_enum_val == REAR_LINE_IN) in ca0132_alt_set_vipsource()
4882 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
4885 codec_dbg(codec, "%s: on.", __func__); in ca0132_alt_set_vipsource()
4886 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); in ca0132_alt_set_vipsource()
4887 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); in ca0132_alt_set_vipsource()
4889 chipio_set_conn_rate(codec, 0x0F, SR_16_000); in ca0132_alt_set_vipsource()
4891 if (spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID]) in ca0132_alt_set_vipsource()
4895 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
4898 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4901 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val); in ca0132_alt_set_vipsource()
4904 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_set_vipsource()
4905 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_set_vipsource()
4913 * If jack inserted, ext.mic will be selected, else built-in mic
4916 static int ca0132_select_mic(struct hda_codec *codec) in ca0132_select_mic() argument
4918 struct ca0132_spec *spec = codec->spec; in ca0132_select_mic()
4922 codec_dbg(codec, "ca0132_select_mic\n"); in ca0132_select_mic()
4924 snd_hda_power_up_pm(codec); in ca0132_select_mic()
4926 auto_jack = spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID]; in ca0132_select_mic()
4929 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_amic1); in ca0132_select_mic()
4932 spec->vnode_lswitch[VNID_AMIC1_SEL - VNODE_START_NID]; in ca0132_select_mic()
4935 spec->cur_mic_type = LINE_MIC_IN; in ca0132_select_mic()
4937 spec->cur_mic_type = DIGITAL_MIC; in ca0132_select_mic()
4939 if (spec->cur_mic_type == DIGITAL_MIC) { in ca0132_select_mic()
4941 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_32_000); in ca0132_select_mic()
4942 ca0132_set_dmic(codec, 1); in ca0132_select_mic()
4943 ca0132_mic_boost_set(codec, 0); in ca0132_select_mic()
4945 ca0132_effects_set(codec, VOICE_FOCUS, in ca0132_select_mic()
4946 spec->effects_switch in ca0132_select_mic()
4947 [VOICE_FOCUS - EFFECT_START_NID]); in ca0132_select_mic()
4950 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_96_000); in ca0132_select_mic()
4951 ca0132_set_dmic(codec, 0); in ca0132_select_mic()
4952 ca0132_mic_boost_set(codec, spec->cur_mic_boost); in ca0132_select_mic()
4954 ca0132_effects_set(codec, VOICE_FOCUS, 0); in ca0132_select_mic()
4957 snd_hda_power_down_pm(codec); in ca0132_select_mic()
4959 return 0; in ca0132_select_mic()
4965 * The front mic has no jack-detection, so the only way to switch to it
4968 static int ca0132_alt_select_in(struct hda_codec *codec) in ca0132_alt_select_in() argument
4970 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_in()
4973 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_select_in()
4975 snd_hda_power_up_pm(codec); in ca0132_alt_select_in()
4977 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_select_in()
4978 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_select_in()
4980 spec->cur_mic_type = spec->in_enum_val; in ca0132_alt_select_in()
4982 switch (spec->cur_mic_type) { in ca0132_alt_select_in()
4987 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
4994 r3di_gpio_mic_set(codec, R3DI_REAR_MIC); in ca0132_alt_select_in()
4998 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5002 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5004 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, in ca0132_alt_select_in()
5006 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, in ca0132_alt_select_in()
5008 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5015 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5016 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5018 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5020 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5022 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5023 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5026 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5027 chipio_write(codec, 0x18B09C, 0x0000000C); in ca0132_alt_select_in()
5030 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5031 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5034 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5035 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5040 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_select_in()
5043 ca0132_mic_boost_set(codec, 0); in ca0132_alt_select_in()
5047 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5050 r3di_gpio_mic_set(codec, R3DI_REAR_MIC); in ca0132_alt_select_in()
5053 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5056 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5057 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, in ca0132_alt_select_in()
5059 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, in ca0132_alt_select_in()
5061 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5067 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5068 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5070 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5076 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5081 chipio_write(codec, 0x18B098, 0x00000000); in ca0132_alt_select_in()
5082 chipio_write(codec, 0x18B09C, 0x00000000); in ca0132_alt_select_in()
5087 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5088 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5094 ca0113_mmio_gpio_set(codec, 0, true); in ca0132_alt_select_in()
5095 ca0113_mmio_gpio_set(codec, 5, false); in ca0132_alt_select_in()
5099 r3di_gpio_mic_set(codec, R3DI_FRONT_MIC); in ca0132_alt_select_in()
5103 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5111 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5112 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5114 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5116 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5118 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5119 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5123 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5124 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5127 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5128 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5133 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_select_in()
5136 ca0132_cvoice_switch_set(codec); in ca0132_alt_select_in()
5138 snd_hda_power_down_pm(codec); in ca0132_alt_select_in()
5139 return 0; in ca0132_alt_select_in()
5145 static bool ca0132_is_vnode_effective(struct hda_codec *codec, in ca0132_is_vnode_effective() argument
5149 struct ca0132_spec *spec = codec->spec; in ca0132_is_vnode_effective()
5154 nid = spec->shared_out_nid; in ca0132_is_vnode_effective()
5157 nid = spec->shared_mic_nid; in ca0132_is_vnode_effective()
5171 * They return 0 if no changed. Return 1 if changed.
5173 static int ca0132_voicefx_set(struct hda_codec *codec, int enable) in ca0132_voicefx_set() argument
5175 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_set()
5180 tmp = spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ? in ca0132_voicefx_set()
5186 dspio_set_uint_param(codec, ca0132_voicefx.mid, in ca0132_voicefx_set()
5187 ca0132_voicefx.reqs[0], tmp); in ca0132_voicefx_set()
5195 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) in ca0132_effects_set() argument
5197 struct ca0132_spec *spec = codec->spec; in ca0132_effects_set()
5200 int err = 0; in ca0132_effects_set()
5201 int idx = nid - EFFECT_START_NID; in ca0132_effects_set()
5203 if ((idx < 0) || (idx >= num_fx)) in ca0132_effects_set()
5204 return 0; /* no changed */ in ca0132_effects_set()
5209 if (!spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) in ca0132_effects_set()
5210 val = 0; in ca0132_effects_set()
5211 if (spec->cur_out_type == SPEAKER_OUT && nid == X_BASS) { in ca0132_effects_set()
5212 channel_cfg = spec->channel_cfg_val; in ca0132_effects_set()
5215 val = 0; in ca0132_effects_set()
5222 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) in ca0132_effects_set()
5223 val = 0; in ca0132_effects_set()
5225 /* Voice Focus applies to 2-ch Mic, Digital Mic */ in ca0132_effects_set()
5226 if ((nid == VOICE_FOCUS) && (spec->cur_mic_type != DIGITAL_MIC)) in ca0132_effects_set()
5227 val = 0; in ca0132_effects_set()
5231 && (spec->cur_mic_type != REAR_LINE_IN)) { in ca0132_effects_set()
5232 if (spec->effects_switch[CRYSTAL_VOICE - in ca0132_effects_set()
5235 if (spec->effects_switch[VOICE_FOCUS - in ca0132_effects_set()
5242 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_effects_set()
5247 * to module ID 0x47. No clue why. in ca0132_effects_set()
5250 && (spec->cur_mic_type != REAR_LINE_IN)) { in ca0132_effects_set()
5251 if (spec->effects_switch[CRYSTAL_VOICE - in ca0132_effects_set()
5253 if (spec->effects_switch[NOISE_REDUCTION - in ca0132_effects_set()
5261 dspio_set_uint_param(codec, 0x47, 0x00, tmp); in ca0132_effects_set()
5266 spec->in_enum_val == REAR_LINE_IN) in ca0132_effects_set()
5267 val = 0; in ca0132_effects_set()
5270 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n", in ca0132_effects_set()
5273 on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; in ca0132_effects_set()
5274 err = dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_effects_set()
5275 ca0132_effects[idx].reqs[0], on); in ca0132_effects_set()
5277 if (err < 0) in ca0132_effects_set()
5278 return 0; /* no changed */ in ca0132_effects_set()
5286 static int ca0132_pe_switch_set(struct hda_codec *codec) in ca0132_pe_switch_set() argument
5288 struct ca0132_spec *spec = codec->spec; in ca0132_pe_switch_set()
5290 int i, ret = 0; in ca0132_pe_switch_set()
5292 codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n", in ca0132_pe_switch_set()
5293 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]); in ca0132_pe_switch_set()
5296 ca0132_alt_select_out(codec); in ca0132_pe_switch_set()
5298 i = OUT_EFFECT_START_NID - EFFECT_START_NID; in ca0132_pe_switch_set()
5302 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); in ca0132_pe_switch_set()
5308 static int stop_mic1(struct hda_codec *codec) in stop_mic1() argument
5310 struct ca0132_spec *spec = codec->spec; in stop_mic1()
5311 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0, in stop_mic1()
5312 AC_VERB_GET_CONV, 0); in stop_mic1()
5313 if (oldval != 0) in stop_mic1()
5314 snd_hda_codec_write(codec, spec->adcs[0], 0, in stop_mic1()
5316 0); in stop_mic1()
5321 static void resume_mic1(struct hda_codec *codec, unsigned int oldval) in resume_mic1() argument
5323 struct ca0132_spec *spec = codec->spec; in resume_mic1()
5325 if (oldval != 0) in resume_mic1()
5326 snd_hda_codec_write(codec, spec->adcs[0], 0, in resume_mic1()
5334 static int ca0132_cvoice_switch_set(struct hda_codec *codec) in ca0132_cvoice_switch_set() argument
5336 struct ca0132_spec *spec = codec->spec; in ca0132_cvoice_switch_set()
5338 int i, ret = 0; in ca0132_cvoice_switch_set()
5341 codec_dbg(codec, "ca0132_cvoice_switch_set: val=%ld\n", in ca0132_cvoice_switch_set()
5342 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]); in ca0132_cvoice_switch_set()
5344 i = IN_EFFECT_START_NID - EFFECT_START_NID; in ca0132_cvoice_switch_set()
5348 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); in ca0132_cvoice_switch_set()
5351 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0)); in ca0132_cvoice_switch_set()
5354 oldval = stop_mic1(codec); in ca0132_cvoice_switch_set()
5356 ret |= ca0132_alt_set_vipsource(codec, 1); in ca0132_cvoice_switch_set()
5358 ret |= ca0132_set_vipsource(codec, 1); in ca0132_cvoice_switch_set()
5359 resume_mic1(codec, oldval); in ca0132_cvoice_switch_set()
5363 static int ca0132_mic_boost_set(struct hda_codec *codec, long val) in ca0132_mic_boost_set() argument
5365 struct ca0132_spec *spec = codec->spec; in ca0132_mic_boost_set()
5366 int ret = 0; in ca0132_mic_boost_set()
5369 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5370 HDA_INPUT, 0, HDA_AMP_VOLMASK, 3); in ca0132_mic_boost_set()
5372 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5373 HDA_INPUT, 0, HDA_AMP_VOLMASK, 0); in ca0132_mic_boost_set()
5378 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val) in ca0132_alt_mic_boost_set() argument
5380 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_set()
5381 int ret = 0; in ca0132_alt_mic_boost_set()
5383 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_alt_mic_boost_set()
5384 HDA_INPUT, 0, HDA_AMP_VOLMASK, val); in ca0132_alt_mic_boost_set()
5388 static int ae5_headphone_gain_set(struct hda_codec *codec, long val) in ae5_headphone_gain_set() argument
5392 for (i = 0; i < 4; i++) in ae5_headphone_gain_set()
5393 ca0113_mmio_command_set(codec, 0x48, 0x11 + i, in ae5_headphone_gain_set()
5395 return 0; in ae5_headphone_gain_set()
5402 static int zxr_headphone_gain_set(struct hda_codec *codec, long val) in zxr_headphone_gain_set() argument
5404 ca0113_mmio_gpio_set(codec, 1, val); in zxr_headphone_gain_set()
5406 return 0; in zxr_headphone_gain_set()
5412 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_vnode_switch_set() local
5414 hda_nid_t shared_nid = 0; in ca0132_vnode_switch_set()
5416 int ret = 0; in ca0132_vnode_switch_set()
5417 struct ca0132_spec *spec = codec->spec; in ca0132_vnode_switch_set()
5422 spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_vnode_switch_set()
5425 ca0132_alt_select_out(codec); in ca0132_vnode_switch_set()
5427 ca0132_select_out(codec); in ca0132_vnode_switch_set()
5434 spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID]; in ca0132_vnode_switch_set()
5436 ca0132_select_mic(codec); in ca0132_vnode_switch_set()
5442 ca0132_alt_select_out(codec); in ca0132_vnode_switch_set()
5444 ca0132_select_out(codec); in ca0132_vnode_switch_set()
5449 ca0132_select_mic(codec); in ca0132_vnode_switch_set()
5454 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); in ca0132_vnode_switch_set()
5460 mutex_lock(&codec->control_mutex); in ca0132_vnode_switch_set()
5461 pval = kcontrol->private_value; in ca0132_vnode_switch_set()
5462 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, in ca0132_vnode_switch_set()
5463 0, dir); in ca0132_vnode_switch_set()
5465 kcontrol->private_value = pval; in ca0132_vnode_switch_set()
5466 mutex_unlock(&codec->control_mutex); in ca0132_vnode_switch_set()
5473 static void ca0132_alt_bass_redirection_xover_set(struct hda_codec *codec, in ca0132_alt_bass_redirection_xover_set() argument
5476 snd_hda_power_up(codec); in ca0132_alt_bass_redirection_xover_set()
5478 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ, in ca0132_alt_bass_redirection_xover_set()
5481 snd_hda_power_down(codec); in ca0132_alt_bass_redirection_xover_set()
5493 static int ca0132_alt_slider_ctl_set(struct hda_codec *codec, hda_nid_t nid, in ca0132_alt_slider_ctl_set() argument
5496 int i = 0; in ca0132_alt_slider_ctl_set()
5507 snd_hda_power_up(codec); in ca0132_alt_slider_ctl_set()
5509 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5513 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5515 &(lookup[idx - 1]), sizeof(unsigned int)); in ca0132_alt_slider_ctl_set()
5518 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5522 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5527 snd_hda_power_down(codec); in ca0132_alt_slider_ctl_set()
5529 return 0; in ca0132_alt_slider_ctl_set()
5535 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_xbass_xover_slider_ctl_get() local
5536 struct ca0132_spec *spec = codec->spec; in ca0132_alt_xbass_xover_slider_ctl_get()
5537 long *valp = ucontrol->value.integer.value; in ca0132_alt_xbass_xover_slider_ctl_get()
5541 *valp = spec->bass_redirect_xover_freq; in ca0132_alt_xbass_xover_slider_ctl_get()
5543 *valp = spec->xbass_xover_freq; in ca0132_alt_xbass_xover_slider_ctl_get()
5545 return 0; in ca0132_alt_xbass_xover_slider_ctl_get()
5551 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_slider_ctl_get() local
5552 struct ca0132_spec *spec = codec->spec; in ca0132_alt_slider_ctl_get()
5554 long *valp = ucontrol->value.integer.value; in ca0132_alt_slider_ctl_get()
5555 int idx = nid - OUT_EFFECT_START_NID; in ca0132_alt_slider_ctl_get()
5557 *valp = spec->fx_ctl_val[idx]; in ca0132_alt_slider_ctl_get()
5558 return 0; in ca0132_alt_slider_ctl_get()
5562 * The X-bass crossover starts at 10hz, so the min is 1. The
5568 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in ca0132_alt_xbass_xover_slider_info()
5569 uinfo->count = 1; in ca0132_alt_xbass_xover_slider_info()
5570 uinfo->value.integer.min = 1; in ca0132_alt_xbass_xover_slider_info()
5571 uinfo->value.integer.max = 100; in ca0132_alt_xbass_xover_slider_info()
5572 uinfo->value.integer.step = 1; in ca0132_alt_xbass_xover_slider_info()
5574 return 0; in ca0132_alt_xbass_xover_slider_info()
5582 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in ca0132_alt_effect_slider_info()
5583 uinfo->count = chs == 3 ? 2 : 1; in ca0132_alt_effect_slider_info()
5584 uinfo->value.integer.min = 0; in ca0132_alt_effect_slider_info()
5585 uinfo->value.integer.max = 100; in ca0132_alt_effect_slider_info()
5586 uinfo->value.integer.step = 1; in ca0132_alt_effect_slider_info()
5588 return 0; in ca0132_alt_effect_slider_info()
5594 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_xbass_xover_slider_put() local
5595 struct ca0132_spec *spec = codec->spec; in ca0132_alt_xbass_xover_slider_put()
5597 long *valp = ucontrol->value.integer.value; in ca0132_alt_xbass_xover_slider_put()
5602 cur_val = &spec->bass_redirect_xover_freq; in ca0132_alt_xbass_xover_slider_put()
5604 cur_val = &spec->xbass_xover_freq; in ca0132_alt_xbass_xover_slider_put()
5608 return 0; in ca0132_alt_xbass_xover_slider_put()
5614 ca0132_alt_bass_redirection_xover_set(codec, *cur_val); in ca0132_alt_xbass_xover_slider_put()
5616 ca0132_alt_slider_ctl_set(codec, nid, float_xbass_xover_lookup, idx); in ca0132_alt_xbass_xover_slider_put()
5618 return 0; in ca0132_alt_xbass_xover_slider_put()
5624 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_effect_slider_put() local
5625 struct ca0132_spec *spec = codec->spec; in ca0132_alt_effect_slider_put()
5627 long *valp = ucontrol->value.integer.value; in ca0132_alt_effect_slider_put()
5630 idx = nid - EFFECT_START_NID; in ca0132_alt_effect_slider_put()
5632 if (spec->fx_ctl_val[idx] == *valp) in ca0132_alt_effect_slider_put()
5633 return 0; in ca0132_alt_effect_slider_put()
5635 spec->fx_ctl_val[idx] = *valp; in ca0132_alt_effect_slider_put()
5638 ca0132_alt_slider_ctl_set(codec, nid, float_zero_to_one_lookup, idx); in ca0132_alt_effect_slider_put()
5640 return 0; in ca0132_alt_effect_slider_put()
5647 * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
5658 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_mic_boost_info()
5659 uinfo->count = 1; in ca0132_alt_mic_boost_info()
5660 uinfo->value.enumerated.items = MIC_BOOST_NUM_OF_STEPS; in ca0132_alt_mic_boost_info()
5661 if (uinfo->value.enumerated.item >= MIC_BOOST_NUM_OF_STEPS) in ca0132_alt_mic_boost_info()
5662 uinfo->value.enumerated.item = MIC_BOOST_NUM_OF_STEPS - 1; in ca0132_alt_mic_boost_info()
5663 sprintf(namestr, "%d %s", (uinfo->value.enumerated.item * 10), sfx); in ca0132_alt_mic_boost_info()
5664 strcpy(uinfo->value.enumerated.name, namestr); in ca0132_alt_mic_boost_info()
5665 return 0; in ca0132_alt_mic_boost_info()
5671 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_mic_boost_get() local
5672 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_get()
5674 ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val; in ca0132_alt_mic_boost_get()
5675 return 0; in ca0132_alt_mic_boost_get()
5681 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_mic_boost_put() local
5682 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_put()
5683 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_mic_boost_put()
5687 return 0; in ca0132_alt_mic_boost_put()
5689 codec_dbg(codec, "ca0132_alt_mic_boost: boost=%d\n", in ca0132_alt_mic_boost_put()
5692 spec->mic_boost_enum_val = sel; in ca0132_alt_mic_boost_put()
5694 if (spec->in_enum_val != REAR_LINE_IN) in ca0132_alt_mic_boost_put()
5695 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_mic_boost_put()
5701 * Sound BlasterX AE-5 Headphone Gain Controls.
5710 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ae5_headphone_gain_info()
5711 uinfo->count = 1; in ae5_headphone_gain_info()
5712 uinfo->value.enumerated.items = AE5_HEADPHONE_GAIN_MAX; in ae5_headphone_gain_info()
5713 if (uinfo->value.enumerated.item >= AE5_HEADPHONE_GAIN_MAX) in ae5_headphone_gain_info()
5714 uinfo->value.enumerated.item = AE5_HEADPHONE_GAIN_MAX - 1; in ae5_headphone_gain_info()
5716 ae5_headphone_gain_presets[uinfo->value.enumerated.item].name, in ae5_headphone_gain_info()
5718 strcpy(uinfo->value.enumerated.name, namestr); in ae5_headphone_gain_info()
5719 return 0; in ae5_headphone_gain_info()
5725 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_headphone_gain_get() local
5726 struct ca0132_spec *spec = codec->spec; in ae5_headphone_gain_get()
5728 ucontrol->value.enumerated.item[0] = spec->ae5_headphone_gain_val; in ae5_headphone_gain_get()
5729 return 0; in ae5_headphone_gain_get()
5735 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_headphone_gain_put() local
5736 struct ca0132_spec *spec = codec->spec; in ae5_headphone_gain_put()
5737 int sel = ucontrol->value.enumerated.item[0]; in ae5_headphone_gain_put()
5741 return 0; in ae5_headphone_gain_put()
5743 codec_dbg(codec, "ae5_headphone_gain: boost=%d\n", in ae5_headphone_gain_put()
5746 spec->ae5_headphone_gain_val = sel; in ae5_headphone_gain_put()
5748 if (spec->out_enum_val == HEADPHONE_OUT) in ae5_headphone_gain_put()
5749 ae5_headphone_gain_set(codec, spec->ae5_headphone_gain_val); in ae5_headphone_gain_put()
5755 * Sound BlasterX AE-5 sound filter enumerated control.
5764 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ae5_sound_filter_info()
5765 uinfo->count = 1; in ae5_sound_filter_info()
5766 uinfo->value.enumerated.items = AE5_SOUND_FILTER_MAX; in ae5_sound_filter_info()
5767 if (uinfo->value.enumerated.item >= AE5_SOUND_FILTER_MAX) in ae5_sound_filter_info()
5768 uinfo->value.enumerated.item = AE5_SOUND_FILTER_MAX - 1; in ae5_sound_filter_info()
5770 ae5_filter_presets[uinfo->value.enumerated.item].name); in ae5_sound_filter_info()
5771 strcpy(uinfo->value.enumerated.name, namestr); in ae5_sound_filter_info()
5772 return 0; in ae5_sound_filter_info()
5778 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_sound_filter_get() local
5779 struct ca0132_spec *spec = codec->spec; in ae5_sound_filter_get()
5781 ucontrol->value.enumerated.item[0] = spec->ae5_filter_val; in ae5_sound_filter_get()
5782 return 0; in ae5_sound_filter_get()
5788 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_sound_filter_put() local
5789 struct ca0132_spec *spec = codec->spec; in ae5_sound_filter_put()
5790 int sel = ucontrol->value.enumerated.item[0]; in ae5_sound_filter_put()
5794 return 0; in ae5_sound_filter_put()
5796 codec_dbg(codec, "ae5_sound_filter: %s\n", in ae5_sound_filter_put()
5799 spec->ae5_filter_val = sel; in ae5_sound_filter_put()
5801 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, in ae5_sound_filter_put()
5809 * front microphone has no auto-detect, and we need a way to set the rear
5810 * as line-in
5815 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_input_source_info()
5816 uinfo->count = 1; in ca0132_alt_input_source_info()
5817 uinfo->value.enumerated.items = IN_SRC_NUM_OF_INPUTS; in ca0132_alt_input_source_info()
5818 if (uinfo->value.enumerated.item >= IN_SRC_NUM_OF_INPUTS) in ca0132_alt_input_source_info()
5819 uinfo->value.enumerated.item = IN_SRC_NUM_OF_INPUTS - 1; in ca0132_alt_input_source_info()
5820 strcpy(uinfo->value.enumerated.name, in ca0132_alt_input_source_info()
5821 in_src_str[uinfo->value.enumerated.item]); in ca0132_alt_input_source_info()
5822 return 0; in ca0132_alt_input_source_info()
5828 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_input_source_get() local
5829 struct ca0132_spec *spec = codec->spec; in ca0132_alt_input_source_get()
5831 ucontrol->value.enumerated.item[0] = spec->in_enum_val; in ca0132_alt_input_source_get()
5832 return 0; in ca0132_alt_input_source_get()
5838 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_input_source_put() local
5839 struct ca0132_spec *spec = codec->spec; in ca0132_alt_input_source_put()
5840 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_input_source_put()
5844 * The AE-7 has no front microphone, so limit items to 2: rear mic and in ca0132_alt_input_source_put()
5845 * line-in. in ca0132_alt_input_source_put()
5851 return 0; in ca0132_alt_input_source_put()
5853 codec_dbg(codec, "ca0132_alt_input_select: sel=%d, preset=%s\n", in ca0132_alt_input_source_put()
5856 spec->in_enum_val = sel; in ca0132_alt_input_source_put()
5858 ca0132_alt_select_in(codec); in ca0132_alt_input_source_put()
5867 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_output_select_get_info()
5868 uinfo->count = 1; in ca0132_alt_output_select_get_info()
5869 uinfo->value.enumerated.items = NUM_OF_OUTPUTS; in ca0132_alt_output_select_get_info()
5870 if (uinfo->value.enumerated.item >= NUM_OF_OUTPUTS) in ca0132_alt_output_select_get_info()
5871 uinfo->value.enumerated.item = NUM_OF_OUTPUTS - 1; in ca0132_alt_output_select_get_info()
5872 strcpy(uinfo->value.enumerated.name, in ca0132_alt_output_select_get_info()
5873 out_type_str[uinfo->value.enumerated.item]); in ca0132_alt_output_select_get_info()
5874 return 0; in ca0132_alt_output_select_get_info()
5880 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_output_select_get() local
5881 struct ca0132_spec *spec = codec->spec; in ca0132_alt_output_select_get()
5883 ucontrol->value.enumerated.item[0] = spec->out_enum_val; in ca0132_alt_output_select_get()
5884 return 0; in ca0132_alt_output_select_get()
5890 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_output_select_put() local
5891 struct ca0132_spec *spec = codec->spec; in ca0132_alt_output_select_put()
5892 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_output_select_put()
5897 return 0; in ca0132_alt_output_select_put()
5899 codec_dbg(codec, "ca0132_alt_output_select: sel=%d, preset=%s\n", in ca0132_alt_output_select_put()
5902 spec->out_enum_val = sel; in ca0132_alt_output_select_put()
5904 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_alt_output_select_put()
5907 ca0132_alt_select_out(codec); in ca0132_alt_output_select_put()
5918 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_speaker_channel_cfg_get_info()
5919 uinfo->count = 1; in ca0132_alt_speaker_channel_cfg_get_info()
5920 uinfo->value.enumerated.items = items; in ca0132_alt_speaker_channel_cfg_get_info()
5921 if (uinfo->value.enumerated.item >= items) in ca0132_alt_speaker_channel_cfg_get_info()
5922 uinfo->value.enumerated.item = items - 1; in ca0132_alt_speaker_channel_cfg_get_info()
5923 strcpy(uinfo->value.enumerated.name, in ca0132_alt_speaker_channel_cfg_get_info()
5924 speaker_channel_cfgs[uinfo->value.enumerated.item].name); in ca0132_alt_speaker_channel_cfg_get_info()
5925 return 0; in ca0132_alt_speaker_channel_cfg_get_info()
5931 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_speaker_channel_cfg_get() local
5932 struct ca0132_spec *spec = codec->spec; in ca0132_alt_speaker_channel_cfg_get()
5934 ucontrol->value.enumerated.item[0] = spec->channel_cfg_val; in ca0132_alt_speaker_channel_cfg_get()
5935 return 0; in ca0132_alt_speaker_channel_cfg_get()
5941 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_speaker_channel_cfg_put() local
5942 struct ca0132_spec *spec = codec->spec; in ca0132_alt_speaker_channel_cfg_put()
5943 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_speaker_channel_cfg_put()
5947 return 0; in ca0132_alt_speaker_channel_cfg_put()
5949 codec_dbg(codec, "ca0132_alt_speaker_channels: sel=%d, channels=%s\n", in ca0132_alt_speaker_channel_cfg_put()
5952 spec->channel_cfg_val = sel; in ca0132_alt_speaker_channel_cfg_put()
5954 if (spec->out_enum_val == SPEAKER_OUT) in ca0132_alt_speaker_channel_cfg_put()
5955 ca0132_alt_select_out(codec); in ca0132_alt_speaker_channel_cfg_put()
5971 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_svm_setting_info()
5972 uinfo->count = 1; in ca0132_alt_svm_setting_info()
5973 uinfo->value.enumerated.items = NUM_OF_SVM_SETTINGS; in ca0132_alt_svm_setting_info()
5974 if (uinfo->value.enumerated.item >= NUM_OF_SVM_SETTINGS) in ca0132_alt_svm_setting_info()
5975 uinfo->value.enumerated.item = NUM_OF_SVM_SETTINGS - 1; in ca0132_alt_svm_setting_info()
5976 strcpy(uinfo->value.enumerated.name, in ca0132_alt_svm_setting_info()
5977 out_svm_set_enum_str[uinfo->value.enumerated.item]); in ca0132_alt_svm_setting_info()
5978 return 0; in ca0132_alt_svm_setting_info()
5984 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_svm_setting_get() local
5985 struct ca0132_spec *spec = codec->spec; in ca0132_alt_svm_setting_get()
5987 ucontrol->value.enumerated.item[0] = spec->smart_volume_setting; in ca0132_alt_svm_setting_get()
5988 return 0; in ca0132_alt_svm_setting_get()
5994 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_svm_setting_put() local
5995 struct ca0132_spec *spec = codec->spec; in ca0132_alt_svm_setting_put()
5996 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_svm_setting_put()
5998 unsigned int idx = SMART_VOLUME - EFFECT_START_NID; in ca0132_alt_svm_setting_put()
6002 return 0; in ca0132_alt_svm_setting_put()
6004 codec_dbg(codec, "ca0132_alt_svm_setting: sel=%d, preset=%s\n", in ca0132_alt_svm_setting_put()
6007 spec->smart_volume_setting = sel; in ca0132_alt_svm_setting_put()
6010 case 0: in ca0132_alt_svm_setting_put()
6024 dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_alt_svm_setting_put()
6035 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_eq_preset_info()
6036 uinfo->count = 1; in ca0132_alt_eq_preset_info()
6037 uinfo->value.enumerated.items = items; in ca0132_alt_eq_preset_info()
6038 if (uinfo->value.enumerated.item >= items) in ca0132_alt_eq_preset_info()
6039 uinfo->value.enumerated.item = items - 1; in ca0132_alt_eq_preset_info()
6040 strcpy(uinfo->value.enumerated.name, in ca0132_alt_eq_preset_info()
6041 ca0132_alt_eq_presets[uinfo->value.enumerated.item].name); in ca0132_alt_eq_preset_info()
6042 return 0; in ca0132_alt_eq_preset_info()
6048 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_eq_preset_get() local
6049 struct ca0132_spec *spec = codec->spec; in ca0132_alt_eq_preset_get()
6051 ucontrol->value.enumerated.item[0] = spec->eq_preset_val; in ca0132_alt_eq_preset_get()
6052 return 0; in ca0132_alt_eq_preset_get()
6058 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_eq_preset_put() local
6059 struct ca0132_spec *spec = codec->spec; in ca0132_alt_eq_preset_put()
6060 int i, err = 0; in ca0132_alt_eq_preset_put()
6061 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_eq_preset_put()
6065 return 0; in ca0132_alt_eq_preset_put()
6067 codec_dbg(codec, "%s: sel=%d, preset=%s\n", __func__, sel, in ca0132_alt_eq_preset_put()
6070 * Idx 0 is default. in ca0132_alt_eq_preset_put()
6073 for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) { in ca0132_alt_eq_preset_put()
6074 err = dspio_set_uint_param(codec, ca0132_alt_eq_enum.mid, in ca0132_alt_eq_preset_put()
6077 if (err < 0) in ca0132_alt_eq_preset_put()
6081 if (err >= 0) in ca0132_alt_eq_preset_put()
6082 spec->eq_preset_val = sel; in ca0132_alt_eq_preset_put()
6092 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_voicefx_info()
6093 uinfo->count = 1; in ca0132_voicefx_info()
6094 uinfo->value.enumerated.items = items; in ca0132_voicefx_info()
6095 if (uinfo->value.enumerated.item >= items) in ca0132_voicefx_info()
6096 uinfo->value.enumerated.item = items - 1; in ca0132_voicefx_info()
6097 strcpy(uinfo->value.enumerated.name, in ca0132_voicefx_info()
6098 ca0132_voicefx_presets[uinfo->value.enumerated.item].name); in ca0132_voicefx_info()
6099 return 0; in ca0132_voicefx_info()
6105 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_voicefx_get() local
6106 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_get()
6108 ucontrol->value.enumerated.item[0] = spec->voicefx_val; in ca0132_voicefx_get()
6109 return 0; in ca0132_voicefx_get()
6115 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_voicefx_put() local
6116 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_put()
6117 int i, err = 0; in ca0132_voicefx_put()
6118 int sel = ucontrol->value.enumerated.item[0]; in ca0132_voicefx_put()
6121 return 0; in ca0132_voicefx_put()
6123 codec_dbg(codec, "ca0132_voicefx_put: sel=%d, preset=%s\n", in ca0132_voicefx_put()
6127 * Idx 0 is default. in ca0132_voicefx_put()
6130 for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) { in ca0132_voicefx_put()
6131 err = dspio_set_uint_param(codec, ca0132_voicefx.mid, in ca0132_voicefx_put()
6134 if (err < 0) in ca0132_voicefx_put()
6138 if (err >= 0) { in ca0132_voicefx_put()
6139 spec->voicefx_val = sel; in ca0132_voicefx_put()
6141 ca0132_voicefx_set(codec, (sel ? 1 : 0)); in ca0132_voicefx_put()
6150 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_switch_get() local
6151 struct ca0132_spec *spec = codec->spec; in ca0132_switch_get()
6154 long *valp = ucontrol->value.integer.value; in ca0132_switch_get()
6159 *valp = spec->vnode_lswitch[nid - VNODE_START_NID]; in ca0132_switch_get()
6163 *valp = spec->vnode_rswitch[nid - VNODE_START_NID]; in ca0132_switch_get()
6166 return 0; in ca0132_switch_get()
6171 *valp = spec->effects_switch[nid - EFFECT_START_NID]; in ca0132_switch_get()
6172 return 0; in ca0132_switch_get()
6176 if (nid == spec->input_pins[0]) { in ca0132_switch_get()
6177 *valp = spec->cur_mic_boost; in ca0132_switch_get()
6178 return 0; in ca0132_switch_get()
6182 *valp = spec->zxr_gain_set; in ca0132_switch_get()
6183 return 0; in ca0132_switch_get()
6187 *valp = spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT]; in ca0132_switch_get()
6188 return 0; in ca0132_switch_get()
6192 *valp = spec->bass_redirection_val; in ca0132_switch_get()
6193 return 0; in ca0132_switch_get()
6196 return 0; in ca0132_switch_get()
6202 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_switch_put() local
6203 struct ca0132_spec *spec = codec->spec; in ca0132_switch_put()
6206 long *valp = ucontrol->value.integer.value; in ca0132_switch_put()
6209 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n", in ca0132_switch_put()
6212 snd_hda_power_up(codec); in ca0132_switch_put()
6216 spec->vnode_lswitch[nid - VNODE_START_NID] = *valp; in ca0132_switch_put()
6220 spec->vnode_rswitch[nid - VNODE_START_NID] = *valp; in ca0132_switch_put()
6229 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6230 changed = ca0132_pe_switch_set(codec); in ca0132_switch_put()
6236 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6237 changed = ca0132_cvoice_switch_set(codec); in ca0132_switch_put()
6244 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6245 changed = ca0132_effects_set(codec, nid, *valp); in ca0132_switch_put()
6250 if (nid == spec->input_pins[0]) { in ca0132_switch_put()
6251 spec->cur_mic_boost = *valp; in ca0132_switch_put()
6253 if (spec->in_enum_val != REAR_LINE_IN) in ca0132_switch_put()
6254 changed = ca0132_mic_boost_set(codec, *valp); in ca0132_switch_put()
6257 if (spec->cur_mic_type != DIGITAL_MIC) in ca0132_switch_put()
6258 changed = ca0132_mic_boost_set(codec, *valp); in ca0132_switch_put()
6265 spec->zxr_gain_set = *valp; in ca0132_switch_put()
6266 if (spec->cur_out_type == HEADPHONE_OUT) in ca0132_switch_put()
6267 changed = zxr_headphone_gain_set(codec, *valp); in ca0132_switch_put()
6269 changed = 0; in ca0132_switch_put()
6275 spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT] = *valp; in ca0132_switch_put()
6276 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_switch_put()
6277 ca0132_alt_set_full_range_speaker(codec); in ca0132_switch_put()
6279 changed = 0; in ca0132_switch_put()
6283 spec->bass_redirection_val = *valp; in ca0132_switch_put()
6284 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_switch_put()
6285 ca0132_alt_surround_set_bass_redirection(codec, *valp); in ca0132_switch_put()
6287 changed = 0; in ca0132_switch_put()
6291 snd_hda_power_down(codec); in ca0132_switch_put()
6303 static void ca0132_alt_dsp_volume_put(struct hda_codec *codec, hda_nid_t nid) in ca0132_alt_dsp_volume_put() argument
6305 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_volume_put()
6314 lookup_val = spec->vnode_lvol[nid - VNODE_START_NID]; in ca0132_alt_dsp_volume_put()
6316 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6318 ca0132_alt_vol_ctls[dsp_dir].reqs[0], in ca0132_alt_dsp_volume_put()
6321 lookup_val = spec->vnode_rvol[nid - VNODE_START_NID]; in ca0132_alt_dsp_volume_put()
6323 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6328 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6336 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_info() local
6337 struct ca0132_spec *spec = codec->spec; in ca0132_volume_info()
6347 nid = spec->shared_out_nid; in ca0132_volume_info()
6348 mutex_lock(&codec->control_mutex); in ca0132_volume_info()
6349 pval = kcontrol->private_value; in ca0132_volume_info()
6350 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6352 kcontrol->private_value = pval; in ca0132_volume_info()
6353 mutex_unlock(&codec->control_mutex); in ca0132_volume_info()
6357 nid = spec->shared_mic_nid; in ca0132_volume_info()
6358 mutex_lock(&codec->control_mutex); in ca0132_volume_info()
6359 pval = kcontrol->private_value; in ca0132_volume_info()
6360 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6362 kcontrol->private_value = pval; in ca0132_volume_info()
6363 mutex_unlock(&codec->control_mutex); in ca0132_volume_info()
6374 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_get() local
6375 struct ca0132_spec *spec = codec->spec; in ca0132_volume_get()
6378 long *valp = ucontrol->value.integer.value; in ca0132_volume_get()
6382 *valp = spec->vnode_lvol[nid - VNODE_START_NID]; in ca0132_volume_get()
6386 *valp = spec->vnode_rvol[nid - VNODE_START_NID]; in ca0132_volume_get()
6389 return 0; in ca0132_volume_get()
6395 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_put() local
6396 struct ca0132_spec *spec = codec->spec; in ca0132_volume_put()
6399 long *valp = ucontrol->value.integer.value; in ca0132_volume_put()
6400 hda_nid_t shared_nid = 0; in ca0132_volume_put()
6406 spec->vnode_lvol[nid - VNODE_START_NID] = *valp; in ca0132_volume_put()
6410 spec->vnode_rvol[nid - VNODE_START_NID] = *valp; in ca0132_volume_put()
6415 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); in ca0132_volume_put()
6420 snd_hda_power_up(codec); in ca0132_volume_put()
6421 mutex_lock(&codec->control_mutex); in ca0132_volume_put()
6422 pval = kcontrol->private_value; in ca0132_volume_put()
6423 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, in ca0132_volume_put()
6424 0, dir); in ca0132_volume_put()
6426 kcontrol->private_value = pval; in ca0132_volume_put()
6427 mutex_unlock(&codec->control_mutex); in ca0132_volume_put()
6428 snd_hda_power_down(codec); in ca0132_volume_put()
6442 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_volume_put() local
6443 struct ca0132_spec *spec = codec->spec; in ca0132_alt_volume_put()
6446 long *valp = ucontrol->value.integer.value; in ca0132_alt_volume_put()
6447 hda_nid_t vnid = 0; in ca0132_alt_volume_put()
6451 case 0x02: in ca0132_alt_volume_put()
6454 case 0x07: in ca0132_alt_volume_put()
6461 spec->vnode_lvol[vnid - VNODE_START_NID] = *valp; in ca0132_alt_volume_put()
6465 spec->vnode_rvol[vnid - VNODE_START_NID] = *valp; in ca0132_alt_volume_put()
6469 snd_hda_power_up(codec); in ca0132_alt_volume_put()
6470 ca0132_alt_dsp_volume_put(codec, vnid); in ca0132_alt_volume_put()
6471 mutex_lock(&codec->control_mutex); in ca0132_alt_volume_put()
6473 mutex_unlock(&codec->control_mutex); in ca0132_alt_volume_put()
6474 snd_hda_power_down(codec); in ca0132_alt_volume_put()
6482 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_tlv() local
6483 struct ca0132_spec *spec = codec->spec; in ca0132_volume_tlv()
6493 nid = spec->shared_out_nid; in ca0132_volume_tlv()
6494 mutex_lock(&codec->control_mutex); in ca0132_volume_tlv()
6495 pval = kcontrol->private_value; in ca0132_volume_tlv()
6496 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6498 kcontrol->private_value = pval; in ca0132_volume_tlv()
6499 mutex_unlock(&codec->control_mutex); in ca0132_volume_tlv()
6503 nid = spec->shared_mic_nid; in ca0132_volume_tlv()
6504 mutex_lock(&codec->control_mutex); in ca0132_volume_tlv()
6505 pval = kcontrol->private_value; in ca0132_volume_tlv()
6506 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6508 kcontrol->private_value = pval; in ca0132_volume_tlv()
6509 mutex_unlock(&codec->control_mutex); in ca0132_volume_tlv()
6518 static int ca0132_alt_add_effect_slider(struct hda_codec *codec, hda_nid_t nid, in ca0132_alt_add_effect_slider() argument
6524 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6541 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6545 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in ca0132_alt_add_effect_slider()
6553 static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid, in add_fx_switch() argument
6556 struct ca0132_spec *spec = codec->spec; in add_fx_switch()
6569 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in add_fx_switch()
6572 static int add_voicefx(struct hda_codec *codec) in add_voicefx() argument
6576 VOICEFX, 1, 0, HDA_INPUT); in add_voicefx()
6580 return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec)); in add_voicefx()
6584 static int add_ca0132_alt_eq_presets(struct hda_codec *codec) in add_ca0132_alt_eq_presets() argument
6588 EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT); in add_ca0132_alt_eq_presets()
6592 return snd_hda_ctl_add(codec, EQ_PRESET_ENUM, in add_ca0132_alt_eq_presets()
6593 snd_ctl_new1(&knew, codec)); in add_ca0132_alt_eq_presets()
6601 static int ca0132_alt_add_svm_enum(struct hda_codec *codec) in ca0132_alt_add_svm_enum() argument
6605 SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_svm_enum()
6609 return snd_hda_ctl_add(codec, SMART_VOLUME_ENUM, in ca0132_alt_add_svm_enum()
6610 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_svm_enum()
6618 static int ca0132_alt_add_output_enum(struct hda_codec *codec) in ca0132_alt_add_output_enum() argument
6622 OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_output_enum()
6626 return snd_hda_ctl_add(codec, OUTPUT_SOURCE_ENUM, in ca0132_alt_add_output_enum()
6627 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_output_enum()
6635 static int ca0132_alt_add_speaker_channel_cfg_enum(struct hda_codec *codec) in ca0132_alt_add_speaker_channel_cfg_enum() argument
6639 SPEAKER_CHANNEL_CFG_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_speaker_channel_cfg_enum()
6643 return snd_hda_ctl_add(codec, SPEAKER_CHANNEL_CFG_ENUM, in ca0132_alt_add_speaker_channel_cfg_enum()
6644 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_speaker_channel_cfg_enum()
6652 static int ca0132_alt_add_front_full_range_switch(struct hda_codec *codec) in ca0132_alt_add_front_full_range_switch() argument
6655 CA0132_CODEC_MUTE_MONO("Full-Range Front Speakers", in ca0132_alt_add_front_full_range_switch()
6658 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_FRONT, in ca0132_alt_add_front_full_range_switch()
6659 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_front_full_range_switch()
6662 static int ca0132_alt_add_rear_full_range_switch(struct hda_codec *codec) in ca0132_alt_add_rear_full_range_switch() argument
6665 CA0132_CODEC_MUTE_MONO("Full-Range Rear Speakers", in ca0132_alt_add_rear_full_range_switch()
6668 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_REAR, in ca0132_alt_add_rear_full_range_switch()
6669 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_rear_full_range_switch()
6674 * channel on speakers that are set as not being full-range. On configurations
6676 * replacement for X-Bass on configurations with an LFE channel.
6678 static int ca0132_alt_add_bass_redirection_crossover(struct hda_codec *codec) in ca0132_alt_add_bass_redirection_crossover() argument
6682 HDA_CODEC_VOLUME_MONO(namestr, BASS_REDIRECTION_XOVER, 1, 0, in ca0132_alt_add_bass_redirection_crossover()
6690 return snd_hda_ctl_add(codec, BASS_REDIRECTION_XOVER, in ca0132_alt_add_bass_redirection_crossover()
6691 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_bass_redirection_crossover()
6694 static int ca0132_alt_add_bass_redirection_switch(struct hda_codec *codec) in ca0132_alt_add_bass_redirection_switch() argument
6701 return snd_hda_ctl_add(codec, BASS_REDIRECTION, in ca0132_alt_add_bass_redirection_switch()
6702 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_bass_redirection_switch()
6707 * because the front microphone has no auto-detect, and Line-in has to be set
6710 static int ca0132_alt_add_input_enum(struct hda_codec *codec) in ca0132_alt_add_input_enum() argument
6714 INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_input_enum()
6718 return snd_hda_ctl_add(codec, INPUT_SOURCE_ENUM, in ca0132_alt_add_input_enum()
6719 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_input_enum()
6723 * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
6726 static int ca0132_alt_add_mic_boost_enum(struct hda_codec *codec) in ca0132_alt_add_mic_boost_enum() argument
6730 MIC_BOOST_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_mic_boost_enum()
6734 return snd_hda_ctl_add(codec, MIC_BOOST_ENUM, in ca0132_alt_add_mic_boost_enum()
6735 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_mic_boost_enum()
6740 * Add headphone gain enumerated control for the AE-5. This switches between
6741 * three modes, low, medium, and high. When non-headphone outputs are selected,
6744 static int ae5_add_headphone_gain_enum(struct hda_codec *codec) in ae5_add_headphone_gain_enum() argument
6747 HDA_CODEC_MUTE_MONO("AE-5: Headphone Gain", in ae5_add_headphone_gain_enum()
6748 AE5_HEADPHONE_GAIN_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_headphone_gain_enum()
6752 return snd_hda_ctl_add(codec, AE5_HEADPHONE_GAIN_ENUM, in ae5_add_headphone_gain_enum()
6753 snd_ctl_new1(&knew, codec)); in ae5_add_headphone_gain_enum()
6757 * Add sound filter enumerated control for the AE-5. This adds three different
6761 static int ae5_add_sound_filter_enum(struct hda_codec *codec) in ae5_add_sound_filter_enum() argument
6764 HDA_CODEC_MUTE_MONO("AE-5: Sound Filter", in ae5_add_sound_filter_enum()
6765 AE5_SOUND_FILTER_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_sound_filter_enum()
6769 return snd_hda_ctl_add(codec, AE5_SOUND_FILTER_ENUM, in ae5_add_sound_filter_enum()
6770 snd_ctl_new1(&knew, codec)); in ae5_add_sound_filter_enum()
6773 static int zxr_add_headphone_gain_switch(struct hda_codec *codec) in zxr_add_headphone_gain_switch() argument
6779 return snd_hda_ctl_add(codec, ZXR_HEADPHONE_GAIN, in zxr_add_headphone_gain_switch()
6780 snd_ctl_new1(&knew, codec)); in zxr_add_headphone_gain_switch()
6793 * I think this has to do with the pin for rear surround being 0x11,
6794 * and the center/lfe being 0x10. Usually the pin order is the opposite.
6810 static void ca0132_alt_add_chmap_ctls(struct hda_codec *codec) in ca0132_alt_add_chmap_ctls() argument
6812 int err = 0; in ca0132_alt_add_chmap_ctls()
6815 list_for_each_entry(pcm, &codec->pcm_list_head, list) { in ca0132_alt_add_chmap_ctls()
6817 &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK]; in ca0132_alt_add_chmap_ctls()
6822 if (hinfo->channels_max == 6) { in ca0132_alt_add_chmap_ctls()
6823 err = snd_pcm_add_chmap_ctls(pcm->pcm, in ca0132_alt_add_chmap_ctls()
6825 elem, hinfo->channels_max, 0, &chmap); in ca0132_alt_add_chmap_ctls()
6826 if (err < 0) in ca0132_alt_add_chmap_ctls()
6827 codec_dbg(codec, "snd_pcm_add_chmap_ctls failed!"); in ca0132_alt_add_chmap_ctls()
6841 HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
6842 HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
6843 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6844 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6845 CA0132_CODEC_MUTE_MONO("Mic1-Boost (30dB) Capture Switch",
6846 0x12, 1, HDA_INPUT),
6859 * Desktop specific control mixer. Removes auto-detect for mic, and adds
6864 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6866 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6867 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6868 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6869 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6870 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6871 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6872 CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
6874 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6875 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6886 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6888 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6889 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6890 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6891 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6892 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6893 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6896 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6897 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6903 static int ca0132_build_controls(struct hda_codec *codec) in ca0132_build_controls() argument
6905 struct ca0132_spec *spec = codec->spec; in ca0132_build_controls()
6907 int err = 0; in ca0132_build_controls()
6910 for (i = 0; i < spec->num_mixers; i++) { in ca0132_build_controls()
6911 err = snd_hda_add_new_ctls(codec, spec->mixers[i]); in ca0132_build_controls()
6912 if (err < 0) in ca0132_build_controls()
6917 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, in ca0132_build_controls()
6918 spec->tlv); in ca0132_build_controls()
6919 snd_hda_add_vmaster(codec, "Master Playback Volume", in ca0132_build_controls()
6920 spec->tlv, ca0132_alt_follower_pfxs, in ca0132_build_controls()
6922 err = __snd_hda_add_vmaster(codec, "Master Playback Switch", in ca0132_build_controls()
6925 true, &spec->vmaster_mute.sw_kctl); in ca0132_build_controls()
6926 if (err < 0) in ca0132_build_controls()
6934 for (i = 0; i < num_fx; i++) { in ca0132_build_controls()
6937 if (i == (ECHO_CANCELLATION - IN_EFFECT_START_NID + in ca0132_build_controls()
6942 err = add_fx_switch(codec, ca0132_effects[i].nid, in ca0132_build_controls()
6945 if (err < 0) in ca0132_build_controls()
6949 * If codec has use_alt_controls set to true, add effect level sliders, in ca0132_build_controls()
6954 err = ca0132_alt_add_svm_enum(codec); in ca0132_build_controls()
6955 if (err < 0) in ca0132_build_controls()
6958 err = add_ca0132_alt_eq_presets(codec); in ca0132_build_controls()
6959 if (err < 0) in ca0132_build_controls()
6962 err = add_fx_switch(codec, PLAY_ENHANCEMENT, in ca0132_build_controls()
6963 "Enable OutFX", 0); in ca0132_build_controls()
6964 if (err < 0) in ca0132_build_controls()
6967 err = add_fx_switch(codec, CRYSTAL_VOICE, in ca0132_build_controls()
6969 if (err < 0) in ca0132_build_controls()
6972 num_sliders = OUT_EFFECTS_COUNT - 1; in ca0132_build_controls()
6973 for (i = 0; i < num_sliders; i++) { in ca0132_build_controls()
6974 err = ca0132_alt_add_effect_slider(codec, in ca0132_build_controls()
6978 if (err < 0) in ca0132_build_controls()
6982 err = ca0132_alt_add_effect_slider(codec, XBASS_XOVER, in ca0132_build_controls()
6983 "X-Bass Crossover", EFX_DIR_OUT); in ca0132_build_controls()
6985 if (err < 0) in ca0132_build_controls()
6988 err = add_fx_switch(codec, PLAY_ENHANCEMENT, in ca0132_build_controls()
6989 "PlayEnhancement", 0); in ca0132_build_controls()
6990 if (err < 0) in ca0132_build_controls()
6993 err = add_fx_switch(codec, CRYSTAL_VOICE, in ca0132_build_controls()
6995 if (err < 0) in ca0132_build_controls()
6998 err = add_voicefx(codec); in ca0132_build_controls()
6999 if (err < 0) in ca0132_build_controls()
7003 * If the codec uses alt_functions, you need the enumerated controls in ca0132_build_controls()
7008 err = ca0132_alt_add_output_enum(codec); in ca0132_build_controls()
7009 if (err < 0) in ca0132_build_controls()
7011 err = ca0132_alt_add_speaker_channel_cfg_enum(codec); in ca0132_build_controls()
7012 if (err < 0) in ca0132_build_controls()
7014 err = ca0132_alt_add_front_full_range_switch(codec); in ca0132_build_controls()
7015 if (err < 0) in ca0132_build_controls()
7017 err = ca0132_alt_add_rear_full_range_switch(codec); in ca0132_build_controls()
7018 if (err < 0) in ca0132_build_controls()
7020 err = ca0132_alt_add_bass_redirection_crossover(codec); in ca0132_build_controls()
7021 if (err < 0) in ca0132_build_controls()
7023 err = ca0132_alt_add_bass_redirection_switch(codec); in ca0132_build_controls()
7024 if (err < 0) in ca0132_build_controls()
7026 err = ca0132_alt_add_mic_boost_enum(codec); in ca0132_build_controls()
7027 if (err < 0) in ca0132_build_controls()
7031 * header on the card, and aux-in is handled by the DBPro board. in ca0132_build_controls()
7034 err = ca0132_alt_add_input_enum(codec); in ca0132_build_controls()
7035 if (err < 0) in ca0132_build_controls()
7043 err = ae5_add_headphone_gain_enum(codec); in ca0132_build_controls()
7044 if (err < 0) in ca0132_build_controls()
7046 err = ae5_add_sound_filter_enum(codec); in ca0132_build_controls()
7047 if (err < 0) in ca0132_build_controls()
7051 err = zxr_add_headphone_gain_switch(codec); in ca0132_build_controls()
7052 if (err < 0) in ca0132_build_controls()
7060 add_tuning_ctls(codec); in ca0132_build_controls()
7063 err = snd_hda_jack_add_kctls(codec, &spec->autocfg); in ca0132_build_controls()
7064 if (err < 0) in ca0132_build_controls()
7067 if (spec->dig_out) { in ca0132_build_controls()
7068 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, in ca0132_build_controls()
7069 spec->dig_out); in ca0132_build_controls()
7070 if (err < 0) in ca0132_build_controls()
7072 err = snd_hda_create_spdif_share_sw(codec, &spec->multiout); in ca0132_build_controls()
7073 if (err < 0) in ca0132_build_controls()
7075 /* spec->multiout.share_spdif = 1; */ in ca0132_build_controls()
7078 if (spec->dig_in) { in ca0132_build_controls()
7079 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); in ca0132_build_controls()
7080 if (err < 0) in ca0132_build_controls()
7085 ca0132_alt_add_chmap_ctls(codec); in ca0132_build_controls()
7087 return 0; in ca0132_build_controls()
7090 static int dbpro_build_controls(struct hda_codec *codec) in dbpro_build_controls() argument
7092 struct ca0132_spec *spec = codec->spec; in dbpro_build_controls()
7093 int err = 0; in dbpro_build_controls()
7095 if (spec->dig_out) { in dbpro_build_controls()
7096 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, in dbpro_build_controls()
7097 spec->dig_out); in dbpro_build_controls()
7098 if (err < 0) in dbpro_build_controls()
7102 if (spec->dig_in) { in dbpro_build_controls()
7103 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); in dbpro_build_controls()
7104 if (err < 0) in dbpro_build_controls()
7108 return 0; in dbpro_build_controls()
7154 static int ca0132_build_pcms(struct hda_codec *codec) in ca0132_build_pcms() argument
7156 struct ca0132_spec *spec = codec->spec; in ca0132_build_pcms()
7159 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog"); in ca0132_build_pcms()
7161 return -ENOMEM; in ca0132_build_pcms()
7163 info->own_chmap = true; in ca0132_build_pcms()
7164 info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap in ca0132_build_pcms()
7167 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback; in ca0132_build_pcms()
7168 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; in ca0132_build_pcms()
7169 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = in ca0132_build_pcms()
7170 spec->multiout.max_channels; in ca0132_build_pcms()
7171 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in ca0132_build_pcms()
7172 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7173 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in ca0132_build_pcms()
7177 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2"); in ca0132_build_pcms()
7179 return -ENOMEM; in ca0132_build_pcms()
7180 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in ca0132_build_pcms()
7182 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7183 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[1]; in ca0132_build_pcms()
7186 info = snd_hda_codec_pcm_new(codec, "CA0132 What U Hear"); in ca0132_build_pcms()
7188 return -ENOMEM; in ca0132_build_pcms()
7189 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in ca0132_build_pcms()
7190 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7191 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[2]; in ca0132_build_pcms()
7193 if (!spec->dig_out && !spec->dig_in) in ca0132_build_pcms()
7194 return 0; in ca0132_build_pcms()
7196 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital"); in ca0132_build_pcms()
7198 return -ENOMEM; in ca0132_build_pcms()
7199 info->pcm_type = HDA_PCM_TYPE_SPDIF; in ca0132_build_pcms()
7200 if (spec->dig_out) { in ca0132_build_pcms()
7201 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = in ca0132_build_pcms()
7203 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; in ca0132_build_pcms()
7205 if (spec->dig_in) { in ca0132_build_pcms()
7206 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in ca0132_build_pcms()
7208 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; in ca0132_build_pcms()
7211 return 0; in ca0132_build_pcms()
7214 static int dbpro_build_pcms(struct hda_codec *codec) in dbpro_build_pcms() argument
7216 struct ca0132_spec *spec = codec->spec; in dbpro_build_pcms()
7219 info = snd_hda_codec_pcm_new(codec, "CA0132 Alt Analog"); in dbpro_build_pcms()
7221 return -ENOMEM; in dbpro_build_pcms()
7222 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in dbpro_build_pcms()
7223 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in dbpro_build_pcms()
7224 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in dbpro_build_pcms()
7227 if (!spec->dig_out && !spec->dig_in) in dbpro_build_pcms()
7228 return 0; in dbpro_build_pcms()
7230 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital"); in dbpro_build_pcms()
7232 return -ENOMEM; in dbpro_build_pcms()
7233 info->pcm_type = HDA_PCM_TYPE_SPDIF; in dbpro_build_pcms()
7234 if (spec->dig_out) { in dbpro_build_pcms()
7235 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = in dbpro_build_pcms()
7237 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; in dbpro_build_pcms()
7239 if (spec->dig_in) { in dbpro_build_pcms()
7240 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in dbpro_build_pcms()
7242 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; in dbpro_build_pcms()
7245 return 0; in dbpro_build_pcms()
7248 static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac) in init_output() argument
7251 snd_hda_set_pin_ctl(codec, pin, PIN_HP); in init_output()
7252 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) in init_output()
7253 snd_hda_codec_write(codec, pin, 0, in init_output()
7257 if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP)) in init_output()
7258 snd_hda_codec_write(codec, dac, 0, in init_output()
7262 static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc) in init_input() argument
7265 snd_hda_set_pin_ctl(codec, pin, PIN_VREF80); in init_input()
7266 if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP) in init_input()
7267 snd_hda_codec_write(codec, pin, 0, in init_input()
7269 AMP_IN_UNMUTE(0)); in init_input()
7271 if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP)) { in init_input()
7272 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, in init_input()
7273 AMP_IN_UNMUTE(0)); in init_input()
7275 /* init to 0 dB and unmute. */ in init_input()
7276 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7277 HDA_AMP_VOLMASK, 0x5a); in init_input()
7278 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7279 HDA_AMP_MUTE, 0); in init_input()
7283 static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir) in refresh_amp_caps() argument
7287 caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ? in refresh_amp_caps()
7289 snd_hda_override_amp_caps(codec, nid, dir, caps); in refresh_amp_caps()
7293 * Switch between Digital built-in mic and analog mic.
7295 static void ca0132_set_dmic(struct hda_codec *codec, int enable) in ca0132_set_dmic() argument
7297 struct ca0132_spec *spec = codec->spec; in ca0132_set_dmic()
7302 codec_dbg(codec, "ca0132_set_dmic: enable=%d\n", enable); in ca0132_set_dmic()
7304 oldval = stop_mic1(codec); in ca0132_set_dmic()
7305 ca0132_set_vipsource(codec, 0); in ca0132_set_dmic()
7307 /* set DMic input as 2-ch */ in ca0132_set_dmic()
7309 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7311 val = spec->dmic_ctl; in ca0132_set_dmic()
7312 val |= 0x80; in ca0132_set_dmic()
7313 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7316 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7317 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1); in ca0132_set_dmic()
7321 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7323 val = spec->dmic_ctl; in ca0132_set_dmic()
7325 val &= 0x5f; in ca0132_set_dmic()
7326 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7329 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7330 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0); in ca0132_set_dmic()
7332 ca0132_set_vipsource(codec, 1); in ca0132_set_dmic()
7333 resume_mic1(codec, oldval); in ca0132_set_dmic()
7339 static void ca0132_init_dmic(struct hda_codec *codec) in ca0132_init_dmic() argument
7341 struct ca0132_spec *spec = codec->spec; in ca0132_init_dmic()
7349 * Bit 2-0: MPIO select in ca0132_init_dmic()
7351 * Bit 7-4: reserved in ca0132_init_dmic()
7353 val = 0x01; in ca0132_init_dmic()
7354 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7358 * Bit 2-0: Data1 MPIO select in ca0132_init_dmic()
7360 * Bit 6-4: Data2 MPIO select in ca0132_init_dmic()
7363 val = 0x83; in ca0132_init_dmic()
7364 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7367 /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first. in ca0132_init_dmic()
7368 * Bit 3-0: Channel mask in ca0132_init_dmic()
7375 val = 0x33; in ca0132_init_dmic()
7377 val = 0x23; in ca0132_init_dmic()
7379 spec->dmic_ctl = val; in ca0132_init_dmic()
7380 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7387 static void ca0132_init_analog_mic2(struct hda_codec *codec) in ca0132_init_analog_mic2() argument
7389 struct ca0132_spec *spec = codec->spec; in ca0132_init_analog_mic2()
7391 mutex_lock(&spec->chipio_mutex); in ca0132_init_analog_mic2()
7392 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7393 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); in ca0132_init_analog_mic2()
7394 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7395 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in ca0132_init_analog_mic2()
7396 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7397 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in ca0132_init_analog_mic2()
7398 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7399 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x2D); in ca0132_init_analog_mic2()
7400 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7401 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in ca0132_init_analog_mic2()
7402 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7403 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in ca0132_init_analog_mic2()
7404 mutex_unlock(&spec->chipio_mutex); in ca0132_init_analog_mic2()
7407 static void ca0132_refresh_widget_caps(struct hda_codec *codec) in ca0132_refresh_widget_caps() argument
7409 struct ca0132_spec *spec = codec->spec; in ca0132_refresh_widget_caps()
7412 codec_dbg(codec, "ca0132_refresh_widget_caps.\n"); in ca0132_refresh_widget_caps()
7413 snd_hda_codec_update_widgets(codec); in ca0132_refresh_widget_caps()
7415 for (i = 0; i < spec->multiout.num_dacs; i++) in ca0132_refresh_widget_caps()
7416 refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT); in ca0132_refresh_widget_caps()
7418 for (i = 0; i < spec->num_outputs; i++) in ca0132_refresh_widget_caps()
7419 refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT); in ca0132_refresh_widget_caps()
7421 for (i = 0; i < spec->num_inputs; i++) { in ca0132_refresh_widget_caps()
7422 refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT); in ca0132_refresh_widget_caps()
7423 refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT); in ca0132_refresh_widget_caps()
7431 /* Non-zero values are floating point 0.000198. */
7432 0x394f9e38, 0x394f9e38, 0x00000000, 0x00000000, 0x00000000, 0x00000000
7436 /* Non-zero values are floating point 0.000220. */
7437 0x00000000, 0x00000000, 0x3966afcd, 0x3966afcd, 0x3966afcd, 0x3966afcd
7441 /* Non-zero values are floating point 0.000100. */
7442 0x00000000, 0x00000000, 0x38d1b717, 0x38d1b717, 0x38d1b717, 0x38d1b717
7448 static void ca0132_alt_init_speaker_tuning(struct hda_codec *codec) in ca0132_alt_init_speaker_tuning() argument
7450 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init_speaker_tuning()
7471 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp); in ca0132_alt_init_speaker_tuning()
7476 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7481 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7484 for (i = 0; i < 6; i++) in ca0132_alt_init_speaker_tuning()
7485 dspio_set_uint_param(codec, 0x96, in ca0132_alt_init_speaker_tuning()
7493 static void ca0132_alt_create_dummy_stream(struct hda_codec *codec) in ca0132_alt_create_dummy_stream() argument
7495 struct ca0132_spec *spec = codec->spec; in ca0132_alt_create_dummy_stream()
7499 SNDRV_PCM_FORMAT_S32_LE, 32, 0); in ca0132_alt_create_dummy_stream()
7501 snd_hda_codec_setup_stream(codec, spec->dacs[0], spec->dsp_stream_id, in ca0132_alt_create_dummy_stream()
7502 0, stream_format); in ca0132_alt_create_dummy_stream()
7504 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_alt_create_dummy_stream()
7508 * Initialize mic for non-chromebook ca0132 implementations.
7510 static void ca0132_alt_init_analog_mics(struct hda_codec *codec) in ca0132_alt_init_analog_mics() argument
7512 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init_analog_mics()
7516 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_init_analog_mics()
7517 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_init_analog_mics()
7519 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7523 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_init_analog_mics()
7526 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000); in ca0132_alt_init_analog_mics()
7527 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000); in ca0132_alt_init_analog_mics()
7529 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7531 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_alt_init_analog_mics()
7535 * Sets the source of stream 0x14 to connpointID 0x48, and the destination
7536 * connpointID to 0x91. If this isn't done, the destination is 0x71, and
7540 static void sbz_connect_streams(struct hda_codec *codec) in sbz_connect_streams() argument
7542 struct ca0132_spec *spec = codec->spec; in sbz_connect_streams()
7544 mutex_lock(&spec->chipio_mutex); in sbz_connect_streams()
7546 codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n"); in sbz_connect_streams()
7548 chipio_set_stream_channels(codec, 0x0C, 6); in sbz_connect_streams()
7549 chipio_set_stream_control(codec, 0x0C, 1); in sbz_connect_streams()
7551 /* This value is 0x43 for 96khz, and 0x83 for 192khz. */ in sbz_connect_streams()
7552 chipio_write_no_mutex(codec, 0x18a020, 0x00000043); in sbz_connect_streams()
7554 /* Setup stream 0x14 with it's source and destination points */ in sbz_connect_streams()
7555 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91); in sbz_connect_streams()
7556 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000); in sbz_connect_streams()
7557 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000); in sbz_connect_streams()
7558 chipio_set_stream_channels(codec, 0x14, 2); in sbz_connect_streams()
7559 chipio_set_stream_control(codec, 0x14, 1); in sbz_connect_streams()
7561 codec_dbg(codec, "Connect Streams exited, mutex released.\n"); in sbz_connect_streams()
7563 mutex_unlock(&spec->chipio_mutex); in sbz_connect_streams()
7572 static void sbz_chipio_startup_data(struct hda_codec *codec) in sbz_chipio_startup_data() argument
7574 struct ca0132_spec *spec = codec->spec; in sbz_chipio_startup_data()
7576 mutex_lock(&spec->chipio_mutex); in sbz_chipio_startup_data()
7577 codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n"); in sbz_chipio_startup_data()
7580 chipio_write_no_mutex(codec, 0x190060, 0x0001f8c0); in sbz_chipio_startup_data()
7581 chipio_write_no_mutex(codec, 0x190064, 0x0001f9c1); in sbz_chipio_startup_data()
7582 chipio_write_no_mutex(codec, 0x190068, 0x0001fac6); in sbz_chipio_startup_data()
7583 chipio_write_no_mutex(codec, 0x19006c, 0x0001fbc7); in sbz_chipio_startup_data()
7585 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in sbz_chipio_startup_data()
7587 chipio_set_stream_channels(codec, 0x0C, 6); in sbz_chipio_startup_data()
7588 chipio_set_stream_control(codec, 0x0C, 1); in sbz_chipio_startup_data()
7591 chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0); in sbz_chipio_startup_data()
7592 chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1); in sbz_chipio_startup_data()
7593 chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2); in sbz_chipio_startup_data()
7594 chipio_write_no_mutex(codec, 0x19003c, 0x0001e5c3); in sbz_chipio_startup_data()
7595 chipio_write_no_mutex(codec, 0x190040, 0x0001e2c4); in sbz_chipio_startup_data()
7596 chipio_write_no_mutex(codec, 0x190044, 0x0001e3c5); in sbz_chipio_startup_data()
7597 chipio_write_no_mutex(codec, 0x190048, 0x0001e8c6); in sbz_chipio_startup_data()
7598 chipio_write_no_mutex(codec, 0x19004c, 0x0001e9c7); in sbz_chipio_startup_data()
7599 chipio_write_no_mutex(codec, 0x190050, 0x0001ecc8); in sbz_chipio_startup_data()
7600 chipio_write_no_mutex(codec, 0x190054, 0x0001edc9); in sbz_chipio_startup_data()
7601 chipio_write_no_mutex(codec, 0x190058, 0x0001eaca); in sbz_chipio_startup_data()
7602 chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb); in sbz_chipio_startup_data()
7604 chipio_write_no_mutex(codec, 0x190038, 0x000140c2); in sbz_chipio_startup_data()
7605 chipio_write_no_mutex(codec, 0x19003c, 0x000141c3); in sbz_chipio_startup_data()
7606 chipio_write_no_mutex(codec, 0x190040, 0x000150c4); in sbz_chipio_startup_data()
7607 chipio_write_no_mutex(codec, 0x190044, 0x000151c5); in sbz_chipio_startup_data()
7608 chipio_write_no_mutex(codec, 0x190050, 0x000142c8); in sbz_chipio_startup_data()
7609 chipio_write_no_mutex(codec, 0x190054, 0x000143c9); in sbz_chipio_startup_data()
7610 chipio_write_no_mutex(codec, 0x190058, 0x000152ca); in sbz_chipio_startup_data()
7611 chipio_write_no_mutex(codec, 0x19005c, 0x000153cb); in sbz_chipio_startup_data()
7613 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in sbz_chipio_startup_data()
7615 codec_dbg(codec, "Startup Data exited, mutex released.\n"); in sbz_chipio_startup_data()
7616 mutex_unlock(&spec->chipio_mutex); in sbz_chipio_startup_data()
7620 * Custom DSP SCP commands where the src value is 0x00 instead of 0x20. This is
7623 static void ca0132_alt_dsp_scp_startup(struct hda_codec *codec) in ca0132_alt_dsp_scp_startup() argument
7625 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_scp_startup()
7632 for (i = 0; i < 2; i++) { in ca0132_alt_dsp_scp_startup()
7637 tmp = 0x00000003; in ca0132_alt_dsp_scp_startup()
7638 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7639 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7640 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp); in ca0132_alt_dsp_scp_startup()
7641 tmp = 0x00000001; in ca0132_alt_dsp_scp_startup()
7642 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp); in ca0132_alt_dsp_scp_startup()
7643 tmp = 0x00000004; in ca0132_alt_dsp_scp_startup()
7644 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7645 tmp = 0x00000005; in ca0132_alt_dsp_scp_startup()
7646 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7647 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7648 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7652 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7653 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp); in ca0132_alt_dsp_scp_startup()
7654 tmp = 0x00000001; in ca0132_alt_dsp_scp_startup()
7655 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp); in ca0132_alt_dsp_scp_startup()
7656 tmp = 0x00000004; in ca0132_alt_dsp_scp_startup()
7657 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7658 tmp = 0x00000005; in ca0132_alt_dsp_scp_startup()
7659 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7660 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7661 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7670 static void ca0132_alt_dsp_initial_mic_setup(struct hda_codec *codec) in ca0132_alt_dsp_initial_mic_setup() argument
7672 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_initial_mic_setup()
7675 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_dsp_initial_mic_setup()
7676 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_dsp_initial_mic_setup()
7678 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_dsp_initial_mic_setup()
7679 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_dsp_initial_mic_setup()
7682 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_dsp_initial_mic_setup()
7684 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_dsp_initial_mic_setup()
7685 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_dsp_initial_mic_setup()
7689 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7690 chipio_write(codec, 0x18b09C, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7693 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7694 chipio_write(codec, 0x18b09c, 0x0000004c); in ca0132_alt_dsp_initial_mic_setup()
7701 static void ae5_post_dsp_register_set(struct hda_codec *codec) in ae5_post_dsp_register_set() argument
7703 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_register_set()
7705 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_post_dsp_register_set()
7706 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_register_set()
7707 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae5_post_dsp_register_set()
7708 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_register_set()
7709 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae5_post_dsp_register_set()
7711 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7712 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7713 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7714 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7715 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7716 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7717 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7718 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7719 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7720 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7721 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7722 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7724 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f); in ae5_post_dsp_register_set()
7725 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_post_dsp_register_set()
7726 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_register_set()
7729 static void ae5_post_dsp_param_setup(struct hda_codec *codec) in ae5_post_dsp_param_setup() argument
7734 * AE-5's registry values in Windows. in ae5_post_dsp_param_setup()
7736 chipio_set_control_param(codec, 3, 0); in ae5_post_dsp_param_setup()
7739 * change colors on the external LED strip connected to the AE-5. in ae5_post_dsp_param_setup()
7741 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1); in ae5_post_dsp_param_setup()
7743 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae5_post_dsp_param_setup()
7744 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_post_dsp_param_setup()
7746 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7747 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92); in ae5_post_dsp_param_setup()
7748 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7749 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa); in ae5_post_dsp_param_setup()
7750 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7751 VENDOR_CHIPIO_8051_DATA_WRITE, 0x22); in ae5_post_dsp_param_setup()
7754 static void ae5_post_dsp_pll_setup(struct hda_codec *codec) in ae5_post_dsp_pll_setup() argument
7756 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7757 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41); in ae5_post_dsp_pll_setup()
7758 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7759 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8); in ae5_post_dsp_pll_setup()
7761 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7762 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x45); in ae5_post_dsp_pll_setup()
7763 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7764 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcc); in ae5_post_dsp_pll_setup()
7766 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7767 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x40); in ae5_post_dsp_pll_setup()
7768 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7769 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcb); in ae5_post_dsp_pll_setup()
7771 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7772 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae5_post_dsp_pll_setup()
7773 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7774 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae5_post_dsp_pll_setup()
7776 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7777 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x51); in ae5_post_dsp_pll_setup()
7778 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7779 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x8d); in ae5_post_dsp_pll_setup()
7782 static void ae5_post_dsp_stream_setup(struct hda_codec *codec) in ae5_post_dsp_stream_setup() argument
7784 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_stream_setup()
7786 mutex_lock(&spec->chipio_mutex); in ae5_post_dsp_stream_setup()
7788 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae5_post_dsp_stream_setup()
7790 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae5_post_dsp_stream_setup()
7792 chipio_set_stream_channels(codec, 0x0C, 6); in ae5_post_dsp_stream_setup()
7793 chipio_set_stream_control(codec, 0x0C, 1); in ae5_post_dsp_stream_setup()
7795 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0); in ae5_post_dsp_stream_setup()
7797 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0); in ae5_post_dsp_stream_setup()
7798 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae5_post_dsp_stream_setup()
7799 chipio_set_stream_channels(codec, 0x18, 6); in ae5_post_dsp_stream_setup()
7800 chipio_set_stream_control(codec, 0x18, 1); in ae5_post_dsp_stream_setup()
7802 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4); in ae5_post_dsp_stream_setup()
7804 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_stream_setup()
7805 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae5_post_dsp_stream_setup()
7806 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_stream_setup()
7807 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae5_post_dsp_stream_setup()
7809 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80); in ae5_post_dsp_stream_setup()
7811 mutex_unlock(&spec->chipio_mutex); in ae5_post_dsp_stream_setup()
7814 static void ae5_post_dsp_startup_data(struct hda_codec *codec) in ae5_post_dsp_startup_data() argument
7816 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_startup_data()
7818 mutex_lock(&spec->chipio_mutex); in ae5_post_dsp_startup_data()
7820 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae5_post_dsp_startup_data()
7821 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae5_post_dsp_startup_data()
7822 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae5_post_dsp_startup_data()
7823 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae5_post_dsp_startup_data()
7825 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
7826 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae5_post_dsp_startup_data()
7827 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12); in ae5_post_dsp_startup_data()
7828 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00); in ae5_post_dsp_startup_data()
7829 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48); in ae5_post_dsp_startup_data()
7830 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
7831 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_startup_data()
7832 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
7833 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
7834 ca0113_mmio_gpio_set(codec, 0, true); in ae5_post_dsp_startup_data()
7835 ca0113_mmio_gpio_set(codec, 1, true); in ae5_post_dsp_startup_data()
7836 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80); in ae5_post_dsp_startup_data()
7838 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012); in ae5_post_dsp_startup_data()
7840 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
7841 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
7843 mutex_unlock(&spec->chipio_mutex); in ae5_post_dsp_startup_data()
7847 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3, 0x0001e2c4, 0x0001e3c5,
7848 0x0001e8c6, 0x0001e9c7, 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb
7851 static void ae7_post_dsp_setup_ports(struct hda_codec *codec) in ae7_post_dsp_setup_ports() argument
7853 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_setup_ports()
7856 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_setup_ports()
7858 chipio_set_stream_channels(codec, 0x0c, 6); in ae7_post_dsp_setup_ports()
7859 chipio_set_stream_control(codec, 0x0c, 1); in ae7_post_dsp_setup_ports()
7862 addr = 0x190030; in ae7_post_dsp_setup_ports()
7863 for (i = 0; i < count; i++) { in ae7_post_dsp_setup_ports()
7864 chipio_write_no_mutex(codec, addr, ae7_port_set_data[i]); in ae7_post_dsp_setup_ports()
7866 /* Addresses are incremented by 4-bytes. */ in ae7_post_dsp_setup_ports()
7867 addr += 0x04; in ae7_post_dsp_setup_ports()
7871 * Port setting always ends with a write of 0x1 to address 0x19042c. in ae7_post_dsp_setup_ports()
7873 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in ae7_post_dsp_setup_ports()
7875 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_post_dsp_setup_ports()
7876 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40); in ae7_post_dsp_setup_ports()
7877 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00); in ae7_post_dsp_setup_ports()
7878 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00); in ae7_post_dsp_setup_ports()
7879 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff); in ae7_post_dsp_setup_ports()
7880 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff); in ae7_post_dsp_setup_ports()
7881 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff); in ae7_post_dsp_setup_ports()
7882 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f); in ae7_post_dsp_setup_ports()
7884 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_setup_ports()
7887 static void ae7_post_dsp_asi_stream_setup(struct hda_codec *codec) in ae7_post_dsp_asi_stream_setup() argument
7889 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_asi_stream_setup()
7891 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_asi_stream_setup()
7893 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae7_post_dsp_asi_stream_setup()
7894 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_post_dsp_asi_stream_setup()
7896 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae7_post_dsp_asi_stream_setup()
7897 chipio_set_stream_channels(codec, 0x0c, 6); in ae7_post_dsp_asi_stream_setup()
7898 chipio_set_stream_control(codec, 0x0c, 1); in ae7_post_dsp_asi_stream_setup()
7900 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_stream_setup()
7901 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_stream_setup()
7903 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_stream_setup()
7904 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_stream_setup()
7905 chipio_set_stream_control(codec, 0x18, 1); in ae7_post_dsp_asi_stream_setup()
7907 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4); in ae7_post_dsp_asi_stream_setup()
7909 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_asi_stream_setup()
7912 static void ae7_post_dsp_pll_setup(struct hda_codec *codec) in ae7_post_dsp_pll_setup() argument
7915 0x41, 0x45, 0x40, 0x43, 0x51 in ae7_post_dsp_pll_setup()
7918 0xc8, 0xcc, 0xcb, 0xc7, 0x8d in ae7_post_dsp_pll_setup()
7922 for (i = 0; i < ARRAY_SIZE(addr); i++) { in ae7_post_dsp_pll_setup()
7923 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_pll_setup()
7925 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_pll_setup()
7930 static void ae7_post_dsp_asi_setup_ports(struct hda_codec *codec) in ae7_post_dsp_asi_setup_ports() argument
7932 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_asi_setup_ports()
7934 0x0b, 0x04, 0x06, 0x0a, 0x0c, 0x11, 0x12, 0x13, 0x14 in ae7_post_dsp_asi_setup_ports()
7937 0x12, 0x00, 0x48, 0x05, 0x5f, 0xff, 0xff, 0xff, 0x7f in ae7_post_dsp_asi_setup_ports()
7941 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_asi_setup_ports()
7943 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup_ports()
7944 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae7_post_dsp_asi_setup_ports()
7945 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup_ports()
7946 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae7_post_dsp_asi_setup_ports()
7948 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
7949 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
7950 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae7_post_dsp_asi_setup_ports()
7951 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae7_post_dsp_asi_setup_ports()
7953 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup_ports()
7954 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae7_post_dsp_asi_setup_ports()
7956 for (i = 0; i < ARRAY_SIZE(target); i++) in ae7_post_dsp_asi_setup_ports()
7957 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]); in ae7_post_dsp_asi_setup_ports()
7959 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
7960 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
7961 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
7963 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56); in ae7_post_dsp_asi_setup_ports()
7964 chipio_set_stream_channels(codec, 0x21, 2); in ae7_post_dsp_asi_setup_ports()
7965 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000); in ae7_post_dsp_asi_setup_ports()
7967 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_post_dsp_asi_setup_ports()
7973 chipio_set_control_param_no_mutex(codec, 0x20, 0x21); in ae7_post_dsp_asi_setup_ports()
7975 chipio_write_no_mutex(codec, 0x18b038, 0x00000088); in ae7_post_dsp_asi_setup_ports()
7979 * seemingly sends data to the HDA node 0x09, which is the digital in ae7_post_dsp_asi_setup_ports()
7981 * know what data is being sent. Interestingly, the AE-5 seems to go in ae7_post_dsp_asi_setup_ports()
7983 * step, but the AE-7 does. in ae7_post_dsp_asi_setup_ports()
7986 ca0113_mmio_gpio_set(codec, 0, 1); in ae7_post_dsp_asi_setup_ports()
7987 ca0113_mmio_gpio_set(codec, 1, 1); in ae7_post_dsp_asi_setup_ports()
7989 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
7990 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000); in ae7_post_dsp_asi_setup_ports()
7991 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
7992 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
7994 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_setup_ports()
7995 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_setup_ports()
7997 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_setup_ports()
7998 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_setup_ports()
8004 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup_ports()
8005 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae7_post_dsp_asi_setup_ports()
8007 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_asi_setup_ports()
8015 static void ae7_post_dsp_asi_setup(struct hda_codec *codec) in ae7_post_dsp_asi_setup() argument
8017 chipio_8051_write_direct(codec, 0x93, 0x10); in ae7_post_dsp_asi_setup()
8019 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8020 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae7_post_dsp_asi_setup()
8021 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8022 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae7_post_dsp_asi_setup()
8024 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup()
8025 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_post_dsp_asi_setup()
8027 chipio_set_control_param(codec, 3, 3); in ae7_post_dsp_asi_setup()
8028 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1); in ae7_post_dsp_asi_setup()
8030 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae7_post_dsp_asi_setup()
8031 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_post_dsp_asi_setup()
8032 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00); in ae7_post_dsp_asi_setup()
8034 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8035 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92); in ae7_post_dsp_asi_setup()
8036 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8037 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa); in ae7_post_dsp_asi_setup()
8038 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8039 VENDOR_CHIPIO_8051_DATA_WRITE, 0x22); in ae7_post_dsp_asi_setup()
8041 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup()
8042 ae7_post_dsp_asi_stream_setup(codec); in ae7_post_dsp_asi_setup()
8044 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8045 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae7_post_dsp_asi_setup()
8046 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8047 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae7_post_dsp_asi_setup()
8049 ae7_post_dsp_asi_setup_ports(codec); in ae7_post_dsp_asi_setup()
8055 static void ca0132_setup_defaults(struct hda_codec *codec) in ca0132_setup_defaults() argument
8057 struct ca0132_spec *spec = codec->spec; in ca0132_setup_defaults()
8062 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_setup_defaults()
8067 for (idx = 0; idx < num_fx; idx++) { in ca0132_setup_defaults()
8068 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ca0132_setup_defaults()
8069 dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_setup_defaults()
8077 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ca0132_setup_defaults()
8080 dspio_set_uint_param(codec, 0x8f, 0x01, tmp); in ca0132_setup_defaults()
8084 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_setup_defaults()
8085 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_setup_defaults()
8089 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_setup_defaults()
8093 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ca0132_setup_defaults()
8100 static void r3d_setup_defaults(struct hda_codec *codec) in r3d_setup_defaults() argument
8102 struct ca0132_spec *spec = codec->spec; in r3d_setup_defaults()
8107 if (spec->dsp_state != DSP_DOWNLOADED) in r3d_setup_defaults()
8110 ca0132_alt_dsp_scp_startup(codec); in r3d_setup_defaults()
8111 ca0132_alt_init_analog_mics(codec); in r3d_setup_defaults()
8115 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in r3d_setup_defaults()
8119 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in r3d_setup_defaults()
8120 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in r3d_setup_defaults()
8123 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in r3d_setup_defaults()
8126 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED); in r3d_setup_defaults()
8130 ca0113_mmio_gpio_set(codec, 2, false); in r3d_setup_defaults()
8131 ca0113_mmio_gpio_set(codec, 4, true); in r3d_setup_defaults()
8136 for (idx = 0; idx < num_fx; idx++) { in r3d_setup_defaults()
8137 for (i = 0; i <= ca0132_effects[idx].params; i++) { in r3d_setup_defaults()
8138 dspio_set_uint_param(codec, in r3d_setup_defaults()
8150 static void sbz_setup_defaults(struct hda_codec *codec) in sbz_setup_defaults() argument
8152 struct ca0132_spec *spec = codec->spec; in sbz_setup_defaults()
8157 if (spec->dsp_state != DSP_DOWNLOADED) in sbz_setup_defaults()
8160 ca0132_alt_dsp_scp_startup(codec); in sbz_setup_defaults()
8161 ca0132_alt_init_analog_mics(codec); in sbz_setup_defaults()
8162 sbz_connect_streams(codec); in sbz_setup_defaults()
8163 sbz_chipio_startup_data(codec); in sbz_setup_defaults()
8165 chipio_set_stream_control(codec, 0x03, 1); in sbz_setup_defaults()
8166 chipio_set_stream_control(codec, 0x04, 1); in sbz_setup_defaults()
8173 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in sbz_setup_defaults()
8174 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in sbz_setup_defaults()
8178 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in sbz_setup_defaults()
8182 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in sbz_setup_defaults()
8183 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in sbz_setup_defaults()
8186 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in sbz_setup_defaults()
8188 ca0132_alt_dsp_initial_mic_setup(codec); in sbz_setup_defaults()
8192 for (idx = 0; idx < num_fx; idx++) { in sbz_setup_defaults()
8193 for (i = 0; i <= ca0132_effects[idx].params; i++) { in sbz_setup_defaults()
8194 dspio_set_uint_param(codec, in sbz_setup_defaults()
8201 ca0132_alt_init_speaker_tuning(codec); in sbz_setup_defaults()
8203 ca0132_alt_create_dummy_stream(codec); in sbz_setup_defaults()
8207 * Setup default parameters for the Sound BlasterX AE-5 DSP.
8209 static void ae5_setup_defaults(struct hda_codec *codec) in ae5_setup_defaults() argument
8211 struct ca0132_spec *spec = codec->spec; in ae5_setup_defaults()
8216 if (spec->dsp_state != DSP_DOWNLOADED) in ae5_setup_defaults()
8219 ca0132_alt_dsp_scp_startup(codec); in ae5_setup_defaults()
8220 ca0132_alt_init_analog_mics(codec); in ae5_setup_defaults()
8221 chipio_set_stream_control(codec, 0x03, 1); in ae5_setup_defaults()
8222 chipio_set_stream_control(codec, 0x04, 1); in ae5_setup_defaults()
8226 dspio_set_uint_param(codec, 0x96, 0x29, tmp); in ae5_setup_defaults()
8227 dspio_set_uint_param(codec, 0x96, 0x2a, tmp); in ae5_setup_defaults()
8228 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae5_setup_defaults()
8229 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae5_setup_defaults()
8231 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_setup_defaults()
8232 ca0113_mmio_gpio_set(codec, 0, false); in ae5_setup_defaults()
8233 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae5_setup_defaults()
8237 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae5_setup_defaults()
8238 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae5_setup_defaults()
8242 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae5_setup_defaults()
8246 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae5_setup_defaults()
8247 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ae5_setup_defaults()
8250 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae5_setup_defaults()
8252 ca0132_alt_dsp_initial_mic_setup(codec); in ae5_setup_defaults()
8253 ae5_post_dsp_register_set(codec); in ae5_setup_defaults()
8254 ae5_post_dsp_param_setup(codec); in ae5_setup_defaults()
8255 ae5_post_dsp_pll_setup(codec); in ae5_setup_defaults()
8256 ae5_post_dsp_stream_setup(codec); in ae5_setup_defaults()
8257 ae5_post_dsp_startup_data(codec); in ae5_setup_defaults()
8261 for (idx = 0; idx < num_fx; idx++) { in ae5_setup_defaults()
8262 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae5_setup_defaults()
8263 dspio_set_uint_param(codec, in ae5_setup_defaults()
8270 ca0132_alt_init_speaker_tuning(codec); in ae5_setup_defaults()
8272 ca0132_alt_create_dummy_stream(codec); in ae5_setup_defaults()
8276 * Setup default parameters for the Sound Blaster AE-7 DSP.
8278 static void ae7_setup_defaults(struct hda_codec *codec) in ae7_setup_defaults() argument
8280 struct ca0132_spec *spec = codec->spec; in ae7_setup_defaults()
8285 if (spec->dsp_state != DSP_DOWNLOADED) in ae7_setup_defaults()
8288 ca0132_alt_dsp_scp_startup(codec); in ae7_setup_defaults()
8289 ca0132_alt_init_analog_mics(codec); in ae7_setup_defaults()
8290 ae7_post_dsp_setup_ports(codec); in ae7_setup_defaults()
8293 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8295 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8298 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_setup_defaults()
8301 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae7_setup_defaults()
8302 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae7_setup_defaults()
8304 ca0113_mmio_gpio_set(codec, 0, false); in ae7_setup_defaults()
8308 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae7_setup_defaults()
8309 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae7_setup_defaults()
8313 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae7_setup_defaults()
8317 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae7_setup_defaults()
8318 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ae7_setup_defaults()
8321 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae7_setup_defaults()
8322 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae7_setup_defaults()
8328 ca0132_alt_init_analog_mics(codec); in ae7_setup_defaults()
8330 ae7_post_dsp_asi_setup(codec); in ae7_setup_defaults()
8333 * Not sure why, but these are both set to 1. They're only set to 0 in ae7_setup_defaults()
8336 ca0113_mmio_gpio_set(codec, 0, true); in ae7_setup_defaults()
8337 ca0113_mmio_gpio_set(codec, 1, true); in ae7_setup_defaults()
8340 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04); in ae7_setup_defaults()
8341 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04); in ae7_setup_defaults()
8342 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80); in ae7_setup_defaults()
8346 for (idx = 0; idx < num_fx; idx++) { in ae7_setup_defaults()
8347 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae7_setup_defaults()
8348 dspio_set_uint_param(codec, in ae7_setup_defaults()
8355 ca0132_alt_init_speaker_tuning(codec); in ae7_setup_defaults()
8357 ca0132_alt_create_dummy_stream(codec); in ae7_setup_defaults()
8363 static void ca0132_init_flags(struct hda_codec *codec) in ca0132_init_flags() argument
8365 struct ca0132_spec *spec = codec->spec; in ca0132_init_flags()
8368 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1); in ca0132_init_flags()
8369 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1); in ca0132_init_flags()
8370 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1); in ca0132_init_flags()
8371 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, 1); in ca0132_init_flags()
8372 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, 1); in ca0132_init_flags()
8373 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8374 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0); in ca0132_init_flags()
8375 chipio_set_control_flag(codec, in ca0132_init_flags()
8376 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8377 chipio_set_control_flag(codec, in ca0132_init_flags()
8380 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8381 chipio_set_control_flag(codec, in ca0132_init_flags()
8382 CONTROL_FLAG_PORT_A_COMMON_MODE, 0); in ca0132_init_flags()
8383 chipio_set_control_flag(codec, in ca0132_init_flags()
8384 CONTROL_FLAG_PORT_D_COMMON_MODE, 0); in ca0132_init_flags()
8385 chipio_set_control_flag(codec, in ca0132_init_flags()
8386 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0); in ca0132_init_flags()
8387 chipio_set_control_flag(codec, in ca0132_init_flags()
8388 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8389 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1); in ca0132_init_flags()
8396 static void ca0132_init_params(struct hda_codec *codec) in ca0132_init_params() argument
8398 struct ca0132_spec *spec = codec->spec; in ca0132_init_params()
8401 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ca0132_init_params()
8402 chipio_set_conn_rate(codec, 0x0B, SR_48_000); in ca0132_init_params()
8403 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); in ca0132_init_params()
8404 chipio_set_control_param(codec, 0, 0); in ca0132_init_params()
8405 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_init_params()
8408 chipio_set_control_param(codec, CONTROL_PARAM_PORTA_160OHM_GAIN, 6); in ca0132_init_params()
8409 chipio_set_control_param(codec, CONTROL_PARAM_PORTD_160OHM_GAIN, 6); in ca0132_init_params()
8412 static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k) in ca0132_set_dsp_msr() argument
8414 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k); in ca0132_set_dsp_msr()
8415 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k); in ca0132_set_dsp_msr()
8416 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k); in ca0132_set_dsp_msr()
8417 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k); in ca0132_set_dsp_msr()
8418 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k); in ca0132_set_dsp_msr()
8419 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k); in ca0132_set_dsp_msr()
8421 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_set_dsp_msr()
8422 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_set_dsp_msr()
8423 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ca0132_set_dsp_msr()
8426 static bool ca0132_download_dsp_images(struct hda_codec *codec) in ca0132_download_dsp_images() argument
8429 struct ca0132_spec *spec = codec->spec; in ca0132_download_dsp_images()
8442 codec->card->dev) != 0) in ca0132_download_dsp_images()
8443 codec_dbg(codec, "Desktop firmware not found."); in ca0132_download_dsp_images()
8445 codec_dbg(codec, "Desktop firmware selected."); in ca0132_download_dsp_images()
8449 codec->card->dev) != 0) in ca0132_download_dsp_images()
8450 codec_dbg(codec, "Recon3Di alt firmware not detected."); in ca0132_download_dsp_images()
8452 codec_dbg(codec, "Recon3Di firmware selected."); in ca0132_download_dsp_images()
8459 * exists for your particular codec. in ca0132_download_dsp_images()
8462 codec_dbg(codec, "Default firmware selected."); in ca0132_download_dsp_images()
8464 codec->card->dev) != 0) in ca0132_download_dsp_images()
8468 dsp_os_image = (struct dsp_image_seg *)(fw_entry->data); in ca0132_download_dsp_images()
8469 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) { in ca0132_download_dsp_images()
8470 codec_err(codec, "ca0132 DSP load image failed\n"); in ca0132_download_dsp_images()
8474 dsp_loaded = dspload_wait_loaded(codec); in ca0132_download_dsp_images()
8482 static void ca0132_download_dsp(struct hda_codec *codec) in ca0132_download_dsp() argument
8484 struct ca0132_spec *spec = codec->spec; in ca0132_download_dsp()
8490 if (spec->dsp_state == DSP_DOWNLOAD_FAILED) in ca0132_download_dsp()
8493 chipio_enable_clocks(codec); in ca0132_download_dsp()
8494 if (spec->dsp_state != DSP_DOWNLOADED) { in ca0132_download_dsp()
8495 spec->dsp_state = DSP_DOWNLOADING; in ca0132_download_dsp()
8497 if (!ca0132_download_dsp_images(codec)) in ca0132_download_dsp()
8498 spec->dsp_state = DSP_DOWNLOAD_FAILED; in ca0132_download_dsp()
8500 spec->dsp_state = DSP_DOWNLOADED; in ca0132_download_dsp()
8504 if (spec->dsp_state == DSP_DOWNLOADED && !ca0132_use_alt_functions(spec)) in ca0132_download_dsp()
8505 ca0132_set_dsp_msr(codec, true); in ca0132_download_dsp()
8508 static void ca0132_process_dsp_response(struct hda_codec *codec, in ca0132_process_dsp_response() argument
8511 struct ca0132_spec *spec = codec->spec; in ca0132_process_dsp_response()
8513 codec_dbg(codec, "ca0132_process_dsp_response\n"); in ca0132_process_dsp_response()
8514 snd_hda_power_up_pm(codec); in ca0132_process_dsp_response()
8515 if (spec->wait_scp) { in ca0132_process_dsp_response()
8516 if (dspio_get_response_data(codec) >= 0) in ca0132_process_dsp_response()
8517 spec->wait_scp = 0; in ca0132_process_dsp_response()
8520 dspio_clear_response_queue(codec); in ca0132_process_dsp_response()
8521 snd_hda_power_down_pm(codec); in ca0132_process_dsp_response()
8524 static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb) in hp_callback() argument
8526 struct ca0132_spec *spec = codec->spec; in hp_callback()
8529 /* Delay enabling the HP amp, to let the mic-detection in hp_callback()
8532 tbl = snd_hda_jack_tbl_get(codec, cb->nid); in hp_callback()
8534 tbl->block_report = 1; in hp_callback()
8535 schedule_delayed_work(&spec->unsol_hp_work, msecs_to_jiffies(500)); in hp_callback()
8538 static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb) in amic_callback() argument
8540 struct ca0132_spec *spec = codec->spec; in amic_callback()
8543 ca0132_alt_select_in(codec); in amic_callback()
8545 ca0132_select_mic(codec); in amic_callback()
8548 static void ca0132_init_unsol(struct hda_codec *codec) in ca0132_init_unsol() argument
8550 struct ca0132_spec *spec = codec->spec; in ca0132_init_unsol()
8551 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_hp, hp_callback); in ca0132_init_unsol()
8552 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_amic1, in ca0132_init_unsol()
8554 snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP, in ca0132_init_unsol()
8558 snd_hda_jack_detect_enable_callback(codec, in ca0132_init_unsol()
8559 spec->unsol_tag_front_hp, hp_callback); in ca0132_init_unsol()
8569 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
8576 {0x01, AC_VERB_SET_POWER_STATE, 0x03},
8578 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
8586 {0x15, 0x70D, 0xF0},
8587 {0x15, 0x70E, 0xFE},
8588 {0x15, 0x707, 0x75},
8589 {0x15, 0x707, 0xD3},
8590 {0x15, 0x707, 0x09},
8591 {0x15, 0x707, 0x53},
8592 {0x15, 0x707, 0xD4},
8593 {0x15, 0x707, 0xEF},
8594 {0x15, 0x707, 0x75},
8595 {0x15, 0x707, 0xD3},
8596 {0x15, 0x707, 0x09},
8597 {0x15, 0x707, 0x02},
8598 {0x15, 0x707, 0x37},
8599 {0x15, 0x707, 0x78},
8600 {0x15, 0x53C, 0xCE},
8601 {0x15, 0x575, 0xC9},
8602 {0x15, 0x53D, 0xCE},
8603 {0x15, 0x5B7, 0xC9},
8604 {0x15, 0x70D, 0xE8},
8605 {0x15, 0x70E, 0xFE},
8606 {0x15, 0x707, 0x02},
8607 {0x15, 0x707, 0x68},
8608 {0x15, 0x707, 0x62},
8609 {0x15, 0x53A, 0xCE},
8610 {0x15, 0x546, 0xC9},
8611 {0x15, 0x53B, 0xCE},
8612 {0x15, 0x5E8, 0xC9},
8618 {0x15, 0x70D, 0x20},
8619 {0x15, 0x70E, 0x19},
8620 {0x15, 0x707, 0x00},
8621 {0x15, 0x539, 0xCE},
8622 {0x15, 0x546, 0xC9},
8623 {0x15, 0x70D, 0xB7},
8624 {0x15, 0x70E, 0x09},
8625 {0x15, 0x707, 0x10},
8626 {0x15, 0x70D, 0xAF},
8627 {0x15, 0x70E, 0x09},
8628 {0x15, 0x707, 0x01},
8629 {0x15, 0x707, 0x05},
8630 {0x15, 0x70D, 0x73},
8631 {0x15, 0x70E, 0x09},
8632 {0x15, 0x707, 0x14},
8633 {0x15, 0x6FF, 0xC4},
8637 static void ca0132_init_chip(struct hda_codec *codec) in ca0132_init_chip() argument
8639 struct ca0132_spec *spec = codec->spec; in ca0132_init_chip()
8644 mutex_init(&spec->chipio_mutex); in ca0132_init_chip()
8646 spec->cur_out_type = SPEAKER_OUT; in ca0132_init_chip()
8648 spec->cur_mic_type = DIGITAL_MIC; in ca0132_init_chip()
8650 spec->cur_mic_type = REAR_MIC; in ca0132_init_chip()
8652 spec->cur_mic_boost = 0; in ca0132_init_chip()
8654 for (i = 0; i < VNODES_COUNT; i++) { in ca0132_init_chip()
8655 spec->vnode_lvol[i] = 0x5a; in ca0132_init_chip()
8656 spec->vnode_rvol[i] = 0x5a; in ca0132_init_chip()
8657 spec->vnode_lswitch[i] = 0; in ca0132_init_chip()
8658 spec->vnode_rswitch[i] = 0; in ca0132_init_chip()
8665 for (i = 0; i < num_fx; i++) { in ca0132_init_chip()
8666 on = (unsigned int)ca0132_effects[i].reqs[0]; in ca0132_init_chip()
8667 spec->effects_switch[i] = on ? 1 : 0; in ca0132_init_chip()
8671 * ca0132 codecs. Also sets x-bass crossover frequency to 80hz. in ca0132_init_chip()
8675 spec->speaker_range_val[0] = 1; in ca0132_init_chip()
8676 spec->speaker_range_val[1] = 1; in ca0132_init_chip()
8678 spec->xbass_xover_freq = 8; in ca0132_init_chip()
8679 for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) in ca0132_init_chip()
8680 spec->fx_ctl_val[i] = effect_slider_defaults[i]; in ca0132_init_chip()
8682 spec->bass_redirect_xover_freq = 8; in ca0132_init_chip()
8685 spec->voicefx_val = 0; in ca0132_init_chip()
8686 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID] = 1; in ca0132_init_chip()
8687 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0; in ca0132_init_chip()
8690 * The ZxR doesn't have a front panel header, and it's line-in is on in ca0132_init_chip()
8692 * to make sure that spec->in_enum_val is set properly. in ca0132_init_chip()
8695 spec->in_enum_val = REAR_MIC; in ca0132_init_chip()
8698 ca0132_init_tuning_defaults(codec); in ca0132_init_chip()
8706 static void r3di_gpio_shutdown(struct hda_codec *codec) in r3di_gpio_shutdown() argument
8708 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00); in r3di_gpio_shutdown()
8714 static void sbz_region2_exit(struct hda_codec *codec) in sbz_region2_exit() argument
8716 struct ca0132_spec *spec = codec->spec; in sbz_region2_exit()
8719 for (i = 0; i < 4; i++) in sbz_region2_exit()
8720 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
8721 for (i = 0; i < 8; i++) in sbz_region2_exit()
8722 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
8724 ca0113_mmio_gpio_set(codec, 0, false); in sbz_region2_exit()
8725 ca0113_mmio_gpio_set(codec, 1, false); in sbz_region2_exit()
8726 ca0113_mmio_gpio_set(codec, 4, true); in sbz_region2_exit()
8727 ca0113_mmio_gpio_set(codec, 5, false); in sbz_region2_exit()
8728 ca0113_mmio_gpio_set(codec, 7, false); in sbz_region2_exit()
8731 static void sbz_set_pin_ctl_default(struct hda_codec *codec) in sbz_set_pin_ctl_default() argument
8733 static const hda_nid_t pins[] = {0x0B, 0x0C, 0x0E, 0x12, 0x13}; in sbz_set_pin_ctl_default()
8736 snd_hda_codec_write(codec, 0x11, 0, in sbz_set_pin_ctl_default()
8737 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40); in sbz_set_pin_ctl_default()
8739 for (i = 0; i < ARRAY_SIZE(pins); i++) in sbz_set_pin_ctl_default()
8740 snd_hda_codec_write(codec, pins[i], 0, in sbz_set_pin_ctl_default()
8741 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00); in sbz_set_pin_ctl_default()
8744 static void ca0132_clear_unsolicited(struct hda_codec *codec) in ca0132_clear_unsolicited() argument
8746 static const hda_nid_t pins[] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13}; in ca0132_clear_unsolicited()
8749 for (i = 0; i < ARRAY_SIZE(pins); i++) { in ca0132_clear_unsolicited()
8750 snd_hda_codec_write(codec, pins[i], 0, in ca0132_clear_unsolicited()
8751 AC_VERB_SET_UNSOLICITED_ENABLE, 0x00); in ca0132_clear_unsolicited()
8756 static void sbz_gpio_shutdown_commands(struct hda_codec *codec, int dir, in sbz_gpio_shutdown_commands() argument
8759 if (dir >= 0) in sbz_gpio_shutdown_commands()
8760 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8762 if (mask >= 0) in sbz_gpio_shutdown_commands()
8763 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8766 if (data >= 0) in sbz_gpio_shutdown_commands()
8767 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8771 static void zxr_dbpro_power_state_shutdown(struct hda_codec *codec) in zxr_dbpro_power_state_shutdown() argument
8773 static const hda_nid_t pins[] = {0x05, 0x0c, 0x09, 0x0e, 0x08, 0x11, 0x01}; in zxr_dbpro_power_state_shutdown()
8776 for (i = 0; i < ARRAY_SIZE(pins); i++) in zxr_dbpro_power_state_shutdown()
8777 snd_hda_codec_write(codec, pins[i], 0, in zxr_dbpro_power_state_shutdown()
8778 AC_VERB_SET_POWER_STATE, 0x03); in zxr_dbpro_power_state_shutdown()
8781 static void sbz_exit_chip(struct hda_codec *codec) in sbz_exit_chip() argument
8783 chipio_set_stream_control(codec, 0x03, 0); in sbz_exit_chip()
8784 chipio_set_stream_control(codec, 0x04, 0); in sbz_exit_chip()
8787 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1); in sbz_exit_chip()
8788 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05); in sbz_exit_chip()
8789 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01); in sbz_exit_chip()
8791 chipio_set_stream_control(codec, 0x14, 0); in sbz_exit_chip()
8792 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8794 chipio_set_conn_rate(codec, 0x41, SR_192_000); in sbz_exit_chip()
8795 chipio_set_conn_rate(codec, 0x91, SR_192_000); in sbz_exit_chip()
8797 chipio_write(codec, 0x18a020, 0x00000083); in sbz_exit_chip()
8799 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03); in sbz_exit_chip()
8800 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07); in sbz_exit_chip()
8801 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06); in sbz_exit_chip()
8803 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8805 chipio_set_control_param(codec, 0x0D, 0x24); in sbz_exit_chip()
8807 ca0132_clear_unsolicited(codec); in sbz_exit_chip()
8808 sbz_set_pin_ctl_default(codec); in sbz_exit_chip()
8810 snd_hda_codec_write(codec, 0x0B, 0, in sbz_exit_chip()
8811 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in sbz_exit_chip()
8813 sbz_region2_exit(codec); in sbz_exit_chip()
8816 static void r3d_exit_chip(struct hda_codec *codec) in r3d_exit_chip() argument
8818 ca0132_clear_unsolicited(codec); in r3d_exit_chip()
8819 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in r3d_exit_chip()
8820 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b); in r3d_exit_chip()
8823 static void ae5_exit_chip(struct hda_codec *codec) in ae5_exit_chip() argument
8825 chipio_set_stream_control(codec, 0x03, 0); in ae5_exit_chip()
8826 chipio_set_stream_control(codec, 0x04, 0); in ae5_exit_chip()
8828 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae5_exit_chip()
8829 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8830 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8831 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae5_exit_chip()
8832 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae5_exit_chip()
8833 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00); in ae5_exit_chip()
8834 ca0113_mmio_gpio_set(codec, 0, false); in ae5_exit_chip()
8835 ca0113_mmio_gpio_set(codec, 1, false); in ae5_exit_chip()
8837 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae5_exit_chip()
8838 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae5_exit_chip()
8840 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_exit_chip()
8842 chipio_set_stream_control(codec, 0x18, 0); in ae5_exit_chip()
8843 chipio_set_stream_control(codec, 0x0c, 0); in ae5_exit_chip()
8845 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83); in ae5_exit_chip()
8848 static void ae7_exit_chip(struct hda_codec *codec) in ae7_exit_chip() argument
8850 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
8851 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8); in ae7_exit_chip()
8852 chipio_set_stream_channels(codec, 0x21, 0); in ae7_exit_chip()
8853 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_exit_chip()
8854 chipio_set_control_param(codec, 0x20, 0x01); in ae7_exit_chip()
8856 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_exit_chip()
8858 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
8859 chipio_set_stream_control(codec, 0x0c, 0); in ae7_exit_chip()
8861 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_exit_chip()
8862 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83); in ae7_exit_chip()
8863 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_exit_chip()
8864 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_exit_chip()
8865 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00); in ae7_exit_chip()
8866 ca0113_mmio_gpio_set(codec, 0, false); in ae7_exit_chip()
8867 ca0113_mmio_gpio_set(codec, 1, false); in ae7_exit_chip()
8868 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae7_exit_chip()
8870 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae7_exit_chip()
8871 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae7_exit_chip()
8874 static void zxr_exit_chip(struct hda_codec *codec) in zxr_exit_chip() argument
8876 chipio_set_stream_control(codec, 0x03, 0); in zxr_exit_chip()
8877 chipio_set_stream_control(codec, 0x04, 0); in zxr_exit_chip()
8878 chipio_set_stream_control(codec, 0x14, 0); in zxr_exit_chip()
8879 chipio_set_stream_control(codec, 0x0C, 0); in zxr_exit_chip()
8881 chipio_set_conn_rate(codec, 0x41, SR_192_000); in zxr_exit_chip()
8882 chipio_set_conn_rate(codec, 0x91, SR_192_000); in zxr_exit_chip()
8884 chipio_write(codec, 0x18a020, 0x00000083); in zxr_exit_chip()
8886 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in zxr_exit_chip()
8887 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in zxr_exit_chip()
8889 ca0132_clear_unsolicited(codec); in zxr_exit_chip()
8890 sbz_set_pin_ctl_default(codec); in zxr_exit_chip()
8891 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00); in zxr_exit_chip()
8893 ca0113_mmio_gpio_set(codec, 5, false); in zxr_exit_chip()
8894 ca0113_mmio_gpio_set(codec, 2, false); in zxr_exit_chip()
8895 ca0113_mmio_gpio_set(codec, 3, false); in zxr_exit_chip()
8896 ca0113_mmio_gpio_set(codec, 0, false); in zxr_exit_chip()
8897 ca0113_mmio_gpio_set(codec, 4, true); in zxr_exit_chip()
8898 ca0113_mmio_gpio_set(codec, 0, true); in zxr_exit_chip()
8899 ca0113_mmio_gpio_set(codec, 5, true); in zxr_exit_chip()
8900 ca0113_mmio_gpio_set(codec, 2, false); in zxr_exit_chip()
8901 ca0113_mmio_gpio_set(codec, 3, false); in zxr_exit_chip()
8904 static void ca0132_exit_chip(struct hda_codec *codec) in ca0132_exit_chip() argument
8908 if (dspload_is_loaded(codec)) in ca0132_exit_chip()
8909 dsp_reset(codec); in ca0132_exit_chip()
8920 static void sbz_dsp_startup_check(struct hda_codec *codec) in sbz_dsp_startup_check() argument
8922 struct ca0132_spec *spec = codec->spec; in sbz_dsp_startup_check()
8924 unsigned int cur_address = 0x390; in sbz_dsp_startup_check()
8926 unsigned int failure = 0; in sbz_dsp_startup_check()
8929 if (spec->startup_check_entered) in sbz_dsp_startup_check()
8932 spec->startup_check_entered = true; in sbz_dsp_startup_check()
8934 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8935 chipio_read(codec, cur_address, &dsp_data_check[i]); in sbz_dsp_startup_check()
8936 cur_address += 0x4; in sbz_dsp_startup_check()
8938 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8939 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
8943 codec_dbg(codec, "Startup Check: %d ", failure); in sbz_dsp_startup_check()
8945 codec_info(codec, "DSP not initialized properly. Attempting to fix."); in sbz_dsp_startup_check()
8951 while (failure && (reload != 0)) { in sbz_dsp_startup_check()
8952 codec_info(codec, "Reloading... Tries left: %d", reload); in sbz_dsp_startup_check()
8953 sbz_exit_chip(codec); in sbz_dsp_startup_check()
8954 spec->dsp_state = DSP_DOWNLOAD_INIT; in sbz_dsp_startup_check()
8955 codec->patch_ops.init(codec); in sbz_dsp_startup_check()
8956 failure = 0; in sbz_dsp_startup_check()
8957 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8958 chipio_read(codec, cur_address, &dsp_data_check[i]); in sbz_dsp_startup_check()
8959 cur_address += 0x4; in sbz_dsp_startup_check()
8961 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8962 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
8965 reload--; in sbz_dsp_startup_check()
8969 codec_info(codec, "DSP fixed."); in sbz_dsp_startup_check()
8974 …codec_info(codec, "DSP failed to initialize properly. Either try a full shutdown or a suspend to c… in sbz_dsp_startup_check()
8978 * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
8983 * to 0 just incase a value has lingered from a boot into Windows.
8985 static void ca0132_alt_vol_setup(struct hda_codec *codec) in ca0132_alt_vol_setup() argument
8987 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8988 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8989 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8990 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8991 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8992 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8993 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8994 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9000 static void sbz_pre_dsp_setup(struct hda_codec *codec) in sbz_pre_dsp_setup() argument
9002 struct ca0132_spec *spec = codec->spec; in sbz_pre_dsp_setup()
9004 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9005 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9007 chipio_write(codec, 0x18b0a4, 0x000000c2); in sbz_pre_dsp_setup()
9009 snd_hda_codec_write(codec, 0x11, 0, in sbz_pre_dsp_setup()
9010 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in sbz_pre_dsp_setup()
9013 static void r3d_pre_dsp_setup(struct hda_codec *codec) in r3d_pre_dsp_setup() argument
9015 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3d_pre_dsp_setup()
9017 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9018 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E); in r3d_pre_dsp_setup()
9019 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9020 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C); in r3d_pre_dsp_setup()
9021 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9022 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B); in r3d_pre_dsp_setup()
9024 snd_hda_codec_write(codec, 0x11, 0, in r3d_pre_dsp_setup()
9025 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in r3d_pre_dsp_setup()
9028 static void r3di_pre_dsp_setup(struct hda_codec *codec) in r3di_pre_dsp_setup() argument
9030 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3di_pre_dsp_setup()
9032 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9033 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E); in r3di_pre_dsp_setup()
9034 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9035 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C); in r3di_pre_dsp_setup()
9036 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9037 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B); in r3di_pre_dsp_setup()
9039 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9040 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); in r3di_pre_dsp_setup()
9041 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9042 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in r3di_pre_dsp_setup()
9043 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9044 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in r3di_pre_dsp_setup()
9045 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9046 VENDOR_CHIPIO_8051_DATA_WRITE, 0x40); in r3di_pre_dsp_setup()
9048 snd_hda_codec_write(codec, 0x11, 0, in r3di_pre_dsp_setup()
9049 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04); in r3di_pre_dsp_setup()
9058 0x400, 0x408, 0x40c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c,
9059 0xc0c, 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04
9063 0x00000030, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9064 0x00000003, 0x000000c1, 0x000000f1, 0x00000001, 0x000000c7,
9065 0x000000c1, 0x00000080
9069 0x00000030, 0x00000000, 0x00000000, 0x00000003, 0x00000003,
9070 0x00000003, 0x00000001, 0x000000f1, 0x00000001, 0x000000c7,
9071 0x000000c1, 0x00000080
9075 0x400, 0x42c, 0x46c, 0x4ac, 0x4ec, 0x43c, 0x47c, 0x4bc, 0x4fc, 0x408,
9076 0x100, 0x410, 0x40c, 0x100, 0x100, 0x830, 0x86c, 0x800, 0x86c, 0x800,
9077 0x804, 0x20c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c, 0xc0c,
9078 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04, 0x01c
9082 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
9083 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001,
9084 0x00000600, 0x00000014, 0x00000001, 0x0000060f, 0x0000070f,
9085 0x00000aff, 0x00000000, 0x0000006b, 0x00000001, 0x0000006b,
9086 0x00000057, 0x00800000, 0x00880680, 0x00000080, 0x00000030,
9087 0x00000000, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9088 0x00000001, 0x000000f1, 0x00000001, 0x000000c7, 0x000000c1,
9089 0x00000080, 0x00880680
9092 static void ca0132_mmio_init_sbz(struct hda_codec *codec) in ca0132_mmio_init_sbz() argument
9094 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init_sbz()
9099 for (i = 0; i < 3; i++) in ca0132_mmio_init_sbz()
9100 writel(0x00000000, spec->mem_base + addr[i]); in ca0132_mmio_init_sbz()
9105 tmp[0] = 0x00880480; in ca0132_mmio_init_sbz()
9106 tmp[1] = 0x00000080; in ca0132_mmio_init_sbz()
9109 tmp[0] = 0x00820680; in ca0132_mmio_init_sbz()
9110 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9113 tmp[0] = 0x00880680; in ca0132_mmio_init_sbz()
9114 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9117 tmp[0] = 0x00000000; in ca0132_mmio_init_sbz()
9118 tmp[1] = 0x00000000; in ca0132_mmio_init_sbz()
9122 for (i = 0; i < 2; i++) in ca0132_mmio_init_sbz()
9123 writel(tmp[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9138 for (i = 0; i < count; i++) in ca0132_mmio_init_sbz()
9139 writel(data[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9142 static void ca0132_mmio_init_ae5(struct hda_codec *codec) in ca0132_mmio_init_ae5() argument
9144 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init_ae5()
9153 writel(0x00000680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9154 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9157 for (i = 0; i < count; i++) { in ca0132_mmio_init_ae5()
9159 * AE-7 shares all writes with the AE-5, except that it writes in ca0132_mmio_init_ae5()
9160 * a different value to 0x20c. in ca0132_mmio_init_ae5()
9163 writel(0x00800001, spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9167 writel(data[i], spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9171 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9174 static void ca0132_mmio_init(struct hda_codec *codec) in ca0132_mmio_init() argument
9176 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init()
9182 ca0132_mmio_init_sbz(codec); in ca0132_mmio_init()
9185 ca0132_mmio_init_ae5(codec); in ca0132_mmio_init()
9193 0x304, 0x304, 0x304, 0x304, 0x100, 0x304, 0x100, 0x304, 0x100, 0x304,
9194 0x100, 0x304, 0x86c, 0x800, 0x86c, 0x800, 0x804
9198 0x0f, 0x0e, 0x1f, 0x0c, 0x3f, 0x08, 0x7f, 0x00, 0xff, 0x00, 0x6b,
9199 0x01, 0x6b, 0x57
9204 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9207 static void ae5_register_set(struct hda_codec *codec) in ae5_register_set() argument
9209 struct ca0132_spec *spec = codec->spec; in ae5_register_set()
9217 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9218 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41); in ae5_register_set()
9219 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9220 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8); in ae5_register_set()
9223 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_register_set()
9224 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9225 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae5_register_set()
9226 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9227 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae5_register_set()
9230 tmp[0] = 0x03; in ae5_register_set()
9231 tmp[1] = 0x03; in ae5_register_set()
9232 tmp[2] = 0x07; in ae5_register_set()
9234 tmp[0] = 0x0f; in ae5_register_set()
9235 tmp[1] = 0x0f; in ae5_register_set()
9236 tmp[2] = 0x0f; in ae5_register_set()
9239 for (i = cur_addr = 0; i < 3; i++, cur_addr++) in ae5_register_set()
9240 writeb(tmp[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9246 for (i = 0; cur_addr < 12; i++, cur_addr++) in ae5_register_set()
9247 writeb(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9250 writel(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9252 writel(0x00800001, spec->mem_base + 0x20c); in ae5_register_set()
9255 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9256 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_register_set()
9258 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_register_set()
9261 chipio_8051_write_direct(codec, 0x90, 0x00); in ae5_register_set()
9262 chipio_8051_write_direct(codec, 0x90, 0x10); in ae5_register_set()
9265 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9267 chipio_write(codec, 0x18b0a4, 0x000000c2); in ae5_register_set()
9269 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00); in ae5_register_set()
9270 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00); in ae5_register_set()
9278 static void ca0132_alt_init(struct hda_codec *codec) in ca0132_alt_init() argument
9280 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init()
9282 ca0132_alt_vol_setup(codec); in ca0132_alt_init()
9286 codec_dbg(codec, "SBZ alt_init"); in ca0132_alt_init()
9287 ca0132_gpio_init(codec); in ca0132_alt_init()
9288 sbz_pre_dsp_setup(codec); in ca0132_alt_init()
9289 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9290 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9293 codec_dbg(codec, "R3DI alt_init"); in ca0132_alt_init()
9294 ca0132_gpio_init(codec); in ca0132_alt_init()
9295 ca0132_gpio_setup(codec); in ca0132_alt_init()
9296 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADING); in ca0132_alt_init()
9297 r3di_pre_dsp_setup(codec); in ca0132_alt_init()
9298 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9299 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4); in ca0132_alt_init()
9302 r3d_pre_dsp_setup(codec); in ca0132_alt_init()
9303 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9304 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9307 ca0132_gpio_init(codec); in ca0132_alt_init()
9308 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9309 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49); in ca0132_alt_init()
9310 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9311 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88); in ca0132_alt_init()
9312 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9313 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9314 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9315 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9318 ca0132_gpio_init(codec); in ca0132_alt_init()
9319 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9320 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49); in ca0132_alt_init()
9321 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9322 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88); in ca0132_alt_init()
9323 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9324 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9325 chipio_write(codec, 0x18b008, 0x000000f8); in ca0132_alt_init()
9326 chipio_write(codec, 0x18b008, 0x000000f0); in ca0132_alt_init()
9327 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9328 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9331 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9332 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9339 static int ca0132_init(struct hda_codec *codec) in ca0132_init() argument
9341 struct ca0132_spec *spec = codec->spec; in ca0132_init()
9342 struct auto_pin_cfg *cfg = &spec->autocfg; in ca0132_init()
9348 * there's only two reasons for it. One, the codec has awaken from a in ca0132_init()
9356 if (spec->dsp_state == DSP_DOWNLOADED) { in ca0132_init()
9357 dsp_loaded = dspload_is_loaded(codec); in ca0132_init()
9359 spec->dsp_reload = true; in ca0132_init()
9360 spec->dsp_state = DSP_DOWNLOAD_INIT; in ca0132_init()
9363 sbz_dsp_startup_check(codec); in ca0132_init()
9364 return 0; in ca0132_init()
9368 if (spec->dsp_state != DSP_DOWNLOAD_FAILED) in ca0132_init()
9369 spec->dsp_state = DSP_DOWNLOAD_INIT; in ca0132_init()
9370 spec->curr_chip_addx = INVALID_CHIP_ADDRESS; in ca0132_init()
9373 ca0132_mmio_init(codec); in ca0132_init()
9375 snd_hda_power_up_pm(codec); in ca0132_init()
9378 ae5_register_set(codec); in ca0132_init()
9380 ca0132_init_unsol(codec); in ca0132_init()
9381 ca0132_init_params(codec); in ca0132_init()
9382 ca0132_init_flags(codec); in ca0132_init()
9384 snd_hda_sequence_write(codec, spec->base_init_verbs); in ca0132_init()
9387 ca0132_alt_init(codec); in ca0132_init()
9389 ca0132_download_dsp(codec); in ca0132_init()
9391 ca0132_refresh_widget_caps(codec); in ca0132_init()
9396 r3d_setup_defaults(codec); in ca0132_init()
9400 sbz_setup_defaults(codec); in ca0132_init()
9403 ae5_setup_defaults(codec); in ca0132_init()
9406 ae7_setup_defaults(codec); in ca0132_init()
9409 ca0132_setup_defaults(codec); in ca0132_init()
9410 ca0132_init_analog_mic2(codec); in ca0132_init()
9411 ca0132_init_dmic(codec); in ca0132_init()
9415 for (i = 0; i < spec->num_outputs; i++) in ca0132_init()
9416 init_output(codec, spec->out_pins[i], spec->dacs[0]); in ca0132_init()
9418 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in ca0132_init()
9420 for (i = 0; i < spec->num_inputs; i++) in ca0132_init()
9421 init_input(codec, spec->input_pins[i], spec->adcs[i]); in ca0132_init()
9423 init_input(codec, cfg->dig_in_pin, spec->dig_in); in ca0132_init()
9426 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_init()
9427 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9428 VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); in ca0132_init()
9429 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9430 VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); in ca0132_init()
9434 ca0132_gpio_setup(codec); in ca0132_init()
9436 snd_hda_sequence_write(codec, spec->spec_init_verbs); in ca0132_init()
9438 ca0132_alt_select_out(codec); in ca0132_init()
9439 ca0132_alt_select_in(codec); in ca0132_init()
9441 ca0132_select_out(codec); in ca0132_init()
9442 ca0132_select_mic(codec); in ca0132_init()
9445 snd_hda_jack_report_sync(codec); in ca0132_init()
9451 if (spec->dsp_reload) { in ca0132_init()
9452 spec->dsp_reload = false; in ca0132_init()
9453 ca0132_pe_switch_set(codec); in ca0132_init()
9456 snd_hda_power_down_pm(codec); in ca0132_init()
9458 return 0; in ca0132_init()
9461 static int dbpro_init(struct hda_codec *codec) in dbpro_init() argument
9463 struct ca0132_spec *spec = codec->spec; in dbpro_init()
9464 struct auto_pin_cfg *cfg = &spec->autocfg; in dbpro_init()
9467 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in dbpro_init()
9468 init_input(codec, cfg->dig_in_pin, spec->dig_in); in dbpro_init()
9470 for (i = 0; i < spec->num_inputs; i++) in dbpro_init()
9471 init_input(codec, spec->input_pins[i], spec->adcs[i]); in dbpro_init()
9473 return 0; in dbpro_init()
9476 static void ca0132_free(struct hda_codec *codec) in ca0132_free() argument
9478 struct ca0132_spec *spec = codec->spec; in ca0132_free()
9480 cancel_delayed_work_sync(&spec->unsol_hp_work); in ca0132_free()
9481 snd_hda_power_up(codec); in ca0132_free()
9484 sbz_exit_chip(codec); in ca0132_free()
9487 zxr_exit_chip(codec); in ca0132_free()
9490 r3d_exit_chip(codec); in ca0132_free()
9493 ae5_exit_chip(codec); in ca0132_free()
9496 ae7_exit_chip(codec); in ca0132_free()
9499 r3di_gpio_shutdown(codec); in ca0132_free()
9505 snd_hda_sequence_write(codec, spec->base_exit_verbs); in ca0132_free()
9506 ca0132_exit_chip(codec); in ca0132_free()
9508 snd_hda_power_down(codec); in ca0132_free()
9510 if (spec->mem_base) in ca0132_free()
9511 pci_iounmap(codec->bus->pci, spec->mem_base); in ca0132_free()
9513 kfree(spec->spec_init_verbs); in ca0132_free()
9514 kfree(codec->spec); in ca0132_free()
9517 static void dbpro_free(struct hda_codec *codec) in dbpro_free() argument
9519 struct ca0132_spec *spec = codec->spec; in dbpro_free()
9521 zxr_dbpro_power_state_shutdown(codec); in dbpro_free()
9523 kfree(spec->spec_init_verbs); in dbpro_free()
9524 kfree(codec->spec); in dbpro_free()
9527 static void ca0132_reboot_notify(struct hda_codec *codec) in ca0132_reboot_notify() argument
9529 codec->patch_ops.free(codec); in ca0132_reboot_notify()
9533 static int ca0132_suspend(struct hda_codec *codec) in ca0132_suspend() argument
9535 struct ca0132_spec *spec = codec->spec; in ca0132_suspend()
9537 cancel_delayed_work_sync(&spec->unsol_hp_work); in ca0132_suspend()
9538 return 0; in ca0132_suspend()
9561 static void ca0132_config(struct hda_codec *codec) in ca0132_config() argument
9563 struct ca0132_spec *spec = codec->spec; in ca0132_config()
9565 spec->dacs[0] = 0x2; in ca0132_config()
9566 spec->dacs[1] = 0x3; in ca0132_config()
9567 spec->dacs[2] = 0x4; in ca0132_config()
9569 spec->multiout.dac_nids = spec->dacs; in ca0132_config()
9570 spec->multiout.num_dacs = 3; in ca0132_config()
9573 spec->multiout.max_channels = 2; in ca0132_config()
9575 spec->multiout.max_channels = 6; in ca0132_config()
9579 codec_dbg(codec, "%s: QUIRK_ALIENWARE applied.\n", __func__); in ca0132_config()
9580 snd_hda_apply_pincfgs(codec, alienware_pincfgs); in ca0132_config()
9583 codec_dbg(codec, "%s: QUIRK_SBZ applied.\n", __func__); in ca0132_config()
9584 snd_hda_apply_pincfgs(codec, sbz_pincfgs); in ca0132_config()
9587 codec_dbg(codec, "%s: QUIRK_ZXR applied.\n", __func__); in ca0132_config()
9588 snd_hda_apply_pincfgs(codec, zxr_pincfgs); in ca0132_config()
9591 codec_dbg(codec, "%s: QUIRK_R3D applied.\n", __func__); in ca0132_config()
9592 snd_hda_apply_pincfgs(codec, r3d_pincfgs); in ca0132_config()
9595 codec_dbg(codec, "%s: QUIRK_R3DI applied.\n", __func__); in ca0132_config()
9596 snd_hda_apply_pincfgs(codec, r3di_pincfgs); in ca0132_config()
9599 codec_dbg(codec, "%s: QUIRK_AE5 applied.\n", __func__); in ca0132_config()
9600 snd_hda_apply_pincfgs(codec, ae5_pincfgs); in ca0132_config()
9603 codec_dbg(codec, "%s: QUIRK_AE7 applied.\n", __func__); in ca0132_config()
9604 snd_hda_apply_pincfgs(codec, ae7_pincfgs); in ca0132_config()
9612 spec->num_outputs = 2; in ca0132_config()
9613 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9614 spec->out_pins[1] = 0x0f; in ca0132_config()
9615 spec->shared_out_nid = 0x2; in ca0132_config()
9616 spec->unsol_tag_hp = 0x0f; in ca0132_config()
9618 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9619 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9620 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9622 spec->num_inputs = 3; in ca0132_config()
9623 spec->input_pins[0] = 0x12; in ca0132_config()
9624 spec->input_pins[1] = 0x11; in ca0132_config()
9625 spec->input_pins[2] = 0x13; in ca0132_config()
9626 spec->shared_mic_nid = 0x7; in ca0132_config()
9627 spec->unsol_tag_amic1 = 0x11; in ca0132_config()
9631 spec->num_outputs = 2; in ca0132_config()
9632 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9633 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9634 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9635 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9636 spec->shared_out_nid = 0x2; in ca0132_config()
9637 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9638 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9640 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9641 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9642 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9644 spec->num_inputs = 2; in ca0132_config()
9645 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9646 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9647 spec->shared_mic_nid = 0x7; in ca0132_config()
9648 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9651 spec->dig_out = 0x05; in ca0132_config()
9652 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9653 spec->dig_in = 0x09; in ca0132_config()
9656 spec->num_outputs = 2; in ca0132_config()
9657 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9658 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9659 spec->out_pins[2] = 0x10; /* Center/LFE */ in ca0132_config()
9660 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9661 spec->shared_out_nid = 0x2; in ca0132_config()
9662 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9663 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9665 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9666 spec->adcs[1] = 0x8; /* Not connected, no front mic */ in ca0132_config()
9667 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9669 spec->num_inputs = 2; in ca0132_config()
9670 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9671 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9672 spec->shared_mic_nid = 0x7; in ca0132_config()
9673 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9676 spec->adcs[0] = 0x8; /* ZxR DBPro Aux In */ in ca0132_config()
9678 spec->num_inputs = 1; in ca0132_config()
9679 spec->input_pins[0] = 0x11; /* RCA Line-in */ in ca0132_config()
9681 spec->dig_out = 0x05; in ca0132_config()
9682 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9684 spec->dig_in = 0x09; in ca0132_config()
9688 spec->num_outputs = 2; in ca0132_config()
9689 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9690 spec->out_pins[1] = 0x11; /* Rear headphone out */ in ca0132_config()
9691 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9692 spec->out_pins[3] = 0x0F; /* Rear surround */ in ca0132_config()
9693 spec->shared_out_nid = 0x2; in ca0132_config()
9694 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9695 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9697 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9698 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9699 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9701 spec->num_inputs = 2; in ca0132_config()
9702 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9703 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9704 spec->shared_mic_nid = 0x7; in ca0132_config()
9705 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9708 spec->dig_out = 0x05; in ca0132_config()
9709 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9712 spec->num_outputs = 2; in ca0132_config()
9713 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9714 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9715 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9716 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9717 spec->shared_out_nid = 0x2; in ca0132_config()
9718 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9719 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9721 spec->adcs[0] = 0x07; /* Rear Mic / Line-in */ in ca0132_config()
9722 spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */ in ca0132_config()
9723 spec->adcs[2] = 0x0a; /* what u hear */ in ca0132_config()
9725 spec->num_inputs = 2; in ca0132_config()
9726 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9727 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9728 spec->shared_mic_nid = 0x7; in ca0132_config()
9729 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9732 spec->dig_out = 0x05; in ca0132_config()
9733 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9736 spec->num_outputs = 2; in ca0132_config()
9737 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9738 spec->out_pins[1] = 0x10; /* headphone out */ in ca0132_config()
9739 spec->shared_out_nid = 0x2; in ca0132_config()
9740 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9742 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9743 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9744 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9746 spec->num_inputs = 3; in ca0132_config()
9747 spec->input_pins[0] = 0x12; in ca0132_config()
9748 spec->input_pins[1] = 0x11; in ca0132_config()
9749 spec->input_pins[2] = 0x13; in ca0132_config()
9750 spec->shared_mic_nid = 0x7; in ca0132_config()
9751 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9754 spec->dig_out = 0x05; in ca0132_config()
9755 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9756 spec->dig_in = 0x09; in ca0132_config()
9761 static int ca0132_prepare_verbs(struct hda_codec *codec) in ca0132_prepare_verbs() argument
9765 struct ca0132_spec *spec = codec->spec; in ca0132_prepare_verbs()
9767 spec->chip_init_verbs = ca0132_init_verbs0; in ca0132_prepare_verbs()
9773 spec->desktop_init_verbs = ca0132_init_verbs1; in ca0132_prepare_verbs()
9774 spec->spec_init_verbs = kcalloc(NUM_SPEC_VERBS, in ca0132_prepare_verbs()
9777 if (!spec->spec_init_verbs) in ca0132_prepare_verbs()
9778 return -ENOMEM; in ca0132_prepare_verbs()
9781 spec->spec_init_verbs[0].nid = 0x0b; in ca0132_prepare_verbs()
9782 spec->spec_init_verbs[0].param = 0x78D; in ca0132_prepare_verbs()
9783 spec->spec_init_verbs[0].verb = 0x00; in ca0132_prepare_verbs()
9787 spec->spec_init_verbs[2].nid = 0x0b; in ca0132_prepare_verbs()
9788 spec->spec_init_verbs[2].param = AC_VERB_SET_EAPD_BTLENABLE; in ca0132_prepare_verbs()
9789 spec->spec_init_verbs[2].verb = 0x02; in ca0132_prepare_verbs()
9791 spec->spec_init_verbs[3].nid = 0x10; in ca0132_prepare_verbs()
9792 spec->spec_init_verbs[3].param = 0x78D; in ca0132_prepare_verbs()
9793 spec->spec_init_verbs[3].verb = 0x02; in ca0132_prepare_verbs()
9795 spec->spec_init_verbs[4].nid = 0x10; in ca0132_prepare_verbs()
9796 spec->spec_init_verbs[4].param = AC_VERB_SET_EAPD_BTLENABLE; in ca0132_prepare_verbs()
9797 spec->spec_init_verbs[4].verb = 0x02; in ca0132_prepare_verbs()
9800 /* Terminator: spec->spec_init_verbs[NUM_SPEC_VERBS-1] */ in ca0132_prepare_verbs()
9801 return 0; in ca0132_prepare_verbs()
9806 * Sound Blaster Z cards. However, they have different HDA codec subsystem
9810 static void sbz_detect_quirk(struct hda_codec *codec) in sbz_detect_quirk() argument
9812 struct ca0132_spec *spec = codec->spec; in sbz_detect_quirk()
9814 switch (codec->core.subsystem_id) { in sbz_detect_quirk()
9815 case 0x11020033: in sbz_detect_quirk()
9816 spec->quirk = QUIRK_ZXR; in sbz_detect_quirk()
9818 case 0x1102003f: in sbz_detect_quirk()
9819 spec->quirk = QUIRK_ZXR_DBPRO; in sbz_detect_quirk()
9822 spec->quirk = QUIRK_SBZ; in sbz_detect_quirk()
9827 static int patch_ca0132(struct hda_codec *codec) in patch_ca0132() argument
9833 codec_dbg(codec, "patch_ca0132\n"); in patch_ca0132()
9837 return -ENOMEM; in patch_ca0132()
9838 codec->spec = spec; in patch_ca0132()
9839 spec->codec = codec; in patch_ca0132()
9841 /* Detect codec quirk */ in patch_ca0132()
9842 quirk = snd_pci_quirk_lookup(codec->bus->pci, ca0132_quirks); in patch_ca0132()
9844 spec->quirk = quirk->value; in patch_ca0132()
9846 spec->quirk = QUIRK_NONE; in patch_ca0132()
9848 sbz_detect_quirk(codec); in patch_ca0132()
9851 codec->patch_ops = dbpro_patch_ops; in patch_ca0132()
9853 codec->patch_ops = ca0132_patch_ops; in patch_ca0132()
9855 codec->pcm_format_first = 1; in patch_ca0132()
9856 codec->no_sticky_stream = 1; in patch_ca0132()
9859 spec->dsp_state = DSP_DOWNLOAD_INIT; in patch_ca0132()
9860 spec->num_mixers = 1; in patch_ca0132()
9865 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9866 snd_hda_codec_set_name(codec, "Sound Blaster Z"); in patch_ca0132()
9869 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9870 snd_hda_codec_set_name(codec, "Sound Blaster ZxR"); in patch_ca0132()
9875 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9876 snd_hda_codec_set_name(codec, "Recon3D"); in patch_ca0132()
9879 spec->mixers[0] = r3di_mixer; in patch_ca0132()
9880 snd_hda_codec_set_name(codec, "Recon3Di"); in patch_ca0132()
9883 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9884 snd_hda_codec_set_name(codec, "Sound BlasterX AE-5"); in patch_ca0132()
9887 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9888 snd_hda_codec_set_name(codec, "Sound Blaster AE-7"); in patch_ca0132()
9891 spec->mixers[0] = ca0132_mixer; in patch_ca0132()
9902 spec->use_alt_controls = true; in patch_ca0132()
9903 spec->use_alt_functions = true; in patch_ca0132()
9904 spec->use_pci_mmio = true; in patch_ca0132()
9907 spec->use_alt_controls = true; in patch_ca0132()
9908 spec->use_alt_functions = true; in patch_ca0132()
9909 spec->use_pci_mmio = false; in patch_ca0132()
9912 spec->use_alt_controls = false; in patch_ca0132()
9913 spec->use_alt_functions = false; in patch_ca0132()
9914 spec->use_pci_mmio = false; in patch_ca0132()
9919 if (spec->use_pci_mmio) { in patch_ca0132()
9920 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in patch_ca0132()
9921 if (spec->mem_base == NULL) { in patch_ca0132()
9922 codec_warn(codec, "pci_iomap failed! Setting quirk to QUIRK_NONE."); in patch_ca0132()
9923 spec->quirk = QUIRK_NONE; in patch_ca0132()
9928 spec->base_init_verbs = ca0132_base_init_verbs; in patch_ca0132()
9929 spec->base_exit_verbs = ca0132_base_exit_verbs; in patch_ca0132()
9931 INIT_DELAYED_WORK(&spec->unsol_hp_work, ca0132_unsol_hp_delayed); in patch_ca0132()
9933 ca0132_init_chip(codec); in patch_ca0132()
9935 ca0132_config(codec); in patch_ca0132()
9937 err = ca0132_prepare_verbs(codec); in patch_ca0132()
9938 if (err < 0) in patch_ca0132()
9941 err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL); in patch_ca0132()
9942 if (err < 0) in patch_ca0132()
9945 return 0; in patch_ca0132()
9948 ca0132_free(codec); in patch_ca0132()
9956 HDA_CODEC_ENTRY(0x11020011, "CA0132", patch_ca0132),
9962 MODULE_DESCRIPTION("Creative Sound Core3D codec");