Lines Matching +full:8 +full:- +full:12
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5659.h -- RT5659/RT5658 ALSA SoC audio driver
21 /* I/O - Output */
31 /* I/O - Input */
36 /* I/O - Speaker */
42 /* I/O - Sidetone */
44 /* I/O - ADC/DAC/DMIC */
56 /* Mixer - D-D */
65 /* Mixer - PDM */
73 /* Mixer - ADC */
85 /* Mixer - DAC */
127 /* Format - ADC/DAC */
135 /* Format - TDM Control */
142 /* Function - Analog */
170 /* Function - Digital */
547 #define RT5659_L_VOL_MASK (0x3f << 8)
548 #define RT5659_L_VOL_SFT 8
553 #define RT5659_G_HP (0x1f << 8)
554 #define RT5659_G_HP_SFT 8
561 #define RT5659_BST1_MASK (0x7f << 8)
562 #define RT5659_BST1_SFT 8
569 #define RT5659_BST3_MASK (0x7f << 8)
570 #define RT5659_BST3_SFT 8
577 #define RT5659_INL_VOL_MASK (0x1f << 8)
578 #define RT5659_INL_VOL_SFT 8
614 #define RT5659_DAC_L1_VOL_MASK (0xff << 8)
615 #define RT5659_DAC_L1_VOL_SFT 8
620 #define RT5659_DAC_L2_VOL_MASK (0xff << 8)
621 #define RT5659_DAC_L2_VOL_SFT 8
628 #define RT5659_M_DAC2_R_VOL (0x1 << 12)
629 #define RT5659_M_DAC2_R_VOL_SFT 12
636 #define RT5659_ADC_L_VOL_MASK (0x7f << 8)
637 #define RT5659_ADC_L_VOL_SFT 8
642 #define RT5659_MONO_ADC_L_VOL_MASK (0x7f << 8)
643 #define RT5659_MONO_ADC_L_VOL_SFT 8
650 #define RT5659_STO1_ADC_R_BST_MASK (0x3 << 12)
651 #define RT5659_STO1_ADC_R_BST_SFT 12
656 #define RT5659_MONO_ADC_R_BST_MASK (0x3 << 12)
657 #define RT5659_MONO_ADC_R_BST_SFT 12
662 #define RT5659_STO2_ADC_R_BST_MASK (0x3 << 12)
663 #define RT5659_STO2_ADC_R_BST_SFT 12
674 #define RT5659_STO1_ADC_SRC_MASK (0x1 << 12)
675 #define RT5659_STO1_ADC_SRC_SFT 12
676 #define RT5659_STO1_ADC_SRC_ADC1 (0x1 << 12)
677 #define RT5659_STO1_ADC_SRC_ADC2 (0x0 << 12)
680 #define RT5659_STO1_DMIC_SRC_MASK (0x1 << 8)
681 #define RT5659_STO1_DMIC_SRC_SFT 8
682 #define RT5659_STO1_DMIC_SRC_DMIC2 (0x1 << 8)
683 #define RT5659_STO1_DMIC_SRC_DMIC1 (0x0 << 8)
694 #define RT5659_MONO_ADC_L2_SRC_MASK (0x1 << 12)
695 #define RT5659_MONO_ADC_L2_SRC_SFT 12
700 #define RT5659_MONO_DMIC_L_SRC_MASK (0x1 << 8)
701 #define RT5659_MONO_DMIC_L_SRC_SFT 8
727 #define RT5659_DAC1_L_SEL_MASK (0x3 << 8)
728 #define RT5659_DAC1_L_SEL_SFT 8
729 #define RT5659_DAC1_L_SEL_IF1 (0x0 << 8)
730 #define RT5659_DAC1_L_SEL_IF2 (0x1 << 8)
731 #define RT5659_DAC1_L_SEL_IF3 (0x2 << 8)
744 #define RT5659_G_DAC_R1_STO_L_MASK (0x1 << 12)
745 #define RT5659_G_DAC_R1_STO_L_SFT 12
752 #define RT5659_G_DAC_R2_STO_L_MASK (0x1 << 8)
753 #define RT5659_G_DAC_R2_STO_L_SFT 8
778 #define RT5659_G_DAC_R1_MONO_L_MASK (0x1 << 12)
779 #define RT5659_G_DAC_R1_MONO_L_SFT 12
786 #define RT5659_G_DAC_R2_MONO_L_MASK (0x1 << 8)
787 #define RT5659_G_DAC_R2_MONO_L_SFT 8
828 #define RT5659_IF2_ADC_IN_MASK (0x3 << 12)
829 #define RT5659_IF2_ADC_IN_SFT 12
832 #define RT5659_IF2_ADC_SEL_MASK (0x3 << 8)
833 #define RT5659_IF2_ADC_SEL_SFT 8
848 #define RT5659_M_PDM1_R (0x1 << 12)
849 #define RT5659_M_PDM1_R_SFT 12
915 #define RT5659_M_SPKVOLL_SPKOMIX (0x1 << 12)
916 #define RT5659_M_SPKVOLL_SPKOMIX_SFT 12
919 #define RT5659_M_SPKVOLR_SPKOMIX (0x1 << 8)
920 #define RT5659_M_SPKVOLR_SPKOMIX_SFT 8
925 #define RT5659_M_DAC_L2_MA (0x1 << 8)
926 #define RT5659_M_DAC_L2_MA_SFT 8
939 #define RT5659_G_BST3_OM_L_MASK (0x7 << 12)
940 #define RT5659_G_BST3_OM_L_SFT 12
981 #define RT5659_M_OV_R_LM (0x1 << 12)
982 #define RT5659_M_OV_R_LM_SFT 12
991 #define RT5659_PWR_SPDIF (0x1 << 12)
992 #define RT5659_PWR_SPDIF_BIT 12
999 #define RT5659_PWR_DAC_R2 (0x1 << 8)
1000 #define RT5659_PWR_DAC_R2_BIT 8
1021 #define RT5659_PWR_ADC_MF_R (0x1 << 12)
1022 #define RT5659_PWR_ADC_MF_R_BIT 12
1027 #define RT5659_PWR_DAC_MF_R (0x1 << 8)
1028 #define RT5659_PWR_DAC_MF_R_BIT 8
1039 #define RT5659_PWR_FV2 (0x1 << 12)
1040 #define RT5659_PWR_FV2_BIT 12
1047 #define RT5659_PWR_LM (0x1 << 8)
1048 #define RT5659_PWR_LM_BIT 8
1065 #define RT5659_PWR_BST4 (0x1 << 12)
1066 #define RT5659_PWR_BST4_BIT 12
1089 #define RT5659_PWR_BST_L (0x1 << 8)
1090 #define RT5659_PWR_BST_L_BIT 8
1113 #define RT5659_PWR_SM_R (0x1 << 12)
1114 #define RT5659_PWR_SM_R_BIT 12
1119 #define RT5659_PWR_MM (0x1 << 8)
1120 #define RT5659_PWR_MM_BIT 8
1133 #define RT5659_PWR_OV_R (0x1 << 12)
1134 #define RT5659_PWR_OV_R_BIT 12
1137 #define RT5659_PWR_IN_R (0x1 << 8)
1138 #define RT5659_PWR_IN_R_BIT 8
1149 #define RT5659_I2S_O_CP_MASK (0x3 << 12)
1150 #define RT5659_I2S_O_CP_SFT 12
1151 #define RT5659_I2S_O_CP_OFF (0x0 << 12)
1152 #define RT5659_I2S_O_CP_U_LAW (0x1 << 12)
1153 #define RT5659_I2S_O_CP_A_LAW (0x2 << 12)
1159 #define RT5659_I2S_BP_MASK (0x1 << 8)
1160 #define RT5659_I2S_BP_SFT 8
1161 #define RT5659_I2S_BP_NOR (0x0 << 8)
1162 #define RT5659_I2S_BP_INV (0x1 << 8)
1179 #define RT5659_I2S_PD1_MASK (0x7 << 12)
1180 #define RT5659_I2S_PD1_SFT 12
1181 #define RT5659_I2S_PD1_1 (0x0 << 12)
1182 #define RT5659_I2S_PD1_2 (0x1 << 12)
1183 #define RT5659_I2S_PD1_3 (0x2 << 12)
1184 #define RT5659_I2S_PD1_4 (0x3 << 12)
1185 #define RT5659_I2S_PD1_6 (0x4 << 12)
1186 #define RT5659_I2S_PD1_8 (0x5 << 12)
1187 #define RT5659_I2S_PD1_12 (0x6 << 12)
1188 #define RT5659_I2S_PD1_16 (0x7 << 12)
1193 #define RT5659_I2S_PD2_MASK (0x7 << 8)
1194 #define RT5659_I2S_PD2_SFT 8
1195 #define RT5659_I2S_PD2_1 (0x0 << 8)
1196 #define RT5659_I2S_PD2_2 (0x1 << 8)
1197 #define RT5659_I2S_PD2_3 (0x2 << 8)
1198 #define RT5659_I2S_PD2_4 (0x3 << 8)
1199 #define RT5659_I2S_PD2_6 (0x4 << 8)
1200 #define RT5659_I2S_PD2_8 (0x5 << 8)
1201 #define RT5659_I2S_PD2_12 (0x6 << 8)
1202 #define RT5659_I2S_PD2_16 (0x7 << 8)
1243 #define RT5659_DMIC_1R_LH_MASK (0x1 << 12)
1244 #define RT5659_DMIC_1R_LH_SFT 12
1245 #define RT5659_DMIC_1R_LH_RISING (0x0 << 12)
1246 #define RT5659_DMIC_1R_LH_FALLING (0x1 << 12)
1264 #define RT5659_DS_ADC_SLOT23_SFT 12
1266 #define RT5659_DS_ADC_SLOT67_SFT 8
1299 #define RT5659_PLL_M_MASK (RT5659_PLL_M_MAX << 12)
1300 #define RT5659_PLL_M_SFT 12
1307 #define RT5659_I2S2_ASRC_MASK (0x1 << 12)
1308 #define RT5659_I2S2_ASRC_SFT 12
1315 #define RT5659_DAC_MONO_R_ASRC_MASK (0x1 << 8)
1316 #define RT5659_DAC_MONO_R_ASRC_SFT 8
1331 #define RT5659_DA_STO_T_MASK (0x7 << 12)
1332 #define RT5659_DA_STO_T_SFT 12
1333 #define RT5659_DA_MONO_L_T_MASK (0x7 << 8)
1334 #define RT5659_DA_MONO_L_T_SFT 8
1341 #define RT5659_AD_STO2_T_MASK (0x7 << 8)
1342 #define RT5659_AD_STO2_T_SFT 8
1349 #define RT5659_I2S1_RATE_MASK (0xf << 12)
1350 #define RT5659_I2S1_RATE_SFT 12
1351 #define RT5659_I2S2_RATE_MASK (0xf << 8)
1352 #define RT5659_I2S2_RATE_SFT 8
1365 #define RT5659_HP_R_SMT_MASK (0x1 << 8)
1366 #define RT5659_HP_R_SMT_SFT 8
1367 #define RT5659_HP_R_SMT_DIS (0x0 << 8)
1368 #define RT5659_HP_R_SMT_EN (0x1 << 8)
1407 #define RT5659_RAMP_MASK (0x1 << 12)
1408 #define RT5659_RAMP_SFT 12
1409 #define RT5659_RAMP_DIS (0x0 << 12)
1410 #define RT5659_RAMP_EN (0x1 << 12)
1419 #define RT5659_MRES_MASK (0x3 << 8)
1420 #define RT5659_MRES_SFT 8
1421 #define RT5659_MRES_15MO (0x0 << 8)
1422 #define RT5659_MRES_25MO (0x1 << 8)
1423 #define RT5659_MRES_35MO (0x2 << 8)
1424 #define RT5659_MRES_45MO (0x3 << 8)
1437 #define RT5659_CP_SYS_MASK (0x7 << 12)
1438 #define RT5659_CP_SYS_SFT 12
1439 #define RT5659_CP_FQ1_MASK (0x7 << 8)
1440 #define RT5659_CP_FQ1_SFT 8
1463 #define RT5659_PM_HP_MASK (0x3 << 8)
1464 #define RT5659_PM_HP_SFT 8
1465 #define RT5659_PM_HP_LV (0x0 << 8)
1466 #define RT5659_PM_HP_MV (0x1 << 8)
1467 #define RT5659_PM_HP_HV (0x2 << 8)
1498 #define RT5659_MIC2_CLK_MASK (0x1 << 12)
1499 #define RT5659_MIC2_CLK_SFT 12
1500 #define RT5659_MIC2_CLK_DIS (0x0 << 12)
1501 #define RT5659_MIC2_CLK_EN (0x1 << 12)
1511 #define RT5659_MIC2_OVCD_MASK (0x1 << 8)
1512 #define RT5659_MIC2_OVCD_SFT 8
1513 #define RT5659_MIC2_OVCD_DIS (0x0 << 8)
1514 #define RT5659_MIC2_OVCD_EN (0x1 << 8)
1571 #define RT5659_EQ_DITH_MASK (0x3 << 8)
1572 #define RT5659_EQ_DITH_SFT 8
1573 #define RT5659_EQ_DITH_NOR (0x0 << 8)
1574 #define RT5659_EQ_DITH_LSB (0x1 << 8)
1575 #define RT5659_EQ_DITH_LSB_1 (0x2 << 8)
1576 #define RT5659_EQ_DITH_LSB_2 (0x3 << 8)
1583 #define RT5659_JD1_2_EN_MASK (0x1 << 12)
1584 #define RT5659_JD1_2_EN_SFT 12
1585 #define RT5659_JD1_2_DIS (0x0 << 12)
1586 #define RT5659_JD1_2_EN (0x1 << 12)
1608 #define RT5659_GP4_PIN_MASK (0x1 << 12)
1609 #define RT5659_GP4_PIN_SFT 12
1610 #define RT5659_GP4_PIN_GPIO4 (0x0 << 12)
1611 #define RT5659_GP4_PIN_PDM_SDA (0x1 << 12)
1624 #define RT5659_GP8_PIN_MASK (0x1 << 8)
1625 #define RT5659_GP8_PIN_SFT 8
1626 #define RT5659_GP8_PIN_GPIO8 (0x0 << 8)
1627 #define RT5659_GP8_PIN_PDM_SDA (0x1 << 8)
1677 #define RT5659_HP_SV_MASK (0x1 << 12)
1678 #define RT5659_HP_SV_SFT 12
1679 #define RT5659_HP_SV_DIS (0x0 << 12)
1680 #define RT5659_HP_SV_EN (0x1 << 12)
1728 #define RT5659_M_RF_DIG_MASK (0x1 << 12)
1729 #define RT5659_M_RF_DIG_SFT 12
1735 #define RT5659_CKGEN_DAC1_MASK (0x1 << 12)
1736 #define RT5659_CKGEN_DAC1_SFT 12
1745 #define RT5659_CKGEN_ADC1_MASK (0x1 << 12)
1746 #define RT5659_CKGEN_ADC1_SFT 12