Lines Matching +full:adc +full:- +full:dev
1 // SPDX-License-Identifier: GPL-2.0
3 * rt715.c -- rt715 ALSA SoC audio driver
32 #include <sound/soc-dapm.h>
61 ret = regmap_read(rt715->regmap, addr_l, r_val); in rt715_get_gain()
68 ret = regmap_read(rt715->regmap, addr_h, l_val); in rt715_get_gain()
73 /* For Verb-Set Amplifier Gain (Verb ID = 3h) */
81 (struct soc_mixer_control *)kcontrol->private_value; in rt715_set_amp_gain_put()
88 addr_h = mc->reg; in rt715_set_amp_gain_put()
89 addr_l = mc->rreg; in rt715_set_amp_gain_put()
90 if (mc->shift == RT715_DIR_OUT_SFT) /* output */ in rt715_set_amp_gain_put()
98 if (mc->invert) { in rt715_set_amp_gain_put()
100 val_ll = (mc->max - ucontrol->value.integer.value[0]) << 7; in rt715_set_amp_gain_put()
106 val_ll = ((ucontrol->value.integer.value[0]) & 0x7f); in rt715_set_amp_gain_put()
107 if (val_ll > mc->max) in rt715_set_amp_gain_put()
108 val_ll = mc->max; in rt715_set_amp_gain_put()
115 if (mc->invert) { in rt715_set_amp_gain_put()
116 regmap_write(rt715->regmap, in rt715_set_amp_gain_put()
119 val_lr = (mc->max - ucontrol->value.integer.value[1]) << 7; in rt715_set_amp_gain_put()
125 val_lr = ((ucontrol->value.integer.value[1]) & 0x7f); in rt715_set_amp_gain_put()
126 if (val_lr > mc->max) in rt715_set_amp_gain_put()
127 val_lr = mc->max; in rt715_set_amp_gain_put()
137 val_h = (1 << mc->shift) | (3 << 4); in rt715_set_amp_gain_put()
138 regmap_write(rt715->regmap, addr_h, in rt715_set_amp_gain_put()
140 regmap_write(rt715->regmap, addr_l, in rt715_set_amp_gain_put()
144 val_h = (1 << mc->shift) | (1 << 5); in rt715_set_amp_gain_put()
145 regmap_write(rt715->regmap, addr_h, in rt715_set_amp_gain_put()
148 val_h = (1 << mc->shift) | (1 << 4); in rt715_set_amp_gain_put()
149 regmap_write(rt715->regmap, addr_l, in rt715_set_amp_gain_put()
153 if (mc->shift == RT715_DIR_OUT_SFT) /* output */ in rt715_set_amp_gain_put()
164 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY) in rt715_set_amp_gain_put()
165 regmap_write(rt715->regmap, in rt715_set_amp_gain_put()
176 (struct soc_mixer_control *)kcontrol->private_value; in rt715_set_amp_gain_get()
180 addr_h = mc->reg; in rt715_set_amp_gain_get()
181 addr_l = mc->rreg; in rt715_set_amp_gain_get()
182 if (mc->shift == RT715_DIR_OUT_SFT) /* output */ in rt715_set_amp_gain_get()
189 if (mc->invert) { in rt715_set_amp_gain_get()
198 ucontrol->value.integer.value[0] = read_ll; in rt715_set_amp_gain_get()
199 ucontrol->value.integer.value[1] = read_rl; in rt715_set_amp_gain_get()
204 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
217 SOC_DOUBLE_R_EXT("ADC 07 Capture Switch", RT715_SET_GAIN_MIC_ADC_H,
220 SOC_DOUBLE_R_EXT("ADC 08 Capture Switch", RT715_SET_GAIN_LINE_ADC_H,
223 SOC_DOUBLE_R_EXT("ADC 09 Capture Switch", RT715_SET_GAIN_MIX_ADC_H,
226 SOC_DOUBLE_R_EXT("ADC 27 Capture Switch", RT715_SET_GAIN_MIX_ADC2_H,
230 SOC_DOUBLE_R_EXT_TLV("ADC 07 Capture Volume", RT715_SET_GAIN_MIC_ADC_H,
234 SOC_DOUBLE_R_EXT_TLV("ADC 08 Capture Volume", RT715_SET_GAIN_LINE_ADC_H,
238 SOC_DOUBLE_R_EXT_TLV("ADC 09 Capture Volume", RT715_SET_GAIN_MIX_ADC_H,
242 SOC_DOUBLE_R_EXT_TLV("ADC 27 Capture Volume", RT715_SET_GAIN_MIX_ADC2_H,
287 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in rt715_mux_get()
291 /* nid = e->reg, vid = 0xf01 */ in rt715_mux_get()
292 reg = RT715_VERB_SET_CONNECT_SEL | e->reg; in rt715_mux_get()
293 ret = regmap_read(rt715->regmap, reg, &val); in rt715_mux_get()
295 dev_err(component->dev, "%s: sdw read failed: %d\n", in rt715_mux_get()
301 * The first two indices of ADC Mux 24/25 are routed to the same in rt715_mux_get()
302 * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2. in rt715_mux_get()
305 if ((e->reg == RT715_MUX_IN3 || e->reg == RT715_MUX_IN4) && (val > 0)) in rt715_mux_get()
306 val -= 1; in rt715_mux_get()
307 ucontrol->value.enumerated.item[0] = val; in rt715_mux_get()
320 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in rt715_mux_put()
321 unsigned int *item = ucontrol->value.enumerated.item; in rt715_mux_put()
325 if (item[0] >= e->items) in rt715_mux_put()
326 return -EINVAL; in rt715_mux_put()
328 /* Verb ID = 0x701h, nid = e->reg */ in rt715_mux_put()
329 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l; in rt715_mux_put()
331 reg = RT715_VERB_SET_CONNECT_SEL | e->reg; in rt715_mux_put()
332 ret = regmap_read(rt715->regmap, reg, &val2); in rt715_mux_put()
334 dev_err(component->dev, "%s: sdw read failed: %d\n", in rt715_mux_put()
345 reg = RT715_VERB_SET_CONNECT_SEL | e->reg; in rt715_mux_put()
346 regmap_write(rt715->regmap, reg, val); in rt715_mux_put()
410 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
414 SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
418 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
422 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
434 SND_SOC_DAPM_ADC("ADC 07", NULL, RT715_SET_STREAMID_MIC_ADC, 4, 0),
435 SND_SOC_DAPM_ADC("ADC 08", NULL, RT715_SET_STREAMID_LINE_ADC, 4, 0),
436 SND_SOC_DAPM_ADC("ADC 09", NULL, RT715_SET_STREAMID_MIX_ADC, 4, 0),
437 SND_SOC_DAPM_ADC("ADC 27", NULL, RT715_SET_STREAMID_MIX_ADC2, 4, 0),
438 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
440 SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
442 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
444 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
451 {"DP6TX", NULL, "ADC 09"},
452 {"DP6TX", NULL, "ADC 08"},
453 {"DP4TX", NULL, "ADC 07"},
454 {"DP4TX", NULL, "ADC 27"},
455 {"ADC 09", NULL, "ADC 22 Mux"},
456 {"ADC 08", NULL, "ADC 23 Mux"},
457 {"ADC 07", NULL, "ADC 24 Mux"},
458 {"ADC 27", NULL, "ADC 25 Mux"},
459 {"ADC 22 Mux", "MIC1", "MIC1"},
460 {"ADC 22 Mux", "MIC2", "MIC2"},
461 {"ADC 22 Mux", "LINE1", "LINE1"},
462 {"ADC 22 Mux", "LINE2", "LINE2"},
463 {"ADC 22 Mux", "DMIC1", "DMIC1"},
464 {"ADC 22 Mux", "DMIC2", "DMIC2"},
465 {"ADC 22 Mux", "DMIC3", "DMIC3"},
466 {"ADC 22 Mux", "DMIC4", "DMIC4"},
467 {"ADC 23 Mux", "MIC1", "MIC1"},
468 {"ADC 23 Mux", "MIC2", "MIC2"},
469 {"ADC 23 Mux", "LINE1", "LINE1"},
470 {"ADC 23 Mux", "LINE2", "LINE2"},
471 {"ADC 23 Mux", "DMIC1", "DMIC1"},
472 {"ADC 23 Mux", "DMIC2", "DMIC2"},
473 {"ADC 23 Mux", "DMIC3", "DMIC3"},
474 {"ADC 23 Mux", "DMIC4", "DMIC4"},
475 {"ADC 24 Mux", "MIC2", "MIC2"},
476 {"ADC 24 Mux", "DMIC1", "DMIC1"},
477 {"ADC 24 Mux", "DMIC2", "DMIC2"},
478 {"ADC 24 Mux", "DMIC3", "DMIC3"},
479 {"ADC 24 Mux", "DMIC4", "DMIC4"},
480 {"ADC 25 Mux", "MIC1", "MIC1"},
481 {"ADC 25 Mux", "DMIC1", "DMIC1"},
482 {"ADC 25 Mux", "DMIC2", "DMIC2"},
483 {"ADC 25 Mux", "DMIC3", "DMIC3"},
484 {"ADC 25 Mux", "DMIC4", "DMIC4"},
496 if (dapm->bias_level == SND_SOC_BIAS_STANDBY) { in rt715_set_bias_level()
497 regmap_write(rt715->regmap, in rt715_set_bias_level()
505 regmap_write(rt715->regmap, in rt715_set_bias_level()
513 dapm->bias_level = level; in rt715_set_bias_level()
538 return -ENOMEM; in rt715_set_sdw_stream()
540 stream->sdw_stream = (struct sdw_stream_runtime *)sdw_stream; in rt715_set_sdw_stream()
544 dai->playback_dma_data = stream; in rt715_set_sdw_stream()
546 dai->capture_dma_data = stream; in rt715_set_sdw_stream()
566 struct snd_soc_component *component = dai->component; in rt715_pcm_hw_params()
578 return -EINVAL; in rt715_pcm_hw_params()
580 if (!rt715->slave) in rt715_pcm_hw_params()
581 return -EINVAL; in rt715_pcm_hw_params()
583 switch (dai->id) { in rt715_pcm_hw_params()
587 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa500); in rt715_pcm_hw_params()
592 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa000); in rt715_pcm_hw_params()
595 dev_err(component->dev, "Invalid DAI id %d\n", dai->id); in rt715_pcm_hw_params()
596 return -EINVAL; in rt715_pcm_hw_params()
605 port_config.ch_mask = (1 << (num_channels)) - 1; in rt715_pcm_hw_params()
608 retval = sdw_stream_add_slave(rt715->slave, &stream_config, in rt715_pcm_hw_params()
609 &port_config, 1, stream->sdw_stream); in rt715_pcm_hw_params()
611 dev_err(dai->dev, "Unable to configure port\n"); in rt715_pcm_hw_params()
617 /* bit 15 Stream Type 0:PCM 1:Non-PCM, should always be PCM */ in rt715_pcm_hw_params()
625 dev_err(component->dev, "Unsupported sample rate %d\n", in rt715_pcm_hw_params()
627 return -EINVAL; in rt715_pcm_hw_params()
632 val |= (params_channels(params) - 1); in rt715_pcm_hw_params()
634 dev_err(component->dev, "Unsupported channels %d\n", in rt715_pcm_hw_params()
636 return -EINVAL; in rt715_pcm_hw_params()
656 return -EINVAL; in rt715_pcm_hw_params()
659 regmap_write(rt715->regmap, RT715_MIC_ADC_FORMAT_H, val); in rt715_pcm_hw_params()
660 regmap_write(rt715->regmap, RT715_MIC_LINE_FORMAT_H, val); in rt715_pcm_hw_params()
661 regmap_write(rt715->regmap, RT715_MIX_ADC_FORMAT_H, val); in rt715_pcm_hw_params()
662 regmap_write(rt715->regmap, RT715_MIX_ADC2_FORMAT_H, val); in rt715_pcm_hw_params()
670 struct snd_soc_component *component = dai->component; in rt715_pcm_hw_free()
675 if (!rt715->slave) in rt715_pcm_hw_free()
676 return -EINVAL; in rt715_pcm_hw_free()
678 sdw_stream_remove_slave(rt715->slave, stream->sdw_stream); in rt715_pcm_hw_free()
695 .name = "rt715-aif1",
707 .name = "rt715-aif2",
728 int rt715_clock_config(struct device *dev) in rt715_clock_config() argument
730 struct rt715_priv *rt715 = dev_get_drvdata(dev); in rt715_clock_config()
733 clk_freq = (rt715->params.curr_dr_freq >> 1); in rt715_clock_config()
755 return -EINVAL; in rt715_clock_config()
758 regmap_write(rt715->regmap, 0xe0, value); in rt715_clock_config()
759 regmap_write(rt715->regmap, 0xf0, value); in rt715_clock_config()
764 int rt715_init(struct device *dev, struct regmap *sdw_regmap, in rt715_init() argument
770 rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL); in rt715_init()
772 return -ENOMEM; in rt715_init()
774 dev_set_drvdata(dev, rt715); in rt715_init()
775 rt715->slave = slave; in rt715_init()
776 rt715->regmap = regmap; in rt715_init()
777 rt715->sdw_regmap = sdw_regmap; in rt715_init()
783 rt715->hw_init = false; in rt715_init()
784 rt715->first_hw_init = false; in rt715_init()
786 ret = devm_snd_soc_register_component(dev, in rt715_init()
794 int rt715_io_init(struct device *dev, struct sdw_slave *slave) in rt715_io_init() argument
796 struct rt715_priv *rt715 = dev_get_drvdata(dev); in rt715_io_init()
798 if (rt715->hw_init) in rt715_io_init()
804 if (!rt715->first_hw_init) { in rt715_io_init()
806 pm_runtime_set_autosuspend_delay(&slave->dev, 3000); in rt715_io_init()
807 pm_runtime_use_autosuspend(&slave->dev); in rt715_io_init()
810 pm_runtime_set_active(&slave->dev); in rt715_io_init()
813 pm_runtime_mark_last_busy(&slave->dev); in rt715_io_init()
815 pm_runtime_enable(&slave->dev); in rt715_io_init()
818 pm_runtime_get_noresume(&slave->dev); in rt715_io_init()
821 regmap_write(rt715->regmap, RT715_SET_GAIN_LINE_ADC_H, 0xb080); in rt715_io_init()
822 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC_H, 0xb080); in rt715_io_init()
824 regmap_write(rt715->regmap, RT715_SET_GAIN_MIC_ADC_H, 0xb080); in rt715_io_init()
825 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC2_H, 0xb080); in rt715_io_init()
828 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC1, 0x20); in rt715_io_init()
829 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC2, 0x20); in rt715_io_init()
830 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC3, 0x20); in rt715_io_init()
831 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC4, 0x20); in rt715_io_init()
833 regmap_write(rt715->regmap, RT715_SET_STREAMID_LINE_ADC, 0x10); in rt715_io_init()
834 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC, 0x10); in rt715_io_init()
835 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIC_ADC, 0x10); in rt715_io_init()
836 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC2, 0x10); in rt715_io_init()
838 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT1, 0xd0); in rt715_io_init()
839 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT2, 0x11); in rt715_io_init()
840 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT3, 0xa1); in rt715_io_init()
841 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT4, 0x81); in rt715_io_init()
842 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT1, 0xd1); in rt715_io_init()
843 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT2, 0x11); in rt715_io_init()
844 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT3, 0xa1); in rt715_io_init()
845 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT4, 0x81); in rt715_io_init()
846 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT1, 0xd0); in rt715_io_init()
847 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT2, 0x11); in rt715_io_init()
848 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT3, 0xa1); in rt715_io_init()
849 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT4, 0x81); in rt715_io_init()
850 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT1, 0xd1); in rt715_io_init()
851 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT2, 0x11); in rt715_io_init()
852 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT3, 0xa1); in rt715_io_init()
853 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT4, 0x81); in rt715_io_init()
856 regmap_write(rt715->regmap, RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3); in rt715_io_init()
858 if (rt715->first_hw_init) in rt715_io_init()
859 regcache_mark_dirty(rt715->regmap); in rt715_io_init()
861 rt715->first_hw_init = true; in rt715_io_init()
864 rt715->hw_init = true; in rt715_io_init()
866 pm_runtime_mark_last_busy(&slave->dev); in rt715_io_init()
867 pm_runtime_put_autosuspend(&slave->dev); in rt715_io_init()