| /kernel/linux/linux-5.10/drivers/staging/media/ipu3/ |
| D | ipu3-tables.c | 1 // SPDX-License-Identifier: GPL-2.0
4 #include "ipu3-tables.h"
6 #define X 0 /* Don't care value */
10 /* Scale factor 32 / (32 + 0) = 1 */
12 .even = { { 0, 0, 64, 6, 0, 0, 0 } },
13 .odd = { { 0, 0, 64, 6, 0, 0, 0 } } },
15 .even = { { 0, 0, 64, 6, 0, 0, 0 } },
16 .odd = { { 0, 0, 64, 6, 0, 0, 0 } } },
17 .ptrn_arr = { { 0x3 } },
19 .hor_ds_en = 0,
[all …]
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| /kernel/linux/linux-5.10/drivers/isdn/mISDN/ |
| D | dsp_audio.c | 20 /* ulaw[unsigned char] -> signed 16-bit */
22 /* alaw[unsigned char] -> signed 16-bit */
28 /* signed 16-bit -> law */
32 /* alaw -> ulaw */
34 /* ulaw -> alaw */
43 #define AMI_MASK 0x55
51 0xFF, 0x1FF, 0x3FF, 0x7FF, 0xFFF, 0x1FFF, 0x3FFF, 0x7FFF in linear2alaw()
55 if (pcm_val >= 0) { in linear2alaw()
56 /* Sign (7th) bit = 1 */ in linear2alaw()
57 mask = AMI_MASK | 0x80; in linear2alaw()
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/netlogic/ |
| D | xlr_net.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
3 * Copyright (c) 2003-2012 Broadcom Corporation
9 #define MAC_SPACING 0x400
10 #define XGMAC_SPACING 0x400
12 /* PE-MCXMAC register and bit field definitions */
13 #define R_MAC_CONFIG_1 0x00
26 #define O_MAC_CONFIG_1__txen 0
27 #define R_MAC_CONFIG_2 0x01
35 #define O_MAC_CONFIG_2__fulld 0
36 #define R_IPG_IFG 0x02
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| /kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/ |
| D | pixfmt-srggb10-ipu3.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
12 10-bit Bayer formats
22 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
30 .. flat-table::
32 * - start + 0:
33 - B\ :sub:`0000low`
[all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/via/ |
| D | hw.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
22 #define VIA_LDVP0 0x00000001
23 #define VIA_LDVP1 0x00000002
24 #define VIA_DVP0 0x00000004
25 #define VIA_CRT 0x00000010
26 #define VIA_DVP1 0x00000020
27 #define VIA_LVDS1 0x00000040
28 #define VIA_LVDS2 0x00000080
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | wm2200.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * wm2200.h - WM2200 audio codec interface
14 #define WM2200_CLKSRC_MCLK1 0
19 #define WM2200_FLL_SRC_MCLK1 0
26 #define WM2200_SOFTWARE_RESET 0x00
27 #define WM2200_DEVICE_REVISION 0x01
28 #define WM2200_TONE_GENERATOR_1 0x0B
29 #define WM2200_CLOCKING_3 0x102
30 #define WM2200_CLOCKING_4 0x103
31 #define WM2200_FLL_CONTROL_1 0x111
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| /kernel/linux/linux-5.10/arch/mips/boot/dts/loongson/ |
| D | ls7a-pch.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
13 pic: interrupt-controller@10000000 {
14 compatible = "loongson,pch-pic-1.0";
[all …]
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| /kernel/linux/linux-5.10/arch/sh/include/mach-common/mach/ |
| D | sh2007.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 #define CS5BCR 0xff802050
6 #define CS5WCR 0xff802058
7 #define CS5PCR 0xff802070
14 #define PCMCIA_ATA 0
20 #define PCMCIA_ATTR16 7
22 #define TYPE_SRAM 0
25 /* write-read/write-write delay (0-7:0,1,2,3,4,5,6,7) */
26 #define IWW5 0
28 /* different area, read-write delay (0-7:0,1,2,3,4,5,6,7) */
[all …]
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| /kernel/linux/linux-5.10/arch/alpha/lib/ |
| D | fls.c | 1 // SPDX-License-Identifier: GPL-2.0
9 /* This is fls(x)-1, except zero is held to zero. This allows most
10 efficient input into extbl, plus it allows easy handling of fls(0)=0. */
14 0,
15 0,
29 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
30 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
31 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
32 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
33 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-davinci/ |
| D | dm646x.c | 12 #include <linux/clk-provider.h>
15 #include <linux/dma-mapping.h>
19 #include <linux/irqchip/irq-davinci-aintc.h>
21 #include <linux/platform_data/gpio-davinci.h>
32 #include <clocksource/timer-davinci.h>
39 #define DAVINCI_VPIF_BASE (0x01C12000)
42 BIT_MASK(0))
46 #define DM646X_EMAC_BASE 0x01c80000
47 #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000)
48 #define DM646X_EMAC_CNTRL_OFFSET 0x0000
[all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/icelake/ |
| D | pipeline.json | 4 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
6 "UMask": "0x1",
10 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event"
15 …R) feature to mitigate some bias in how retired instructions get sampled. Use on Fixed Counter 0.",
17 "UMask": "0x1",
27 "UMask": "0x2",
37 "UMask": "0x3",
45 …-on-Store blocking code preventing store forwarding. This includes cases when: a. preceding store …
46 "EventCode": "0x03",
47 "Counter": "0,1,2,3",
[all …]
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| /kernel/linux/linux-5.10/lib/zlib_inflate/ |
| D | inffixed.h | 1 /* inffixed.h -- table for decoding fixed codes
11 {96,7,0},{0,8,80},{0,8,16},{20,8,115},{18,7,31},{0,8,112},{0,8,48},
12 {0,9,192},{16,7,10},{0,8,96},{0,8,32},{0,9,160},{0,8,0},{0,8,128},
13 {0,8,64},{0,9,224},{16,7,6},{0,8,88},{0,8,24},{0,9,144},{19,7,59},
14 {0,8,120},{0,8,56},{0,9,208},{17,7,17},{0,8,104},{0,8,40},{0,9,176},
15 {0,8,8},{0,8,136},{0,8,72},{0,9,240},{16,7,4},{0,8,84},{0,8,20},
16 {21,8,227},{19,7,43},{0,8,116},{0,8,52},{0,9,200},{17,7,13},{0,8,100},
17 {0,8,36},{0,9,168},{0,8,4},{0,8,132},{0,8,68},{0,9,232},{16,7,8},
18 {0,8,92},{0,8,28},{0,9,152},{20,7,83},{0,8,124},{0,8,60},{0,9,216},
19 {18,7,23},{0,8,108},{0,8,44},{0,9,184},{0,8,12},{0,8,140},{0,8,76},
[all …]
|
| /kernel/linux/linux-5.10/include/drm/ |
| D | drm_dsc.h | 1 /* SPDX-License-Identifier: MIT
19 #define DSC_RANGE_BPG_OFFSET_MASK 0x3f
31 #define DSC_PPS_LSB_MASK (0xFF << 0)
32 #define DSC_PPS_BPP_HIGH_MASK (0x3 << 8)
37 #define DSC_PPS_INIT_XMIT_DELAY_HIGH_MASK (0x3 << 8)
38 #define DSC_PPS_SCALE_DEC_INT_HIGH_MASK (0xF << 8)
44 #define DSC_1_2_MAX_LINEBUF_DEPTH_VAL 0
48 * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
70 * struct drm_dsc_config - Parameters required to configure DSC
87 * Flag to indicate if RGB - YCoCg conversion is needed
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/dss/ |
| D | hdmi5_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
28 void __iomem *base = core->base; in hdmi5_core_ddc_init()
43 REG_FLD_MOD(base, HDMI_CORE_I2CM_SOFTRSTZ, 0, 0, 0); in hdmi5_core_ddc_init()
45 0, 0, 1) != 1) in hdmi5_core_ddc_init()
48 /* Standard (0) or Fast (1) Mode */ in hdmi5_core_ddc_init()
49 REG_FLD_MOD(base, HDMI_CORE_I2CM_DIV, 0, 3, 3); in hdmi5_core_ddc_init()
54 (v >> 8) & 0xff, 7, 0); in hdmi5_core_ddc_init()
56 v & 0xff, 7, 0); in hdmi5_core_ddc_init()
61 (v >> 8) & 0xff, 7, 0); in hdmi5_core_ddc_init()
[all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | hdmi5_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
30 [0] = { 7036, 0, 0, 32, 0, 7036, 0, 32, 0, 0, 7036, 32, },
32 [1] = { 7015, 0, 0, 128, 0, 7015, 0, 128, 0, 0, 7015, 128, },
34 [2] = { 7010, 0, 0, 512, 0, 7010, 0, 512, 0, 0, 7010, 512, },
36 [3] = { 8192, 0, 0, 0, 0, 8192, 0, 0, 0, 0, 8192, 0, },
41 void __iomem *base = core->base; in hdmi_core_ddc_init()
56 REG_FLD_MOD(base, HDMI_CORE_I2CM_SOFTRSTZ, 0, 0, 0); in hdmi_core_ddc_init()
58 0, 0, 1) != 1) in hdmi_core_ddc_init()
61 /* Standard (0) or Fast (1) Mode */ in hdmi_core_ddc_init()
62 REG_FLD_MOD(base, HDMI_CORE_I2CM_DIV, 0, 3, 3); in hdmi_core_ddc_init()
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/ |
| D | tables_lpphy.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 IEEE 802.11a/g LP-PHY and radio device data tables
26 #define B206X_FLAG_A 0x01 /* Flag: Init in A mode */
27 #define B206X_FLAG_G 0x02 /* Flag: Init in G mode */
30 /* { .offset = B2062_N_COMM1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
31 /* { .offset = 0x0001, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
32 /* { .offset = B2062_N_COMM2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
33 /* { .offset = B2062_N_COMM3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
34 …{ .offset = B2062_N_COMM4, .value_a = 0x0001, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLA…
35 /* { .offset = B2062_N_COMM5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
[all …]
|
| /kernel/linux/linux-5.10/drivers/scsi/qla4xxx/ |
| D | ql4_nx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2013 QLogic Corporation
13 #define PHAN_INITIALIZE_FAILED 0xffff
14 #define PHAN_INITIALIZE_COMPLETE 0xff01
16 /* Host writes the following to notify that it has done the init-handshake */
17 #define PHAN_INITIALIZE_ACK 0xf00f
18 #define PHAN_PEG_RCV_INITIALIZED 0xff01
21 #define QLA82XX_CRB_BASE (QLA82XX_CAM_RAM(0x200))
23 #define CRB_CMDPEG_STATE QLA82XX_REG(0x50)
24 #define CRB_RCVPEG_STATE QLA82XX_REG(0x13c)
[all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/sandybridge/ |
| D | pipeline.json | 5 "UMask": "0x3",
12 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
13 "Counter": "Fixed counter 0",
14 "UMask": "0x1",
18 "CounterHTOff": "Fixed counter 0"
23 "UMask": "0x2",
31 "UMask": "0x2",
39 "EventCode": "0x03",
40 "Counter": "0,1,2,3",
41 "UMask": "0x1",
[all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/jaketown/ |
| D | pipeline.json | 3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
5 "UMask": "0x1",
14 "UMask": "0x2",
23 "UMask": "0x3",
30 "EventCode": "0x88",
31 "Counter": "0,1,2,3",
32 "UMask": "0x41",
35 "BriefDescription": "Not taken macro-conditional branches.",
36 "CounterHTOff": "0,1,2,3,4,5,6,7"
39 "EventCode": "0x88",
[all …]
|
| /kernel/linux/linux-5.10/include/linux/mfd/da9062/ |
| D | registers.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2015-2017 Dialog Semiconductor
9 #define DA9062_PMIC_DEVICE_ID 0x62
10 #define DA9062_PMIC_VARIANT_MRC_AA 0x01
11 #define DA9062_PMIC_VARIANT_VRC_DA9061 0x01
12 #define DA9062_PMIC_VARIANT_VRC_DA9062 0x02
20 #define DA9062AA_PAGE_CON 0x000
21 #define DA9062AA_STATUS_A 0x001
22 #define DA9062AA_STATUS_B 0x002
23 #define DA9062AA_STATUS_D 0x004
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/include/asm/hardware/ |
| D | entry-macro-iomd.S | 2 * arch/arm/include/asm/hardware/entry-macro-iomd.S
4 * Low-level IRQ helper macros for IOC/IOMD based platforms
17 teq \irqstat, #0
21 teqeq \irqstat, #0
26 teqeq \irqstat, #0
30 teqeq \irqstat, #0
35 teqeq \irqstat, #0
45 irq_prio_h: .byte 0, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10
62 irq_prio_d: .byte 0,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
79 irq_prio_l: .byte 0, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3
[all …]
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| /kernel/linux/linux-5.10/Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
25 5.2.1 Parity checking and packet re-synchronization
33 7. Hardware version 4
69 (TouchPadOff=0) will also disable the buttons associated with the touchpad.
99 By echoing "0" to this file all debugging will be turned OFF.
113 By echoing "0" to this file parity checking will be turned OFF. Any
114 non-zero value will turn it ON. For hardware version 1 the default is ON.
128 Sets crc_enabled to 0/1. The name "crc_enabled" is the official name of
138 "0" or "1" to this file will set the state to "0" or "1".
143 To detect the hardware version, read the version number as param[0].param[1].param[2]::
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ivytown/ |
| D | pipeline.json | 3 "Counter": "Fixed counter 0",
4 "UMask": "0x1",
8 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
38 "EventCode": "0x03",
39 "Counter": "0,1,2,3",
40 "UMask": "0x2",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ivybridge/ |
| D | pipeline.json | 3 "Counter": "Fixed counter 0",
4 "UMask": "0x1",
8 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
38 "EventCode": "0x03",
39 "Counter": "0,1,2,3",
40 "UMask": "0x2",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | pipeline.json | 3 "UMask": "0x1",
5 "Counter": "Fixed counter 0",
7 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
9 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
39 "EventCode": "0x03",
40 "UMask": "0x2",
41 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
|