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/kernel/linux/linux-5.10/drivers/soc/atmel/
Dsoc.h35 #define AT91RM9200_CIDR_MATCH 0x09290780
37 #define AT91SAM9260_CIDR_MATCH 0x019803a0
38 #define AT91SAM9261_CIDR_MATCH 0x019703a0
39 #define AT91SAM9263_CIDR_MATCH 0x019607a0
40 #define AT91SAM9G20_CIDR_MATCH 0x019905a0
41 #define AT91SAM9RL64_CIDR_MATCH 0x019b03a0
42 #define AT91SAM9G45_CIDR_MATCH 0x019b05a0
43 #define AT91SAM9X5_CIDR_MATCH 0x019a05a0
44 #define AT91SAM9N12_CIDR_MATCH 0x019a07a0
45 #define SAM9X60_CIDR_MATCH 0x019b35a0
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/
Dqoriq-thermal.yaml16 Register (IPBRR0) at offset 0x0BF8.
20 0x01900102 T1040
78 reg = <0xf0000 0x1000>;
79 interrupts = <18 2 0 0>;
80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81 fsl,tmu-calibration = <0x00000000 0x00000025>,
82 <0x00000001 0x00000028>,
83 <0x00000002 0x0000002d>,
84 <0x00000003 0x00000031>,
85 <0x00000004 0x00000036>,
[all …]
/kernel/linux/linux-5.10/drivers/ata/
Dahci_sunxi.c26 module_param(enable_pmp, bool, 0);
30 #define AHCI_BISTAFR 0x00a0
31 #define AHCI_BISTCR 0x00a4
32 #define AHCI_BISTFCTR 0x00a8
33 #define AHCI_BISTSR 0x00ac
34 #define AHCI_BISTDECR 0x00b0
35 #define AHCI_DIAGNR0 0x00b4
36 #define AHCI_DIAGNR1 0x00b8
37 #define AHCI_OOBR 0x00bc
38 #define AHCI_PHYCS0R 0x00c0
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dvega10_enum.h51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 NO_FORCE_REQUEST = 0x00000000,
185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001,
186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002,
187 FORCE_SHUT_DOWN_REQUEST = 0x00000003,
195 NO_FORCE_REQ = 0x00000000,
196 FORCE_LIGHT_SLEEP_REQ = 0x00000001,
204 ENABLE_MEM_PWR_CTRL = 0x00000000,
205 DISABLE_MEM_PWR_CTRL = 0x00000001,
213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000,
[all …]
Dnavi10_enum.h51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 GATCL1_TYPE_NORMAL = 0x00000000,
185 GATCL1_TYPE_SHOOTDOWN = 0x00000001,
186 GATCL1_TYPE_BYPASS = 0x00000002,
194 UTCL1_TYPE_NORMAL = 0x00000000,
195 UTCL1_TYPE_SHOOTDOWN = 0x00000001,
196 UTCL1_TYPE_BYPASS = 0x00000002,
204 UTCL1_XNACK_SUCCESS = 0x00000000,
205 UTCL1_XNACK_RETRY = 0x00000001,
206 UTCL1_XNACK_PRT = 0x00000002,
[all …]
/kernel/linux/linux-5.10/drivers/s390/scsi/
Dzfcp_fsf.h17 #define FSF_QTCB_CURRENT_VERSION 0x00000001
20 #define FSF_QTCB_FCP_CMND 0x00000001
21 #define FSF_QTCB_ABORT_FCP_CMND 0x00000002
22 #define FSF_QTCB_OPEN_PORT_WITH_DID 0x00000005
23 #define FSF_QTCB_OPEN_LUN 0x00000006
24 #define FSF_QTCB_CLOSE_LUN 0x00000007
25 #define FSF_QTCB_CLOSE_PORT 0x00000008
26 #define FSF_QTCB_CLOSE_PHYSICAL_PORT 0x00000009
27 #define FSF_QTCB_SEND_ELS 0x0000000B
28 #define FSF_QTCB_SEND_GENERIC 0x0000000C
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/
Dar9462_2p0_initvals.h33 {0x00001030, 0x00000268, 0x000004d0},
34 {0x00001070, 0x0000018c, 0x00000318},
35 {0x000010b0, 0x00000fd0, 0x00001fa0},
36 {0x00008014, 0x044c044c, 0x08980898},
37 {0x0000801c, 0x148ec02b, 0x148ec057},
38 {0x00008318, 0x000044c0, 0x00008980},
39 {0x00009e00, 0x0372131c, 0x0372131c},
40 {0x0000a230, 0x0000400b, 0x00004016},
41 {0x0000a254, 0x00000898, 0x00001130},
46 {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
[all …]
Dar9001_initvals.h19 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
20 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
21 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
22 {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000},
23 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
24 {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab},
25 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
26 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
27 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300},
28 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
[all …]
Dar5008_initvals.h19 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
20 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
21 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
22 {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000},
23 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
24 {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab},
25 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
26 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
27 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300},
28 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/carl9170/
Dphy.c48 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE_MAX, 0x7f); in carl9170_init_power_cal()
49 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE1, 0x3f3f3f3f); in carl9170_init_power_cal()
50 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE2, 0x3f3f3f3f); in carl9170_init_power_cal()
51 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE3, 0x3f3f3f3f); in carl9170_init_power_cal()
52 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE4, 0x3f3f3f3f); in carl9170_init_power_cal()
53 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE5, 0x3f3f3f3f); in carl9170_init_power_cal()
54 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE6, 0x3f3f3f3f); in carl9170_init_power_cal()
55 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE7, 0x3f3f3f3f); in carl9170_init_power_cal()
56 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE8, 0x3f3f3f3f); in carl9170_init_power_cal()
57 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE9, 0x3f3f3f3f); in carl9170_init_power_cal()
[all …]
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
Dethtool.h36 ep->speed = (__u16)(speed & 0xFFFF); in ethtool_cmd_speed_set()
73 #define PFC_STORM_PREVENTION_AUTO 0xffff
74 #define PFC_STORM_PREVENTION_DISABLE 0
100 void *data[0];
102 #define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff
103 #define DOWNSHIFT_DEV_DISABLE 0
114 __u8 data[0];
121 __u8 data[0];
195 ETH_SS_TEST = 0,
209 __u8 data[0];
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath5k/
Dinitvals.c32 * @ini_mode: 0 to write 1 to read (and clear)
39 AR5K_INI_WRITE = 0, /* Default */
57 { AR5K_NOQCU_TXDP0, 0 },
58 { AR5K_NOQCU_TXDP1, 0 },
59 { AR5K_RXDP, 0 },
60 { AR5K_CR, 0 },
61 { AR5K_ISR, 0, AR5K_INI_READ },
62 { AR5K_IMR, 0 },
64 { AR5K_BSR, 0, AR5K_INI_READ },
70 { AR5K_RPGTO, 0 },
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
Dtable.c7 0x01c, 0x07000000,
8 0x800, 0x00040000,
9 0x804, 0x00008003,
10 0x808, 0x0000fc00,
11 0x80c, 0x0000000a,
12 0x810, 0x10005088,
13 0x814, 0x020c3d10,
14 0x818, 0x00200185,
15 0x81c, 0x00000000,
16 0x820, 0x01000000,
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls1012a.dtsi31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
37 clocks = <&clockgen 1 0>;
53 arm,psci-suspend-param = <0x0>;
62 #clock-cells = <0>;
69 #clock-cells = <0>;
84 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
91 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
92 <0x0 0x1402000 0 0x2000>, /* GICC */
[all …]
Dfsl-ls1046a.dtsi36 #size-cells = <0>;
38 cpu0: cpu@0 {
41 reg = <0x0>;
42 clocks = <&clockgen 1 0>;
51 reg = <0x1>;
52 clocks = <&clockgen 1 0>;
61 reg = <0x2>;
62 clocks = <&clockgen 1 0>;
71 reg = <0x3>;
72 clocks = <&clockgen 1 0>;
[all …]
Dfsl-ls1043a.dtsi35 #size-cells = <0>;
43 cpu0: cpu@0 {
46 reg = <0x0>;
47 clocks = <&clockgen 1 0>;
56 reg = <0x1>;
57 clocks = <&clockgen 1 0>;
66 reg = <0x2>;
67 clocks = <&clockgen 1 0>;
76 reg = <0x3>;
77 clocks = <&clockgen 1 0>;
[all …]
Dfsl-ls208xa.dtsi32 #size-cells = <0>;
37 reg = <0x00000000 0x80000000 0 0x80000000>;
43 #clock-cells = <0>;
50 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
51 <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
52 <0x0 0x0c0c0000 0 0x2000>, /* GICC */
53 <0x0 0x0c0d0000 0 0x1000>, /* GICH */
54 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
60 interrupts = <1 9 0x4>;
65 reg = <0x0 0x6020000 0 0x20000>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dtegra20-paz00.dts24 memory@0 {
25 reg = <0x00000000 0x20000000>;
51 pinctrl-0 = <&state_default>;
287 reg = <0x1e>;
300 reg = <0x7000c500 0x100>;
303 #size-cells = <0>;
317 emc-tables@0 {
318 nvidia,ram-code = <0x0>;
320 #size-cells = <0>;
326 nvidia,emc-registers = <0x0000000a 0x00000016
[all …]
Dtegra124-nyan-blaze-emc.dtsi78 nvidia,emc-auto-cal-config = <0xa1430000>;
79 nvidia,emc-auto-cal-config2 = <0x00000000>;
80 nvidia,emc-auto-cal-config3 = <0x00000000>;
81 nvidia,emc-auto-cal-interval = <0x001fffff>;
82 nvidia,emc-bgbias-ctl0 = <0x00000008>;
83 nvidia,emc-cfg = <0x73240000>;
84 nvidia,emc-cfg-2 = <0x000008c5>;
85 nvidia,emc-ctt-term-ctrl = <0x00000802>;
86 nvidia,emc-mode-1 = <0x80100003>;
87 nvidia,emc-mode-2 = <0x80200008>;
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dnv50.c36 case 0x50: /* it exists, but only has bit 31, not the dividers.. */ in read_div()
37 case 0x84: in read_div()
38 case 0x86: in read_div()
39 case 0x98: in read_div()
40 case 0xa0: in read_div()
41 return nvkm_rd32(device, 0x004700); in read_div()
42 case 0x92: in read_div()
43 case 0x94: in read_div()
44 case 0x96: in read_div()
45 return nvkm_rd32(device, 0x004800); in read_div()
[all …]
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
Dethtool.h74 #define PFC_STORM_PREVENTION_AUTO 0xffff
75 #define PFC_STORM_PREVENTION_DISABLE 0
100 void * data[0];
102 #define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff
103 #define DOWNSHIFT_DEV_DISABLE 0
104 #define ETHTOOL_PHY_FAST_LINK_DOWN_ON 0
105 #define ETHTOOL_PHY_FAST_LINK_DOWN_OFF 0xff
106 #define ETHTOOL_PHY_EDPD_DFLT_TX_MSECS 0xffff
107 #define ETHTOOL_PHY_EDPD_NO_TX 0xfffe
108 #define ETHTOOL_PHY_EDPD_DISABLE 0
[all …]
/kernel/linux/linux-5.10/drivers/scsi/lpfc/
Dlpfc_debugfs.h62 #define LPFC_PCI_CFG_BROWSE 0xffff
68 #define IDIAG_PCICFG_WHERE_INDX 0
73 #define LPFC_PCI_BAR_BROWSE 0xffff
90 #define IDIAG_BARACC_BAR_NUM_INDX 0
96 #define IDIAG_BARACC_BAR_0 0
106 #define LPFC_QUE_ACC_BROWSE 0xffff
118 #define IDIAG_QUEACC_QUETP_INDX 0
126 #define LPFC_DRB_ACC_ALL 0xffff
139 #define IDIAG_DRBACC_REGID_INDX 0
143 #define LPFC_CTL_ACC_ALL 0xffff
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dt1040si-post.dtsi39 alloc-ranges = <0 0 0x10000 0>;
44 alloc-ranges = <0 0 0x10000 0>;
49 alloc-ranges = <0 0 0x10000 0>;
56 interrupts = <25 2 0 0>;
64 bus-range = <0x0 0xff>;
65 interrupts = <20 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
73 interrupts = <20 2 0 0>;
74 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
/kernel/linux/linux-5.10/tools/arch/x86/include/asm/
Dmsr-index.h15 #define MSR_EFER 0xc0000080 /* extended feature register */
16 #define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */
17 #define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */
18 #define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */
19 #define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */
20 #define MSR_FS_BASE 0xc0000100 /* 64bit FS base */
21 #define MSR_GS_BASE 0xc0000101 /* 64bit GS base */
22 #define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */
23 #define MSR_TSC_AUX 0xc0000103 /* Auxiliary TSC */
26 #define _EFER_SCE 0 /* SYSCALL/SYSRET */
[all …]
/kernel/linux/linux-5.10/arch/x86/include/asm/
Dmsr-index.h15 #define MSR_EFER 0xc0000080 /* extended feature register */
16 #define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */
17 #define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */
18 #define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */
19 #define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */
20 #define MSR_FS_BASE 0xc0000100 /* 64bit FS base */
21 #define MSR_GS_BASE 0xc0000101 /* 64bit GS base */
22 #define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */
23 #define MSR_TSC_AUX 0xc0000103 /* Auxiliary TSC */
26 #define _EFER_SCE 0 /* SYSCALL/SYSRET */
[all …]

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