| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | mii.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 3 * linux/mii.h: definitions for MII-compatible transceivers 23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */ 24 #define MII_STAT1000 0x0a /* 1000BASE-T status */ 30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ 42 #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ 51 #define BMCR_RESET 0x8000 /* Reset to default state */ 55 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */ 58 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ 60 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ [all …]
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| D | mdio.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 * Copyright 2006-2009 Solarflare Communications Inc. 25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */ 45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */ 46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */ 57 /* Media-dependent registers. */ 58 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ 59 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ 60 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. 61 * Lanes B-D are numbered 134-136. */ [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | ti,dp83869.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 4 --- 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - $ref: "ethernet-phy.yaml#" 14 - Dan Murphy <dmurphy@ti.com> 17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver 18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and 19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and 20 100BASE-FX Fiber protocols. 21 This device interfaces to the MAC layer through Reduced GMII (RGMII) and [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| D | i915_utils.h | 4 * Permission is hereby granted, free of charge, to any person obtaining a 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 37 #define FDO_BUG_URL "https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs" 40 /* Many gcc seem to no see through this and fall over :( */ 42 #define WARN_ON(x) ({ \ 43 bool __i915_warn_cond = (x); \ [all …]
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| /kernel/linux/linux-5.10/drivers/cpufreq/ |
| D | armada-37xx-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0+ 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 26 #include "cpufreq-dt.h" 66 #define ARMADA_37XX_AVS_VSET(x) (0x1C + 4 * (x)) argument 75 #define MIN_VOLT_MV 1000 107 * unstable because we do not know how to configure it properly. 109 /* {.cpu_freq_max = 1200*1000*1000, .divider = {1, 2, 4, 6} }, */ 110 {.cpu_freq_max = 1000*1000*1000, .divider = {1, 2, 4, 5} }, 111 {.cpu_freq_max = 800*1000*1000, .divider = {1, 2, 3, 4} }, 112 {.cpu_freq_max = 600*1000*1000, .divider = {2, 4, 5, 6} }, [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/arm/display/komeda/ |
| D | komeda_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0 29 for_each_new_connector_in_state(crtc_st->state, conn, conn_st, i) { in komeda_crtc_get_color_config() 30 if (conn_st->crtc != crtc_st->crtc) in komeda_crtc_get_color_config() 33 conn_bpc = conn->display_info.bpc ? conn->display_info.bpc : 8; in komeda_crtc_get_color_config() 34 conn_color_formats &= conn->display_info.color_formats; in komeda_crtc_get_color_config() 40 /* connector doesn't config any color_format, use RGB444 as default */ in komeda_crtc_get_color_config() 52 if (!kcrtc_st->base.active) { in komeda_crtc_update_clock_ratio() 53 kcrtc_st->clock_ratio = 0; in komeda_crtc_update_clock_ratio() 57 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; in komeda_crtc_update_clock_ratio() 60 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); in komeda_crtc_update_clock_ratio() [all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | mii.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * linux/mii.h: definitions for MII-compatible transceivers 53 return (struct mii_ioctl_data *) &rq->ifr_ifru; in if_mii() 65 * The one exception to IEEE 802.3u is that 100baseT4 is placed 66 * between 100T-full and 100T-half. If your phy does not support 68 * priority order, you will need to roll your own function. 90 * @duplex_lock: Non-zero if duplex is locked at full 112 * settings to phy autonegotiation advertisements for the 140 * settings to phy autonegotiation advertisements for the 168 * to ethtool advertisement settings. [all …]
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| /kernel/linux/linux-5.10/drivers/ide/ |
| D | qd65xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 1996-2001 Linus Torvalds & author (see below) 7 * Version 0.03 Cleaned auto-tune, added probe 15 * To activate controller support, use "ide0=qd65xx" 20 * Samuel Thibault <samuel.thibault@ens-lyon.org> 40 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580) 41 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580) 42 * -- qd6500 is a single IDE interface 43 * -- qd6580 is a dual IDE interface 51 * base: Timer1 [all …]
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| /kernel/linux/linux-5.10/drivers/memory/ |
| D | omap-gpmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2005-2006 Nokia Corporation 10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> 30 #include <linux/omap-gpmc.h> 34 #include <linux/platform_data/mtd-nand-omap2.h> 36 #define DEVICE_NAME "omap-gpmc" 94 * The first 1MB of GPMC address space is typically mapped to 95 * the internal ROM. Never allocate the first page, to 96 * facilitate bug detection; even if we didn't boot from ROM. 203 /* Structure to save gpmc cs context */ [all …]
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| /kernel/linux/linux-5.10/drivers/net/phy/ |
| D | sfp-bus.c | 1 // SPDX-License-Identifier: GPL-2.0-only 20 * struct sfp_bus - internal representation of a sfp bus 50 /* Ubiquiti U-Fiber Instant module claims that support all transceiver in sfp_quirk_ubnt_uf_instant() 52 * modes and set only one mode which module supports: 1000baseX_Full. in sfp_quirk_ubnt_uf_instant() 55 phylink_set(modes, 1000baseX_Full); in sfp_quirk_ubnt_uf_instant() 60 // Alcatel Lucent G-010S-P can operate at 2500base-X, but 66 // Alcatel Lucent G-010S-A can operate at 2500base-X, but 72 // Huawei MA5671A can operate at 2500base-X, but report 1.2GBd 79 .part = "UF-INSTANT", 111 vs = sfp_strlen(id->base.vendor_name, ARRAY_SIZE(id->base.vendor_name)); in sfp_lookup_quirk() [all …]
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| /kernel/linux/linux-5.10/arch/mips/alchemy/common/ |
| D | usb.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * area. Au1550 has OHCI on different base address. No need to handle 8 * Au1200: one register to control access and clocks to O/EHCI, UDC and OTG 20 #include <asm/mach-au1x00/au1000.h> 28 #define USBHEN_RD (1 << 4) /* OHCI reset-done indicator */ 32 #define USBHEN_BE (1 << 0) /* OHCI Big-Endian */ 43 #define USBCFG_FLA(x) (((x) & 0x3f) << 8) argument 74 #define USB_DWC_CTRL1_OTGD 0x04 /* set to DISable OTG */ 75 #define USB_DWC_CTRL1_HSTRS 0x02 /* set to ENable EHCI */ 76 #define USB_DWC_CTRL1_DCRS 0x01 /* set to ENable UDC */ [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | ramgt215.c | 4 * Permission is hereby granted, free of charge, to any person obtaining a 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 #define gt215_ram(p) container_of((p), struct gt215_ram, base) 39 struct ramfuc base; member 94 struct nvkm_ram base; member 120 hi--; in gt215_link_train_calc() [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/oki-semi/pch_gbe/ |
| D | pch_gbe_phy.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 1999 - 2010 Intel Corporation. 12 #define PHY_MAX_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ 14 /* PHY 1000 MII Register/Bit Definitions */ 21 #define PHY_LP_ABILITY 0x05 /* Link Partner Ability (Base Page) */ 25 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Register */ 26 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Register */ 34 #define MII_CR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */ 41 #define MII_CR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */ 59 #define MII_SR_10T_HD_CAPS 0x0800 /* 10T Half Duplex Capable */ [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gem/selftests/ |
| D | i915_gem_object_blt.c | 1 // SPDX-License-Identifier: MIT 29 struct drm_i915_private *i915 = to_i915(obj->base.dev); in __perf_fill_blt() 34 ktime_t t[5]; in __perf_fill_blt() local 45 for (pass = 0; pass < ARRAY_SIZE(t); pass++) { in __perf_fill_blt() 46 struct intel_context *ce = engine->kernel_context; in __perf_fill_blt() 62 t[pass] = ktime_sub(t1, t0); in __perf_fill_blt() 68 sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL); in __perf_fill_blt() 70 engine->name, in __perf_fill_blt() 71 obj->base.size >> 10, in __perf_fill_blt() 72 div64_u64(mul_u32_u32(4 * obj->base.size, in __perf_fill_blt() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/ |
| D | dsi_pll_14nm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <linux/clk-provider.h> 13 * DSI PLL 14nm - clock diagram (eg: DSI0): 18 * +----+ | +----+ 19 * dsi0vco_clk ---| n1 |--o--| /8 |-- dsi0pllbyte 20 * +----+ | +----+ 22 * | +----+ | 23 * o---| /2 |--o--|\ 24 * | +----+ | \ +----+ 25 * | | |--| n2 |-- dsi0pll [all …]
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| /kernel/linux/linux-5.10/arch/mips/cavium-octeon/executive/ |
| D | cvmx-helper-sgmii.c | 7 * Copyright (C) 2003-2018 Cavium, Inc. 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 20 * along with this file; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 35 #include <asm/octeon/cvmx-config.h> 37 #include <asm/octeon/cvmx-helper.h> 38 #include <asm/octeon/cvmx-helper-board.h> 40 #include <asm/octeon/cvmx-gmxx-defs.h> 41 #include <asm/octeon/cvmx-pcsx-defs.h> 42 #include <asm/octeon/cvmx-pcsxx-defs.h> [all …]
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| /kernel/linux/linux-5.10/drivers/leds/ |
| D | leds-lm3533.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * leds-lm3533.c -- LM3533 LED driver 5 * Copyright (C) 2011-2012 Texas Instruments 61 return led->id + 2; in lm3533_led_get_ctrlbank_id() 64 static inline u8 lm3533_led_get_lv_reg(struct lm3533_led *led, u8 base) in lm3533_led_get_lv_reg() argument 66 return base + led->id; in lm3533_led_get_lv_reg() 71 return led->id; in lm3533_led_get_pattern() 75 u8 base) in lm3533_led_get_pattern_reg() argument 77 return base + lm3533_led_get_pattern(led) * LM3533_REG_PATTERN_STEP; in lm3533_led_get_pattern_reg() 88 dev_dbg(led->cdev.dev, "%s - %d\n", __func__, enable); in lm3533_led_pattern_enable() [all …]
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| /kernel/linux/linux-5.10/net/ethtool/ |
| D | linkmodes.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 struct ethnl_req_info base; member 12 struct ethnl_reply_data base; member 19 container_of(__reply_base, struct linkmodes_reply_data, base) 31 struct net_device *dev = reply_base->dev; in linkmodes_prepare_data() 34 data->lsettings = &data->ksettings.base; in linkmodes_prepare_data() 40 ret = __ethtool_get_link_ksettings(dev, &data->ksettings); in linkmodes_prepare_data() 42 GENL_SET_ERR_MSG(info, "failed to retrieve link settings"); in linkmodes_prepare_data() 46 data->peer_empty = in linkmodes_prepare_data() 47 bitmap_empty(data->ksettings.link_modes.lp_advertising, in linkmodes_prepare_data() [all …]
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| D | common.c | 1 // SPDX-License-Identifier: GPL-2.0-only 11 [NETIF_F_SG_BIT] = "tx-scatter-gather", 12 [NETIF_F_IP_CSUM_BIT] = "tx-checksum-ipv4", 13 [NETIF_F_HW_CSUM_BIT] = "tx-checksum-ip-generic", 14 [NETIF_F_IPV6_CSUM_BIT] = "tx-checksum-ipv6", 16 [NETIF_F_FRAGLIST_BIT] = "tx-scatter-gather-fraglist", 17 [NETIF_F_HW_VLAN_CTAG_TX_BIT] = "tx-vlan-hw-insert", 19 [NETIF_F_HW_VLAN_CTAG_RX_BIT] = "rx-vlan-hw-parse", 20 [NETIF_F_HW_VLAN_CTAG_FILTER_BIT] = "rx-vlan-filter", 21 [NETIF_F_HW_VLAN_STAG_TX_BIT] = "tx-vlan-stag-hw-insert", [all …]
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| /kernel/linux/linux-5.10/drivers/i2c/busses/ |
| D | i2c-highlander.c | 1 // SPDX-License-Identifier: GPL-2.0 42 void __iomem *base; member 52 static int iic_timeout = 1000, iic_read_delay; 56 iowrite16(ioread16(dev->base + SMCR) | SMCR_IEIC, dev->base + SMCR); in highlander_i2c_irq_enable() 61 iowrite16(ioread16(dev->base + SMCR) & ~SMCR_IEIC, dev->base + SMCR); in highlander_i2c_irq_disable() 66 iowrite16(ioread16(dev->base + SMCR) | SMCR_START, dev->base + SMCR); in highlander_i2c_start() 71 iowrite16(ioread16(dev->base + SMCR) | SMCR_IRIC, dev->base + SMCR); in highlander_i2c_done() 78 smmr = ioread16(dev->base + SMMR); in highlander_i2c_setup() 86 iowrite16(smmr, dev->base + SMMR); in highlander_i2c_setup() 91 for (; len > 1; len -= 2) { in smbus_write_data() [all …]
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| D | i2c-mt7621.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * drivers/i2c/busses/i2c-mt7621.c 9 * Improve driver for i2cdetect from i2c-tools to detect i2c devices on the bus. 47 #define SM0CTL1_PGLEN(x) ((((x) - 1) << 8) & SM0CTL1_PGLEN_MASK) argument 56 /* timeout waiting for I2C devices to respond */ 57 #define TIMEOUT_MS 1000 60 void __iomem *base; member 74 ret = readl_relaxed_poll_timeout(i2c->base + REG_SM0CTL1_REG, in mtk_i2c_wait_idle() 76 10, TIMEOUT_MS * 1000); in mtk_i2c_wait_idle() 78 dev_dbg(i2c->dev, "idle err(%d)\n", ret); in mtk_i2c_wait_idle() [all …]
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| /kernel/linux/linux-5.10/drivers/regulator/ |
| D | twl-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips 26 * These chips are often used in OMAP-based systems. 28 * This driver implements software-based resource control for various 35 u8 base; member 40 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */ 58 /* LDO control registers ... offset is from the base of its register bank. 59 * The first three registers of all power resource banks help hardware to 82 &value, info->base + offset); in twlreg_read() 91 value, info->base + offset); in twlreg_write() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 5 * Permission is hereby granted, free of charge, to any person obtaining a 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 482 * macros to expend register list macro defined in HW object header file */ 489 #define BASE(seg) BASE_INNER(seg) macro 492 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 496 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ [all …]
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| /kernel/linux/linux-5.10/drivers/spi/ |
| D | spi-omap-100k.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 41 #define SPI_SETUP1_CLOCK_DIVISOR(x) ((x) << 1) argument 51 #define SPI_CTRL_SEN(x) ((x) << 7) argument 52 #define SPI_CTRL_WORD_SIZE(x) (((x) - 1) << 2) argument 71 /* Virtual base address of the controller */ 72 void __iomem *base; member 76 void __iomem *base; member 86 val = readw(spi100k->base + SPI_SETUP1); in spi100k_enable_clock() 88 writew(val, spi100k->base + SPI_SETUP1); in spi100k_enable_clock() 97 val = readw(spi100k->base + SPI_SETUP1); in spi100k_disable_clock() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | rs690.c | 6 * Permission is hereby granted, free of charge, to any person obtaining a 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 42 for (i = 0; i < rdev->usec_timeout; i++) { in rs690_mc_wait_for_idle() 49 return -1; in rs690_mc_wait_for_idle() 57 pr_warn("Failed to wait MC idle while programming pipes. Bad things might happen.\n"); in rs690_gpu_init() 74 if (atom_parse_data_header(rdev->mode_info.atom_context, index, NULL, in rs690_pm_info() [all …]
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