Home
last modified time | relevance | path

Searched +full:100 +full:base +full:- +full:tx (Results 1 – 25 of 680) sorted by relevance

12345678910>>...28

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dti,dp83869.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-phy.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
[all …]
Dti,dp83867.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-controller.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX
19 and 1000BASE-T Ethernet protocols.
21 The DP83867 is designed for easy implementation of 10/100/1000 Mbps Ethernet
34 ti,min-output-impedance:
40 ti,max-output-impedance:
[all …]
Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
16 local-mac-address:
19 $ref: /schemas/types.yaml#definitions/uint8-array
21 - minItems: 6
24 mac-address:
29 local-mac-address property.
[all …]
Dti,dp83822.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Dan Murphy <dmurphy@ti.com>
14 The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It
16 data over standard, twisted-pair cables or to connect to an external,
17 fiber-optic transceiver. Additionally, the DP83822 provides flexibility to
24 - $ref: "ethernet-phy.yaml#"
30 ti,link-loss-low:
39 ti,fiber-mode:
[all …]
/kernel/linux/linux-5.10/include/uapi/linux/
Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
57 /* Media-dependent registers. */
58 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
59 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
60 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
61 * Lanes B-D are numbered 134-136. */
[all …]
/kernel/linux/linux-5.10/net/ethtool/
Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
11 [NETIF_F_SG_BIT] = "tx-scatter-gather",
12 [NETIF_F_IP_CSUM_BIT] = "tx-checksum-ipv4",
13 [NETIF_F_HW_CSUM_BIT] = "tx-checksum-ip-generic",
14 [NETIF_F_IPV6_CSUM_BIT] = "tx-checksum-ipv6",
16 [NETIF_F_FRAGLIST_BIT] = "tx-scatter-gather-fraglist",
17 [NETIF_F_HW_VLAN_CTAG_TX_BIT] = "tx-vlan-hw-insert",
19 [NETIF_F_HW_VLAN_CTAG_RX_BIT] = "rx-vlan-hw-parse",
20 [NETIF_F_HW_VLAN_CTAG_FILTER_BIT] = "rx-vlan-filter",
21 [NETIF_F_HW_VLAN_STAG_TX_BIT] = "tx-vlan-stag-hw-insert",
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/atheros/atlx/
Datlx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
6 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
25 #define SPEED_100 100
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/dec/tulip/
Dde4x5.h16 #define DE4X5_BMR iobase+(0x000 << lp->bus) /* Bus Mode Register */
17 #define DE4X5_TPD iobase+(0x008 << lp->bus) /* Transmit Poll Demand Reg */
18 #define DE4X5_RPD iobase+(0x010 << lp->bus) /* Receive Poll Demand Reg */
19 #define DE4X5_RRBA iobase+(0x018 << lp->bus) /* RX Ring Base Address Reg */
20 #define DE4X5_TRBA iobase+(0x020 << lp->bus) /* TX Ring Base Address Reg */
21 #define DE4X5_STS iobase+(0x028 << lp->bus) /* Status Register */
22 #define DE4X5_OMR iobase+(0x030 << lp->bus) /* Operation Mode Register */
23 #define DE4X5_IMR iobase+(0x038 << lp->bus) /* Interrupt Mask Register */
24 #define DE4X5_MFC iobase+(0x040 << lp->bus) /* Missed Frame Counter */
25 #define DE4X5_APROM iobase+(0x048 << lp->bus) /* Ethernet Address PROM */
[all …]
/kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/3com/
Dvortex.rst1 .. SPDX-License-Identifier: GPL-2.0
20 - Andrew Morton
21 - Netdev mailing list <netdev@vger.kernel.org>
22 - Linux kernel mailing list <linux-kernel@vger.kernel.org>
28 Since kernel 2.3.99-pre6, this driver incorporates the support for the
29 3c575-series Cardbus cards which used to be handled by 3c575_cb.c.
33 - 3c590 Vortex 10Mbps
34 - 3c592 EISA 10Mbps Demon/Vortex
35 - 3c597 EISA Fast Demon/Vortex
36 - 3c595 Vortex 100baseTx
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/oki-semi/pch_gbe/
Dpch_gbe_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
12 #define PHY_MAX_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
21 #define PHY_LP_ABILITY 0x05 /* Link Partner Ability (Base Page) */
23 #define PHY_NEXT_PAGE_TX 0x07 /* Next Page TX */
25 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Register */
26 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Register */
34 #define MII_CR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */
41 #define MII_CR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */
57 #define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/e1000/
De1000_hw.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
131 e1000_igp_cable_length_100 = 100,
425 /* MAC decode size is 128K - This is the size of BAR0 */
436 #define SPEED_100 100
446 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
489 * E1000_RAR_ENTRIES - 1 multicast addresses.
506 /* Receive Descriptor - Extended */
532 /* Receive Descriptor - Packet Split */
556 __le16 length[3]; /* length of buffers 1-3 */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/dlink/
Dsundance.c3 Written 1999-2000 by Donald Becker.
19 [link no longer provides useful info -jgarzik]
27 /* The user-configurable values.
30 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
34 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
37 need a copy-align. */
45 100mbps_hd 100Mbps half duplex.
46 100mbps_fd 100Mbps full duplex.
50 3 100Mbps half duplex.
51 4 100Mbps full duplex.
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/igb/
De1000_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
62 /* Interrupt acknowledge Auto-mask */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
184 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
186 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
188 #define E1000_CTRL_SPD_100 0x00000100 /* Force 100Mb */
245 #define E1000_STATUS_SPEED_100 0x00000040 /* Speed 100Mb/s */
254 /* Constants used to intrepret the masked PCI-X bus speed. */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/igc/
Digc_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
47 /* Loop limit on how long we wait for auto-negotiation to complete */
51 /* Number of 100 microseconds we wait for PCI Express master disable */
116 #define NWAY_AR_100TX_HD_CAPS 0x0080 /* 100TX Half Duplex Capable */
117 #define NWAY_AR_100TX_FD_CAPS 0x0100 /* 100TX Full Duplex Capable */
121 /* Link Partner Ability Register (Base Page) */
125 /* 1000BASE-T Control Register */
130 /* 1000BASE-T Status Register */
184 #define IGC_STATUS_SPEED_100 0x00000040 /* Speed 100Mb/s */
189 #define SPEED_100 100
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-omap-100k.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * OMAP7xx SPI 100k controller driver
52 #define SPI_CTRL_WORD_SIZE(x) (((x) - 1) << 2)
71 /* Virtual base address of the controller */
72 void __iomem *base; member
76 void __iomem *base; member
86 val = readw(spi100k->base + SPI_SETUP1); in spi100k_enable_clock()
88 writew(val, spi100k->base + SPI_SETUP1); in spi100k_enable_clock()
97 val = readw(spi100k->base + SPI_SETUP1); in spi100k_disable_clock()
99 writew(val, spi100k->base + SPI_SETUP1); in spi100k_disable_clock()
[all …]
/kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/intel/
De100.rst1 .. SPDX-License-Identifier: GPL-2.0+
4 Linux Base Driver for the Intel(R) PRO/100 Family of Adapters
12 - In This Release
13 - Identifying Your Adapter
14 - Building and Installation
15 - Driver Configuration Parameters
16 - Additional Configurations
17 - Known Issues
18 - Support
24 This file describes the Linux Base Driver for the Intel(R) PRO/100 Family of
[all …]
/kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/ti/
Dtlan.rst1 .. SPDX-License-Identifier: GPL-2.0
9 (C) 1997-1998 Caldera, Inc.
13 (C) 1999-2001 Torben Mathiasen <tmm@image.dk, torben.mathiasen@compaq.com>
31 0e11 ae32 Compaq Netelligent 10/100 TX PCI UTP
34 0e11 ae40 Compaq Netelligent Dual 10/100 TX PCI UTP
35 0e11 ae43 Compaq Netelligent Integrated 10/100 TX UTP
36 0e11 b011 Compaq Netelligent 10/100 TX Embedded UTP
38 0e11 b030 Compaq Netelligent 10/100 TX UTP
41 108d 0012 Olicom OC-2325
42 108d 0013 Olicom OC-2183
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/
Dsky2.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Yukon-2 */
32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */
34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */
35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */
36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */
37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */
38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */
60 /* PCI_OUR_REG_3 32 bit Our Register 3 (Yukon-ECU only) */
[all …]
Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
173 IS_I2C_READY = 1<<25, /* IRQ on end of I2C Tx */
262 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
263 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */
264 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */
265 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */
266 CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dvf610-zii-scu4-aib.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // Copyright (C) 2016-2018 Zodiac Inflight Innovations
5 /dts-v1/;
10 compatible = "zii,vf610scu4-aib", "zii,vf610dev", "fsl,vf610";
13 stdout-path = &uart0;
21 gpio-leds {
22 compatible = "gpio-leds";
23 pinctrl-0 = <&pinctrl_leds_debug>;
24 pinctrl-names = "default";
29 linux,default-trigger = "heartbeat";
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun4i_hdmi_i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
28 * 1 byte takes 9 clock cycles (8 bits + 1 ACK) = 90 us for 100 kHz in fifo_transfer()
29 * clock. As clock rate is fixed, just round it up to 100 us. in fifo_transfer()
31 const unsigned long byte_time_ns = 100; in fifo_transfer()
41 (hdmi->variant->ddc_fifo_thres_incl ? 0 : 1); in fifo_transfer()
45 * For TX the threshold is for an empty FIFO. in fifo_transfer()
50 if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg, in fifo_transfer()
53 return -ETIMEDOUT; in fifo_transfer()
56 return -EIO; in fifo_transfer()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_lvds.c2 * Copyright © 2006-2007 Intel Corporation
51 /* 100us units */
56 int tx; member
65 struct intel_encoder base; member
79 return container_of(encoder, struct intel_lvds_encoder, base.base); in to_lvds_encoder()
101 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_lvds_get_hw_state()
102 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); in intel_lvds_get_hw_state()
107 encoder->power_domain); in intel_lvds_get_hw_state()
111 ret = intel_lvds_port_enabled(dev_priv, lvds_encoder->reg, pipe); in intel_lvds_get_hw_state()
113 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_lvds_get_hw_state()
[all …]
/kernel/linux/linux-5.10/drivers/atm/
Deni.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* drivers/atm/eni.h - Efficient Networks ENI155P device driver declarations */
4 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
28 #define TX_DMA_BUF 100 /* should be enough for 64 kB */
33 #define ENI_ZEROES_SIZE 4 /* need that many DMA-able zero bytes */
42 void __iomem *send; /* base, 0 if unused */
45 unsigned long tx_pos; /* current TX write position */
46 unsigned long words; /* size of TX queue */
47 int index; /* TX channel number */
50 struct sk_buff_head backlog; /* queue of waiting TX buffers */
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43legacy/
Ddma.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 /* DMA-Interrupt reasons. */
21 /*** 32-bit DMA Engine. ***/
23 /* 32-bit DMA controller registers. */
72 /* 32-bit DMA descriptor. */
95 #define B43legacy_DMA0_RX_BUFFERSIZE (2304 + 100)
109 /* The kernel DMA-able buffer. */
111 /* DMA base bus-address of the descriptor buffer. */
113 /* ieee80211 TX status. Only used once per 802.11 frag. */
123 /* Kernel virtual base address of the ring memory. */
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls1028a-kontron-sl28-var2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
12 /dts-v1/;
13 #include "fsl-ls1028a-kontron-sl28.dts"
16 model = "Kontron SMARC-sAL28 (TSN-on-module)";
17 compatible = "kontron,sl28-var2", "kontron,sl28", "fsl,ls1028a";
21 phy0: ethernet-phy@5 {
23 eee-broken-1000t;
24 eee-broken-100tx;
27 phy1: ethernet-phy@4 {
[all …]

12345678910>>...28