| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | ucd9000.rst | 11 Addresses scanned: - 15 - http://focus.ti.com/lit/ds/symlink/ucd90120.pdf 16 - http://focus.ti.com/lit/ds/symlink/ucd90124.pdf 17 - http://focus.ti.com/lit/ds/symlink/ucd90160.pdf 18 - http://focus.ti.com/lit/ds/symlink/ucd90320.pdf 19 - http://focus.ti.com/lit/ds/symlink/ucd9090.pdf 20 - http://focus.ti.com/lit/ds/symlink/ucd90910.pdf 22 Author: Guenter Roeck <linux@roeck-us.net> 26 ----------- 31 sequences up to 12 independent voltage rails. The device integrates a 12-bit [all …]
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| /kernel/linux/linux-5.10/arch/mips/include/asm/ |
| D | mips-cpc.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 8 # error Please include asm/mips-cps.h rather than asm/mips-cpc.h 21 * mips_cpc_default_phys_base - retrieve the default physical base address of 26 * implemented per-platform. 31 * mips_cpc_probe - probe for a Cluster Power Controller 34 * a CPC is successfully detected, else -errno. 41 return -ENODEV; in mips_cpc_probe() 46 * mips_cpc_present - determine whether a Cluster Power Controller is present 80 /* CPC_ACCESS - Control core/IOCU access to CPC registers prior to CM 3 */ 81 CPC_ACCESSOR_RW(32, 0x000, access) [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-sa1100/ |
| D | badge4.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/arch/arm/mach-sa1100/badge4.c 10 * Copyright (C) 2002 Hewlett-Packard Company 15 #include <linux/platform_data/sa11x0-serial.h> 26 #include <asm/mach-types.h> 97 .name = "leds-gpio", 98 .id = -1, 125 * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit) 127 * Sixty-three 32 KiW Main Blocks (4032 Ki b) 133 * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b) [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/hwmon/pmbus/ |
| D | ti,ucd90320.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Jim Wright <wrightj@linux.vnet.ibm.com> 14 The UCD90320 is a 32-rail PMBus/I2C addressable power-supply sequencer and 17 digital monitors (DMONx), 32 to enable the power supply (ENx), 24 for 18 margining (MARx), 16 for logical GPO, and 32 GPIs for cascading, and system 26 - ti,ucd90320 32 - compatible 33 - reg [all …]
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| /kernel/linux/linux-5.10/drivers/scsi/ufs/ |
| D | ufs_quirks.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. 22 * ufs_dev_fix - ufs device quirk info 51 * - As soon as SW sees the DL NAC error, it should schedule the error handler 52 * - Error handler would sleep for 50ms to see if there are any fatal errors 54 * - If there are fatal errors then SW does normal error recovery. 55 * - If there are no fatal errors then SW sends the NOP command to device 57 * - If NOP command times out, SW does normal error recovery 58 * - If NOP command succeed, skip the error handling. 77 * (atleast for 500us) from UFS rails (especially from VCCQ rail). [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | ls1021a-tsn.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2016-2018 NXP Semiconductors 6 /dts-v1/; 10 model = "NXP LS1021A-TSN Board"; 12 sys_mclk: clock-mclk { 13 compatible = "fixed-clock"; 14 #clock-cells = <0>; 15 clock-frequency = <24576000>; 18 reg_vdda_codec: regulator-3V3 { 19 compatible = "regulator-fixed"; [all …]
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| D | am335x-pepper.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Gumstix, Inc. - https://www.gumstix.com/ 5 /dts-v1/; 7 #include <dt-bindings/input/input.h> 12 compatible = "gumstix,am335x-pepper", "ti,am33xx"; 16 cpu0-supply = <&dcdc3_reg>; 26 compatible = "gpio-keys"; 30 compatible = "gpio-leds"; 38 compatible = "ti,da830-evm-audio"; 42 compatible = "regulator-fixed"; [all …]
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| D | tegra114-roth.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 15 linux,initrd-start = <0x82000000>; 16 linux,initrd-end = <0x82800000>; 24 trusted-foundations { 25 compatible = "tlm,trusted-foundations"; 26 tlm,version-major = <2>; 27 tlm,version-minor = <8>; 40 avdd-dsi-csi-supply = <&vdd_1v2_ap>; [all …]
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| D | tegra114-dalmore.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/input/input.h> 23 stdout-path = "serial0:115200n8"; 34 hdmi-supply = <&vdd_5v0_hdmi>; 35 vdd-supply = <&vdd_hdmi_reg>; 36 pll-supply = <&palmas_smps3_reg>; 38 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 39 nvidia,hpd-gpio = 46 avdd-dsi-csi-supply = <&avdd_1v2_reg>; [all …]
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| D | tegra20-paz00.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 6 #include "tegra20-cpu-opp.dtsi" 7 #include "tegra20-cpu-opp-microvolt.dtsi" 21 stdout-path = "serial0:115200n8"; 40 vdd-supply = <&hdmi_vdd_reg>; 41 pll-supply = <&hdmi_pll_reg>; 43 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 44 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) [all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/gpio/ |
| D | driver.rst | 26 between 0 and n-1, n being the number of GPIOs managed by the chip. 29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO 30 lines are handled by one bit per line in a 32-bit register, it makes sense to 44 So for example one platform could use global numbers 32-159 for GPIOs, with a 45 controller defining 128 GPIOs at a "base" of 32 ; while another platform uses 46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type 47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy 49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders. 60 - methods to establish GPIO line direction 61 - methods used to access GPIO line values [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 10 #include "rk3399-op1-opp.dtsi" 14 stdout-path = "serial2:115200n8"; 23 * - Rails that only connect to the EC (or devices that the EC talks to) 25 * - Rails _are_ included if the rails go to the AP even if the AP 32 * put the child rail as an alias of the parent rail. Sometimes rails 34 * - The EC controls the enable and the EC always enables a rail as 36 * - The rails are actually connected to each other by a jumper and [all …]
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | gpio.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 3 * <linux/gpio.h> - userspace ABI for the GPIO character devices 21 * Must be a multiple of 8 to ensure 32/64-bit alignment of structs. 23 #define GPIO_MAX_NAME_SIZE 32 26 * struct gpiochip_info - Information about a certain GPIO chip 41 * Must be no greater than 64, as bitmaps are restricted here to 64-bits 42 * for simplicity, and a multiple of 2 to ensure 32/64-bit alignment of 54 * enum gpio_v2_line_flag - &struct gpio_v2_line_attribute.flags values 65 * @GPIO_V2_LINE_FLAG_BIAS_PULL_UP: line has pull-up bias enabled 66 * @GPIO_V2_LINE_FLAG_BIAS_PULL_DOWN: line has pull-down bias enabled [all …]
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| D | pci_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz> 25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of 26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of 50 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */ 59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ 95 #define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ 96 #define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */ 97 #define PCI_BASE_ADDRESS_2 0x18 /* 32 bits [htype 0 only] */ 98 #define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */ [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/ |
| D | phy_n.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 Copyright (c) 2010-2011 Rafał Miłecki <zajec5@gmail.com> 96 enum nl80211_band band = b43_current_band(dev->wl); in b43_nphy_ipa() 97 return ((dev->phy.n->ipa2g_on && band == NL80211_BAND_2GHZ) || in b43_nphy_ipa() 98 (dev->phy.n->ipa5g_on && band == NL80211_BAND_5GHZ)); in b43_nphy_ipa() 101 /* https://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCoreGetState */ 112 /* https://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */ 137 b43err(dev->wl, "RF sequence status timeout\n"); in b43_nphy_force_rf_sequence() 149 /* https://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlOverrideRev7 */ 154 struct b43_phy *phy = &dev->phy; in b43_nphy_rf_ctl_override_rev7() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | gpio.txt | 5 ----------------- 7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose 8 of this GPIO for the device. While a non-existent <name> is considered valid 10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old 24 and bit-banged data signals: 27 gpio-controller; 28 #gpio-cells = <2>; 32 data-gpios = <&gpio1 12 0>, 44 recommended to use the two-cell approach. 48 include/dt-bindings/gpio/gpio.h whenever possible: [all …]
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 27 range 32 512 57 non-sleeping contexts. They can make bitbanged serial protocols 115 tristate "GPIO driver for 74xx-ICs with MMIO access" 119 Say yes here to support GPIO functionality for 74xx-compatible ICs 135 If driver is built as a module it will be called gpio-altera. 285 tristate "Generic memory-mapped GPIO controller support (MMIO platform device)" 288 Say yes here to support basic platform_device memory-mapped GPIO controllers. 316 ICH-based chipsets. Currently supported devices: ICH6, ICH7, ICH8 334 depends on ARM # For <asm/mach-types.h> [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/ |
| D | dsi_pll_7nm.c | 2 * SPDX-License-Identifier: GPL-2.0 7 #include <linux/clk-provider.h> 14 * DSI PLL 7nm - clock diagram (eg: DSI0): TODO: updated CPHY diagram 19 * +---------+ | +----------+ | +----+ 20 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk 21 * +---------+ | +----------+ | +----+ 25 * | | +----+ | |\ dsi0_pclk_mux 26 * | |--| /2 |--o--| \ | 27 * | | +----+ | \ | +---------+ 28 …* | --------------| |--o--| div_7_4 |-- dsi0_phy_pll_… [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/ |
| D | hi3660-hikey960.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 12 #include "hikey960-pinctrl.dtsi" 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/interrupt-controller/irq.h> 16 #include <dt-bindings/usb/pd.h> 20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; 35 stdout-path = "serial6:115200n8"; 44 reserved-memory { [all …]
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| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| D | clk-tegra114.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <linux/clk-provider.h> 13 #include <dt-bindings/clock/tegra114-car.h> 16 #include "clk-id.h" 20 #define CPU_FINETRIM_DR 0x4d8 /* rise->rise prop dly A */ 21 #define CPU_FINETRIM_R 0x4e4 /* rise->rise prop dly inc A */ 163 { .pdiv = 32, .hw_val = 14 }, 541 { .pdiv = 32, .hw_val = 14 }, 613 #define MASK(x) (BIT(x) - 1) 870 { .dev_id = "rtc-tegra", .dt_id = TEGRA114_CLK_RTC }, [all …]
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| /kernel/linux/linux-5.10/drivers/media/platform/omap3isp/ |
| D | ispccp2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * TI OMAP3 ISP - CCP2 module 62 * ccp2_print_status - Print current CCP2 module register values. 65 dev_dbg(isp->dev, "###CCP2 " #name "=0x%08x\n", \ 72 dev_dbg(isp->dev, "-------------CCP2 Register dump-------------\n"); in ccp2_print_status() 103 dev_dbg(isp->dev, "--------------------------------------------\n"); in ccp2_print_status() 107 * ccp2_reset - Reset the CCP2 122 dev_warn(isp->dev, in ccp2_reset() 130 * ccp2_pwr_cfg - Configure the power mode settings 138 ((isp->revision == ISP_REVISION_15_0 && isp->autoidle) ? in ccp2_pwr_cfg() [all …]
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | omap_hsmmc.c | 27 #include <linux/dma-mapping.h> 37 #include <linux/mmc/slot-gpio.h> 44 #include <linux/platform_data/hsmmc-omap.h> 153 #define mmc_pdata(host) host->pdata 220 struct mmc_ios *ios = &mmc->ios; in omap_hsmmc_enable_supply() 222 if (!IS_ERR(mmc->supply.vmmc)) { in omap_hsmmc_enable_supply() 223 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in omap_hsmmc_enable_supply() 228 /* Enable interface voltage rail, if needed */ in omap_hsmmc_enable_supply() 229 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in omap_hsmmc_enable_supply() 230 ret = regulator_enable(mmc->supply.vqmmc); in omap_hsmmc_enable_supply() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | arcturus_ppt.c | 68 #define SMU_FEATURES_HIGH_SHIFT 32 215 struct smu_table_context *smu_table = &smu->smu_table; in arcturus_tables_init() 216 struct smu_table *tables = smu_table->tables; in arcturus_tables_init() 234 smu_table->metrics_table = kzalloc(sizeof(SmuMetrics_t), GFP_KERNEL); in arcturus_tables_init() 235 if (!smu_table->metrics_table) in arcturus_tables_init() 236 return -ENOMEM; in arcturus_tables_init() 237 smu_table->metrics_time = 0; in arcturus_tables_init() 239 smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v1_0); in arcturus_tables_init() 240 smu_table->gpu_metrics_table = kzalloc(smu_table->gpu_metrics_table_size, GFP_KERNEL); in arcturus_tables_init() 241 if (!smu_table->gpu_metrics_table) { in arcturus_tables_init() [all …]
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| /kernel/linux/linux-5.10/drivers/soc/tegra/ |
| D | pmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. 12 #define pr_fmt(fmt) "tegra-pmc: " fmt 14 #include <linux/arm-smccc.h> 16 #include <linux/clk-provider.h> 18 #include <linux/clk/clk-conf.h> 36 #include <linux/pinctrl/pinconf-generic.h> 51 #include <dt-bindings/interrupt-controller/arm-gic.h> 52 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 53 #include <dt-bindings/gpio/tegra186-gpio.h> [all …]
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| /kernel/linux/linux-5.10/drivers/infiniband/hw/qib/ |
| D | qib_user_sdma.c | 14 * - Redistributions of source code must retain the above 18 * - Redistributions in binary form must reproduce the above 69 u8 tiddma; /* if this is NEW tid-sdma */ 144 struct rb_node *node = root->rb_node; in qib_user_sdma_rb_search() 149 if (pid < sdma_rb_node->pid) in qib_user_sdma_rb_search() 150 node = node->rb_left; in qib_user_sdma_rb_search() 151 else if (pid > sdma_rb_node->pid) in qib_user_sdma_rb_search() 152 node = node->rb_right; in qib_user_sdma_rb_search() 162 struct rb_node **node = &(root->rb_node); in qib_user_sdma_rb_insert() 169 if (new->pid < got->pid) in qib_user_sdma_rb_insert() [all …]
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