Searched full:33000000 (Results 1 – 25 of 46) sorted by relevance
12
48 clock-frequency = <33000000>;58 clock-frequency = <33000000>;
47 clock-frequency = <33000000>;
9 33000000
24 clock-frequency = <33000000>;
39 assigned-clock-rates = <33000000>;
49 spi-max-frequency = <33000000>;
306 assigned-clock-rates = <33000000>;
84 spi-max-frequency = <33000000>;
34 unsigned long sysclk = 33000000; in taishan_fixups()
70 unsigned long sysclk = 33000000; in ebony_fixups()
128 return 33000000; in gemini_pci_recalc_rate()136 return 33000000; in gemini_pci_round_rate()145 if (rate == 33000000) in gemini_pci_set_rate()
20 CONFIG_SH_PCLK_FREQ=33000000
48 assigned-clock-rates = <33000000>;
29 timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot
62 clock-frequency = <33000000>;
268 clock-frequency = <33000000>;
11 #define HCLK 33000000 /* 33 MHz (PCI clock) */
504 if ((rate == 33000000) && (val & PCI_STATUS_66MHZ_CAPABLE)) { in faraday_pci_probe()517 if (rate == 33000000) in faraday_pci_probe()
279 return 33000000; in icst_round_rate()299 } else if (rate == 33000000) { in icst_set_rate()
45 #define INTEL_QUARK_I2C_CLK_HZ 33000000
108 clock-frequency = <33000000>;
306 clock-frequency = <33000000>;312 clock-frequency = <33000000>;
102 clock = 33000000; in ie6xx_wdt_set_timeout()
36 #define DRXK_QAM32_MPEG_BIT_RATE 33000000UL /*bps*/
276 mmc@33000000 {