| /kernel/linux/linux-5.10/drivers/gpu/ipu-v3/ |
| D | ipu-cpmem.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved. 11 #include "ipu-prv.h" 30 #define IPU_CPMEM_WORD(word, ofs, size) ((((word) * 160 + (ofs)) << 8) | (size)) 93 ipu_get_cpmem(struct ipuv3_channel *ch) in ipu_get_cpmem() argument 95 struct ipu_cpmem *cpmem = ch->ipu->cpmem_priv; in ipu_get_cpmem() 97 return cpmem->base + ch->num; in ipu_get_cpmem() 100 static void ipu_ch_param_write_field(struct ipuv3_channel *ch, u32 wbs, u32 v) in ipu_ch_param_write_field() argument 102 struct ipu_ch_param __iomem *base = ipu_get_cpmem(ch); in ipu_ch_param_write_field() 103 u32 bit = (wbs >> 8) % 160; in ipu_ch_param_write_field() [all …]
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| D | ipu-prv.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 4 * Copyright (C) 2005-2009 Freescale Semiconductor, Inc. 16 #include <video/imx-ipu-v3.h> 18 #define IPU_MCU_T_DEFAULT 8 52 #define IPU_CHA_DB_MODE_SEL(ch) IPU_CM_REG(0x0150 + 4 * ((ch) / 32)) argument 53 #define IPU_ALT_CHA_DB_MODE_SEL(ch) IPU_CM_REG(0x0168 + 4 * ((ch) / 32)) argument 54 #define IPU_CHA_CUR_BUF(ch) IPU_CM_REG(0x023C + 4 * ((ch) / 32)) argument 60 #define IPU_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0268 + 4 * ((ch) / 32)) argument 61 #define IPU_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0270 + 4 * ((ch) / 32)) argument 62 #define IPU_CHA_BUF2_RDY(ch) IPU_CM_REG(0x0288 + 4 * ((ch) / 32)) argument [all …]
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| /kernel/linux/linux-5.10/drivers/scsi/ |
| D | ch.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * (c) 1996-2003 Gerd Knorr <kraxel@bytesex.org> 38 #define CH_TYPES 8 71 static int dt_id[CH_DT_MAX] = { [ 0 ... (CH_DT_MAX-1) ] = -1 }; 76 /* tell the driver about vendor-specific slots */ 77 static int vendor_firsts[CH_TYPES-4]; 78 static int vendor_counts[CH_TYPES-4]; 82 static const char * vendor_labels[CH_TYPES-4] = { 87 #define ch_printk(prefix, ch, fmt, a...) \ argument 88 sdev_prefix_printk(prefix, (ch)->device, (ch)->name, fmt, ##a) [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/imx/dcss/ |
| D | dcss-dpr.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include "dcss-dev.h" 36 #define PIX_SIZE_POS 8 37 #define PIX_SIZE_MASK GENMASK(9, 8) 118 struct dcss_dpr_ch ch[3]; member 121 static void dcss_dpr_write(struct dcss_dpr_ch *ch, u32 val, u32 ofs) in dcss_dpr_write() argument 123 struct dcss_dpr *dpr = ch->dpr; in dcss_dpr_write() 125 dcss_ctxld_write(dpr->ctxld, dpr->ctx_id, val, ch->base_ofs + ofs); in dcss_dpr_write() 130 struct dcss_dpr_ch *ch; in dcss_dpr_ch_init_all() local 134 ch = &dpr->ch[i]; in dcss_dpr_ch_init_all() [all …]
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| D | dcss-scaler.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include "dcss-dev.h" 16 #define SCALE2MEM_EN BIT(8) 33 #define A2R10G10B10_FORMAT_POS 8 34 #define A2R10G10B10_FORMAT_MASK GENMASK(11, 8) 88 struct dcss_scaler_ch ch[3]; member 101 #define PSC_PHASE_MASK (PSC_NUM_PHASES - 1) 103 #define PSC_Q_ROUND_OFFSET (1 << (PSC_Q_FRACTION - 1)) 106 * mult_q() - Performs fixed-point multiplication. 122 * div_q() - Performs fixed-point division. [all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | sh_mobile_lcdcfb.c | 16 #include <linux/dma-mapping.h> 36 /* ---------------------------------------------------------------------------- 42 #define LDBCR_UPF(n) (1 << ((n) + 8)) 66 #define LDBBSIFR_SWPB (1 << 8) 95 #define LDBBSAYR_FG1G_MASK (0xff << 8) 96 #define LDBBSAYR_FG1G_SHIFT 8 104 #define LDBBSACR_FG2G_MASK (0xff << 8) 105 #define LDBBSACR_FG2G_SHIFT 8 113 #define LDBBSAAR_GY_MASK (0xff << 8) 114 #define LDBBSAAR_GY_SHIFT 8 [all …]
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| /kernel/linux/linux-5.10/arch/x86/crypto/ |
| D | sha512-avx2-asm.S | 2 # Implement fast SHA-512 with AVX2 instructions. (x86_64) 22 # - Redistributions of source code must retain the above 26 # - Redistributions in binary form must reproduce the above 42 # This code is described in an Intel White-Paper: 43 # "Fast SHA-512 Implementations on Intel Architecture Processors" 100 XFER_SIZE = 4*8 101 SRND_SIZE = 1*8 102 INP_SIZE = 1*8 103 INPEND_SIZE = 1*8 104 CTX_SIZE = 1*8 [all …]
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| /kernel/linux/linux-5.10/sound/pci/emu10k1/ |
| D | emu10k1_callback.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 42 * macro evaluates its args more than once, so changed to upper-case. 67 emux->ops = emu10k1_ops; in snd_emu10k1_ops_setup() 86 emu = hw->synth; in snd_emu10k1_synth_get_voice() 91 int ch; in snd_emu10k1_synth_get_voice() local 92 vp = &emu->voices[best[i].voice]; in snd_emu10k1_synth_get_voice() 93 if ((ch = vp->ch) < 0) { in snd_emu10k1_synth_get_voice() 95 dev_warn(emu->card->dev, in snd_emu10k1_synth_get_voice() 96 "synth_get_voice: ch < 0 (%d) ??", i); in snd_emu10k1_synth_get_voice() 100 vp->emu->num_voices--; in snd_emu10k1_synth_get_voice() [all …]
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| /kernel/linux/linux-5.10/drivers/clk/uniphier/ |
| D | clk-uniphier-mio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 #include "clk-uniphier.h" 12 UNIPHIER_CLK_FACTOR("sd-44m", -1, "sd-133m", 1, 3), \ 13 UNIPHIER_CLK_FACTOR("sd-33m", -1, "sd-200m", 1, 6), \ 14 UNIPHIER_CLK_FACTOR("sd-50m", -1, "sd-200m", 1, 4), \ 15 UNIPHIER_CLK_FACTOR("sd-67m", -1, "sd-200m", 1, 3), \ 16 UNIPHIER_CLK_FACTOR("sd-100m", -1, "sd-200m", 1, 2), \ 17 UNIPHIER_CLK_FACTOR("sd-40m", -1, "sd-200m", 1, 5), \ 18 UNIPHIER_CLK_FACTOR("sd-25m", -1, "sd-200m", 1, 8), \ 19 UNIPHIER_CLK_FACTOR("sd-22m", -1, "sd-133m", 1, 6) [all …]
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| /kernel/linux/linux-5.10/drivers/clk/berlin/ |
| D | berlin2-avpll.c | 1 // SPDX-License-Identifier: GPL-2.0 6 * Alexandre Belloni <alexandre.belloni@free-electrons.com> 8 #include <linux/clk-provider.h> 15 #include "berlin2-avpll.h" 19 * VCO with 8 channels each, channel 8 is the odd-one-out and does 29 #define NUM_CHANNELS 8 46 #define VCO_REG0V9_SEL_SHIFT 8 118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled() 119 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_is_enabled() 130 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable() [all …]
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| /kernel/linux/linux-5.10/drivers/tty/serial/jsm/ |
| D | jsm_neo.c | 1 // SPDX-License-Identifier: GPL-2.0+ 20 static u32 jsm_offset_table[8] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 }; 25 * a non-destructive, read-only location on the Neo card. 27 * In this case, we are reading the DVID (Read-only Device Identification) 32 readb(bd->re_map_membase + 0x8D); in neo_pci_posting_flush() 35 static void neo_set_cts_flow_control(struct jsm_channel *ch) in neo_set_cts_flow_control() argument 38 ier = readb(&ch->ch_neo_uart->ier); in neo_set_cts_flow_control() 39 efr = readb(&ch->ch_neo_uart->efr); in neo_set_cts_flow_control() 41 jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting CTSFLOW\n"); in neo_set_cts_flow_control() 51 writeb(0, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control() [all …]
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| /kernel/linux/linux-5.10/sound/isa/sb/ |
| D | emu8000_callback.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 * Copyright (C) 1999-2000 Takashi Iwai <tiwai@suse.de> 22 static void reset_voice(struct snd_emux *emu, int ch); 39 static void snd_emu8000_tweak_voice(struct snd_emu8000 *emu, int ch); 43 * macro evaluates its args more than once, so changed to upper-case. 74 hw->emu->ops = emu8000_ops; in snd_emu8000_ops_setup() 88 hw = vp->hw; in release_voice() 89 dcysusv = 0x8000 | (unsigned char)vp->reg.parm.modrelease; in release_voice() 90 EMU8000_DCYSUS_WRITE(hw, vp->ch, dcysusv); in release_voice() 91 dcysusv = 0x8000 | (unsigned char)vp->reg.parm.volrelease; in release_voice() [all …]
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| /kernel/linux/linux-5.10/arch/mips/include/asm/txx9/ |
| D | tx3927.h | 20 #define TX3927_TMR_REG(ch) (TX3927_REG_BASE + 0xf000 + (ch) * 0x100) argument 22 #define TX3927_SIO_REG(ch) (TX3927_REG_BASE + 0xf300 + (ch) * 0x100) argument 26 volatile unsigned long cr[8]; 33 volatile unsigned long cr[8]; 46 } ch[4]; member 47 volatile unsigned long dbr[8]; 162 #define TX3927_DMA_MCR_EIS(ch) (0x10000000<<(ch)) argument 163 #define TX3927_DMA_MCR_DIS(ch) (0x01000000<<(ch)) argument 165 #define TX3927_DMA_MCR_FIFUM(ch) (0x00000008<<(ch)) argument 221 #define TX3927_IR_SIO(ch) (6 + (ch)) argument [all …]
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| /kernel/linux/linux-5.10/drivers/net/ipa/ |
| D | gsi_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2018-2020 Linaro Ltd. 26 * function-like macro that takes a parameter used in the computation. 33 * parameter "ch". The "ch" value is a channel id whose maximum value is 30 34 * (though the actual limit is hardware-dependent). 38 * (though the actual limit is hardware-dependent). 51 #define GSI_CH_C_CNTXT_0_OFFSET(ch) \ argument 52 GSI_EE_N_CH_C_CNTXT_0_OFFSET((ch), GSI_EE_AP) 53 #define GSI_EE_N_CH_C_CNTXT_0_OFFSET(ch, ee) \ argument [all …]
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-ml-ioh.c | 1 // SPDX-License-Identifier: GPL-2.0-only 38 struct ioh_reg_comn regs[8]; 46 * struct ioh_gpio_reg_data - The register store data. 66 * struct ioh_gpio - GPIO private data structure. 74 * @ch: Indicate GPIO channel 85 int ch; member 98 spin_lock_irqsave(&chip->spinlock, flags); in ioh_gpio_set() 99 reg_val = ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_set() 105 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); in ioh_gpio_set() 106 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_gpio_set() [all …]
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| /kernel/linux/linux-5.10/drivers/media/pci/solo6x10/ |
| D | solo6x10-regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com> 17 #include "solo6x10-offsets.h" 34 #define SOLO_DMA_CTRL_REFRESH_CYCLE(n) ((n)<<8) 53 #define SOLO_VCLK_VIN0809_DELAY(n) ((n)<<8) 70 #define SOLO_IRQ_PS2_0 BIT(8) 107 #define SOLO_P2M_CSC_BYTE_REORDER BIT(5) /* BGR -> RGB */ 121 #define SOLO_P2M_COMMAND_DONE BIT(8) 135 /* 0:Y[0]<-0(OFF), 1:Y[0]<-1(ON), 2:Y[0]<-G[0], 3:Y[0]<-Bit[15] */ 167 #define SOLO_FI_INV_DISP_LIVE(n) ((n)<<8) [all …]
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| D | solo6x10-enc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com> 19 #define VI_PROG_HSIZE (1280 - 16) 20 #define VI_PROG_VSIZE (1024 - 16) 33 - SOLO_CAP_PAGE_SIZE) >> 16) in solo_capture_config() 37 if (solo_dev->type == SOLO_DEV_6110) { in solo_capture_config() 39 * wacked out frame timing on 4-port 6110. */ in solo_capture_config() 50 width = solo_dev->video_hsize; in solo_capture_config() 51 height = solo_dev->video_vsize; in solo_capture_config() 54 SOLO_DIM_V_MB_NUM_FRAME(height / 8) | in solo_capture_config() [all …]
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| /kernel/linux/linux-5.10/drivers/media/pci/cx25821/ |
| D | cx25821-core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 15 #include "cx25821-sram.h" 16 #include "cx25821-video.h" 19 MODULE_AUTHOR("Shu Lin - Hiep Huynh"); 26 static unsigned int card[] = {[0 ... (CX25821_MAXBOARDS - 1)] = UNSET }; 243 .irq_bit = 8, 332 for (i = ARRAY_SIZE(bits) - 1; i >= 0; i--) { in cx25821_risc_decode() 342 struct cx25821_i2c *bus = i2c_adap->algo_data; in i2c_slave_did_ack() 343 struct cx25821_dev *dev = bus->dev; in i2c_slave_did_ack() 344 return cx_read(bus->reg_stat) & 0x01; in i2c_slave_did_ack() [all …]
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| /kernel/linux/linux-5.10/fs/cifs/ |
| D | asn1.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 40 #define ASN1_EXT 8 /* External */ 71 #define KRB5U2U_OID_LEN 8 76 static unsigned long KRB5U2U_OID[8] = { 1, 2, 840, 113554, 1, 2, 2, 3 }; 100 ctx->begin = buf; in asn1_open() 101 ctx->end = buf + len; in asn1_open() 102 ctx->pointer = buf; in asn1_open() 103 ctx->error = ASN1_ERR_NOERROR; in asn1_open() 107 asn1_octet_decode(struct asn1_ctx *ctx, unsigned char *ch) in asn1_octet_decode() argument 109 if (ctx->pointer >= ctx->end) { in asn1_octet_decode() [all …]
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| /kernel/linux/linux-5.10/arch/arm64/crypto/ |
| D | sha512-core.S_shipped | 1 // SPDX-License-Identifier: GPL-2.0 11 // Copyright 2014-2016 The OpenSSL Project Authors. All Rights Reserved. 30 // SHA256-hw SHA256(*) SHA512 31 // Apple A7 1.97 10.5 (+33%) 6.73 (-1%(**)) 32 // Cortex-A53 2.38 15.5 (+115%) 10.0 (+150%(***)) 33 // Cortex-A57 2.31 11.6 (+86%) 7.51 (+260%(***)) 34 // Denver 2.01 10.5 (+26%) 6.70 (+8%) 35 // X-Gene 20.0 (+100%) 12.8 (+300%(***)) 40 // (**) The result is a trade-off: it's possible to improve it by 42 // on Cortex-A53 (or by 4 cycles per round). [all …]
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| /kernel/linux/linux-5.10/drivers/iio/adc/ |
| D | ad7606_spi.c | 1 // SPDX-License-Identifier: GPL-2.0 27 * For channels from second group(8-15) the order is the same, only with 30 #define AD7616_RANGE_CH_ADDR(ch) ((ch) >> 2) argument 32 #define AD7616_RANGE_CH_MSK(ch) (0b11 << (((ch) & 0b11) * 2)) argument 33 #define AD7616_RANGE_CH_MODE(ch, mode) ((mode) << ((((ch) & 0b11)) * 2)) argument 42 #define AD7606_RANGE_CH_MSK(ch) (GENMASK(3, 0) << (4 * ((ch) & 0x1))) argument 43 #define AD7606_RANGE_CH_MODE(ch, mode) \ argument 44 ((GENMASK(3, 0) & mode) << (4 * ((ch) & 0x1))) 45 #define AD7606_RANGE_CH_ADDR(ch) (0x03 + ((ch) >> 1)) argument 58 AD7616_CHANNEL(8), [all …]
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| /kernel/linux/linux-5.10/drivers/hwmon/ |
| D | gsc-hwmon.c | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <linux/hwmon-sysfs.h> 48 .reg_bits = 8, 49 .val_bits = 8, 59 u8 reg = hwmon->pdata->fan_base + (2 * attr->index); in pwm_auto_point_temp_show() 63 ret = regmap_bulk_read(hwmon->regmap, reg, regs, 2); in pwm_auto_point_temp_show() 67 ret = regs[0] | regs[1] << 8; in pwm_auto_point_temp_show() 77 u8 reg = hwmon->pdata->fan_base + (2 * attr->index); in pwm_auto_point_temp_store() 83 return -EINVAL; in pwm_auto_point_temp_store() 89 regs[1] = (temp >> 8) & 0xff; in pwm_auto_point_temp_store() [all …]
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| /kernel/linux/linux-5.10/arch/nios2/boot/compressed/ |
| D | console.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2008-2010 Thomas Chou <thomas@wytron.com.tw> 18 #define ALTERA_JTAGUART_SIZE 8 26 static void jtag_putc(int ch) in jtag_putc() argument 30 writeb(ch, uartbase + ALTERA_JTAGUART_DATA_REG); in jtag_putc() 33 static void jtag_putc(int ch) in jtag_putc() argument 38 writeb(ch, uartbase + ALTERA_JTAGUART_DATA_REG); in jtag_putc() 42 static int putchar(int ch) in putchar() argument 44 jtag_putc(ch); in putchar() 45 return ch; in putchar() [all …]
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| /kernel/linux/linux-5.10/arch/mips/lantiq/xway/ |
| D | dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/dma-mapping.h> 35 #define DMA_TX BIT(8) /* TX channel direction */ 45 #define DMA_PCTRL_8W_BURST 0x3 /* 8 word burst length */ 48 #define DMA_ETOP_ENDIANNESS (0xf << 8) /* endianness swap etop channels */ 60 ltq_dma_enable_irq(struct ltq_dma_channel *ch) in ltq_dma_enable_irq() argument 65 ltq_dma_w32(ch->nr, LTQ_DMA_CS); in ltq_dma_enable_irq() 66 ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN); in ltq_dma_enable_irq() 72 ltq_dma_disable_irq(struct ltq_dma_channel *ch) in ltq_dma_disable_irq() argument 77 ltq_dma_w32(ch->nr, LTQ_DMA_CS); in ltq_dma_disable_irq() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| D | intel_dram.c | 1 // SPDX-License-Identifier: MIT 41 return dimm->ranks * 64 / (dimm->width ?: 1); in intel_dimm_num_devices() 60 return 8 << val; in skl_get_dimm_width() 93 return 8 << val; in cnl_get_dimm_width() 114 return 8 * dimm->size / (intel_dimm_num_devices(dimm) ?: 1) == 16; in skl_is_16gb_dimm() 123 dimm->size = cnl_get_dimm_size(val); in skl_dram_get_dimm_info() 124 dimm->width = cnl_get_dimm_width(val); in skl_dram_get_dimm_info() 125 dimm->ranks = cnl_get_dimm_ranks(val); in skl_dram_get_dimm_info() 127 dimm->size = skl_get_dimm_size(val); in skl_dram_get_dimm_info() 128 dimm->width = skl_get_dimm_width(val); in skl_dram_get_dimm_info() [all …]
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