Searched full:clk_tsadc (Results 1 – 20 of 20) sorted by relevance
| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | exynos5410.h | 48 #define CLK_TSADC 270 macro
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| D | s5pv210.h | 154 #define CLK_TSADC 136 macro
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| D | exynos5420.h | 79 #define CLK_TSADC 270 macro
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| D | exynos4.h | 164 #define CLK_TSADC 326 macro
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| D | exynos3250.h | 199 #define CLK_TSADC 193 macro
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | samsung,exynos-adc.yaml | 161 clocks = <&cmu CLK_TSADC>,
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-exynos5410.c | 209 GATE(CLK_TSADC, "tsadc", "aclk66", GATE_IP_PERIC, 15, 0, 0),
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| D | clk-s5pv210.c | 570 GATE(CLK_TSADC, "tsadc", "dout_pclkp", CLK_GATE_IP3, 24, 0, 0),
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| D | clk-exynos4.c | 943 GATE(CLK_TSADC, "tsadc", "aclk100", GATE_IP_PERIL, 15,
970 GATE(CLK_TSADC, "tsadc", "aclk133", E4X12_GATE_BUS_FSYS1, 16, 0, 0),
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| D | clk-exynos3250.c | 637 GATE(CLK_TSADC, "tsadc", "div_aclk_200", GATE_IP_FSYS, 20, 0, 0),
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| D | clk-exynos5420.c | 1077 GATE(CLK_TSADC, "tsadc", "mout_user_aclk66_peric",
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | exynos5410.dtsi | 256 clocks = <&clock CLK_TSADC>;
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| D | s5pv210.dtsi | 149 clocks = <&clocks CLK_TSADC>;
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| D | exynos4412.dtsi | 274 clocks = <&clock CLK_TSADC>;
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| D | exynos3250.dtsi | 440 clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
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| D | exynos5420.dtsi | 1221 clocks = <&clock CLK_TSADC>;
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| D | clk-rk3328.c | 455 COMPOSITE_NOMUX(SCLK_TSADC, "clk_tsadc", "clk_24m", 0,
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| D | clk-rk3308.c | 425 COMPOSITE_NOMUX(SCLK_TSADC, "clk_tsadc", "xin24m", 0,
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| D | clk-px30.c | 763 COMPOSITE_NOMUX(SCLK_TSADC, "clk_tsadc", "xin24m", 0,
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| D | clk-rk3399.c | 1057 COMPOSITE(SCLK_TSADC, "clk_tsadc", mux_pll_p, 0,
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