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/kernel/linux/linux-5.10/drivers/scsi/isci/
Dprobe_roms.h228 * Spread Spectrum Clocking (SSC) settings for SATA and SAS.
234 * NOTE: Max spread for SATA is +0 / -5000 PPM.
237 * SATA SSC Tx at +0 / -1419 PPM Spread = 0x2
238 * SATA SSC Tx at +0 / -2129 PPM Spread = 0x3
239 * SATA SSC Tx at +0 / -4257 PPM Spread = 0x6
240 * SATA SSC Tx at +0 / -4967 PPM Spread = 0x7
246 * NOTE: Max spread for SAS down-spreading +0 /
249 * SAS SSC Tx at +0 / -1419 PPM Spread = 0x2
250 * SAS SSC Tx at +0 / -2129 PPM Spread = 0x3
252 * NOTE: Max spread for SAS center-spreading +2300 /
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dti,cdce925.txt30 For all PLL1, PLL2, ... an optional child node can be used to specify spread
32 - spread-spectrum: SSC mode as defined in the data sheet.
33 - spread-spectrum-center: Use "centered" mode instead of "max" mode. When
50 spread-spectrum = <4>;
51 spread-spectrum-center;
Dmarvell,berlin.txt7 Clock related registers are spread among the chip control registers. Berlin
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/
Dnvidia,tegra-regulators-coupling.txt40 regulator-coupled-max-spread = <170000 550000>;
50 regulator-coupled-max-spread = <170000 550000>;
60 regulator-coupled-max-spread = <550000 550000>;
Dregulator.yaml135 regulator-coupled-max-spread:
136 description: Array of maximum spread between voltages of coupled regulators
/kernel/linux/linux-5.10/kernel/irq/
Daffinity.c268 * number of vectors we just spread the vectors across the nodes. in __irq_build_affinity_masks()
308 /* Spread allocated vectors on CPUs of the current node */ in __irq_build_affinity_masks()
335 * 1) spread present CPU on these vectors
336 * 2) spread other possible CPUs on these vectors
361 /* Spread on present CPUs starting from affd->pre_vectors */ in irq_build_affinity_masks()
370 * Spread on non present CPUs starting from the next vector to be in irq_build_affinity_masks()
372 * vector space, assign the non present CPUs to the already spread in irq_build_affinity_masks()
458 * Spread on present CPUs starting from affd->pre_vectors. If we in irq_create_affinity_masks()
/kernel/linux/linux-5.10/Documentation/misc-devices/
Dics932s401.rst25 frequency. If spread spectrum mode is enabled, the driver also reports by what
26 percent the clock signal is being spread, which should be between 0 and -0.5%.
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/
Dclock_source.h65 * Display Port HW De spread of Reference Clock related Parameters structure
70 /* Flag for HW De Spread enabled (if enabled SS on DP Reference Clock)*/
96 /*> de-spread info, relevant only for on-the-fly tune-up pixel rate*/
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/
Dimx-sata.yaml57 fsl,no-spread-spectrum:
59 description: if present, disable spread-spectrum clocking on the SATA link.
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/include/
Dbios_parser_types.h211 /* Input: Enable spread spectrum */
283 /* 1 = Center Spread; 0 = down spread */
Dddc_service_types.h88 /* support for Spread Spectrum(SS) */
90 /* DP link settings (laneCount, linkRate, Spread) */
/kernel/linux/linux-5.10/Documentation/admin-guide/cgroup-v1/
Dcpusets.rst25 1.6 What is memory spread ?
181 - cpuset.memory_spread_page flag: if set, spread page cache evenly on allowed nodes
182 - cpuset.memory_spread_slab flag: if set, spread slab cache evenly on allowed nodes
319 1.6 What is memory spread ?
327 the kernel will spread the file system buffers (page cache) evenly
332 then the kernel will spread some file system related slab caches,
345 When new cpusets are created, they inherit the memory spread settings
349 or slab caches to ignore the task's NUMA mempolicy and be spread
352 their containing task's memory spread settings. If memory spreading
383 to access large file system data sets that need to be spread across
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dtegra30-cardhu-a04.dts103 regulator-coupled-max-spread = <300000>;
113 regulator-coupled-max-spread = <300000>;
Dtegra30-asus-nexus7-grouper-ti-pmic.dtsi56 regulator-coupled-max-spread = <300000>;
133 regulator-coupled-max-spread = <300000>;
Dtegra30-asus-nexus7-grouper-maxim-pmic.dtsi70 regulator-coupled-max-spread = <300000>;
83 regulator-coupled-max-spread = <300000>;
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv04/
Ddfp.c214 * It toggles spread spectrum PLL output and sets the bindings of PLLs in nv04_dfp_prepare_sel_clk()
223 * bit 0 NVClk spread spectrum on/off in nv04_dfp_prepare_sel_clk()
224 * bit 2 MemClk spread spectrum on/off in nv04_dfp_prepare_sel_clk()
225 * bit 4 PixClk1 spread spectrum on/off toggle in nv04_dfp_prepare_sel_clk()
226 * bit 6 PixClk2 spread spectrum on/off toggle in nv04_dfp_prepare_sel_clk()
231 * maybe a different spread mode in nv04_dfp_prepare_sel_clk()
233 * The logic behind turning spread spectrum on/off in the first place, in nv04_dfp_prepare_sel_clk()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
Ddce120_clk_mgr.c48 * dce121_clock_patch_xgmi_ss_info() - Save XGMI spread spectrum info
51 * Reads from VBIOS the XGMI spread spectrum info and saves it within
/kernel/linux/linux-5.10/fs/udf/
Dballoc.c563 uint32_t spread = 0xFFFFFFFF, nspread = 0xFFFFFFFF; in udf_table_new_block() local
594 while (spread && in udf_table_new_block()
607 if (nspread < spread) { in udf_table_new_block()
608 spread = nspread; in udf_table_new_block()
623 if (spread == 0xFFFFFFFF) { in udf_table_new_block()
/kernel/linux/linux-5.10/Documentation/admin-guide/device-mapper/
Dswitch.rst22 is created it is spread across multiple members. The details of the
44 spread with an address region size on the order of 10s of MBs, which
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/bios/
Dbios_parser.c909 * Get spread spectrum information from the ASIC_InternalSS_Info(ver 2.1 or
913 * no planning of supporting multiple spread Sprectum entry for EverGreen
983 * Get spread sprectrum information from the ASIC_InternalSS_Info Ver 2.1 or
989 * @param id, spread sprectrum info index
1010 * Get spread sprectrum information from the ASIC_InternalSS_Info table Ver 2.1
1014 * @param id, spread sprectrum info index
1074 * Get spread sprectrum information from the SS_Info table from the VBIOS
1079 * @param [in] id, spread sprectrum id
1608 * Get Number of spread spectrum entry from the SS_Info table from the VBIOS.
1612 * @param [in] id, spread spectrum id
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/kernel/linux/linux-5.10/lib/
Dts_bm.c20 * to left, it's still possible that a matching could be spread over
31 * matchings spread over multiple fragments, then go BM.
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/
Dsmu11_driver_if_sienna_cichlid.h874 // SECTION: Clock Spread Spectrum
876 // GFXCLK PLL Spread Spectrum
881 // GFXCLK DFLL Spread Spectrum
886 // UCLK Spread Spectrum
890 // FCLK Spread Spectrum
917 // UCLK Spread Spectrum
/kernel/linux/linux-5.10/arch/arm/mach-pxa/
Dzeus.h64 * Only 4 registers, but spread over a 32MB address space.
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Datombios.h1905 …UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int.…
1915 …UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int.…
1927 …UCHAR ucSpreadSpectrumType; // Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =0 Int…
1938 UCHAR ucSpreadSpectrumType; // Bit[0]: 0-Down Spread,1-Center Spread.
1963 UCHAR ucSpreadSpectrumType; // Bit[0]: 0-Down Spread,1-Center Spread.
2685 … In DP Mode Uniphy Input clock from internal PPLL, otherwise Input clock from external Spread clock
2724 … In DP Mode Uniphy Input clock from internal PPLL, otherwise Input clock from external Spread clock
3636 /****************************Spread Spectrum Info Table Definitions **********************/
3643 …UCHAR ucSpreadSpectrumType; //Bit1=0 Down Spread,=1 Center Spread. Bit1=1 Ext. =…
3729 …UCHAR ucMaxDownSpread; //Bit0 = 0: No Down spread; Bit0 = 1: 0.5% (Subject to change acc…
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dbrcm-sata-phy.txt28 - brcm,enable-ssc: use spread spectrum clocking (SSC) on this port

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