Searched full:tcms (Results 1 – 3 of 3) sorted by relevance
81 caches. Each of the TCMs can be enabled or disabled independently and158 if omitted. Recommended to enable it for maximizing TCMs.
354 * from the internal TCMs. This function is used to release the resets on355 * applicable cores to allow loading into the TCMs. The .prepare() ops is376 * Zero out both TCMs unconditionally (access from v8 Arm core is not in k3_r5_rproc_prepare()579 /* handle R5-view addresses of TCMs */ in k3_r5_rproc_da_to_va()586 /* handle SoC-view addresses of TCMs */ in k3_r5_rproc_da_to_va()636 * enable/disable each of the TCMs, control which TCM appears at the R5F core's1005 * TCMs are designed in general to support RAM-like backing in k3_r5_core_of_get_internal_memories()
45 TCMs in two separate banks, so for example an 8KiB ITCM is divided