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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/
Dcosmic,10001-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cosmic Circuits CC-10001 ADC
10 - Jonathan Cameron <jic23@kernel.org>
13 Cosmic Circuits 10001 10-bit ADC device.
17 const: cosmic,10001-adc
22 adc-reserved-channels:
25 Bitmask of reserved channels, i.e. channels that cannot be
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/kernel/linux/linux-5.10/drivers/iio/adc/
Dti-adc081c.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI ADC081C/ADC101C/ADC121C 8/10/12-bit ADC driver
14 * bits handled. For the 8-bit and 10-bit models the least-significant 4 or 2
15 * bits of value registers are reserved.
50 struct adc081c *adc = iio_priv(iio); in adc081c_read_raw() local
55 err = i2c_smbus_read_word_swapped(adc->i2c, REG_CONV_RES); in adc081c_read_raw()
59 *value = (err & 0xFFF) >> (12 - adc->bits); in adc081c_read_raw()
63 err = regulator_get_voltage(adc->ref); in adc081c_read_raw()
68 *shift = adc->bits; in adc081c_read_raw()
76 return -EINVAL; in adc081c_read_raw()
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Dqcom-pm8xxx-xoadc.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * specific-purpose and general purpose ADC converters and channels.
24 #include "qcom-vadc-common.h"
28 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
29 * drivers/misc/pmic8058-xoadc.c
30 * drivers/hwmon/pm8xxx-adc.c
58 /* Proper ADC registers */
100 * On a later ADC the decimation factors are defined as
124 * Physical channels which MUST exist on all PM variants in order to provide
156 * struct xoadc_channel - encodes channel properties and defaults
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Dstm32-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is part of STM32 ADC driver
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
11 #include <linux/dma-mapping.h>
15 #include <linux/iio/timer/stm32-lptim-trigger.h>
16 #include <linux/iio/timer/stm32-timer-trigger.h>
29 #include "stm32-adc-core.h"
34 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */
37 #define STM32_ADC_CH_MAX 20 /* max number of channels */
55 /* extsel - trigger mux selection value */
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Dstm32-dfsdm-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is the ADC part of the STM32 DFSDM driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
10 #include <linux/dma-mapping.h>
11 #include <linux/iio/adc/stm32-dfsdm-adc.h>
13 #include <linux/iio/hw-consumer.h>
15 #include <linux/iio/timer/stm32-lptim-trigger.h>
16 #include <linux/iio/timer/stm32-timer-trigger.h>
27 #include "stm32-dfsdm.h"
42 /* Limit filter output resolution to 31 bits. (i.e. sample range is +/-2^30) */
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Dcc10001_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015 Imagination Technologies Ltd.
48 * As per device specification, wait six clock cycles after power-up to
70 writel(val, adc_dev->reg_base + reg); in cc10001_adc_write_reg()
76 return readl(adc_dev->reg_base + reg); in cc10001_adc_read_reg()
82 ndelay(adc_dev->start_delay_ns); in cc10001_adc_power_up()
147 indio_dev = pf->indio_dev; in cc10001_adc_trigger_h()
149 data = adc_dev->buf; in cc10001_adc_trigger_h()
151 mutex_lock(&adc_dev->lock); in cc10001_adc_trigger_h()
153 if (!adc_dev->shared) in cc10001_adc_trigger_h()
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Dviperboard_adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Nano River Technologies viperboard IIO ADC driver
7 * All rights reserved.
56 struct vprbrd_adc *adc = iio_priv(iio_dev); in vprbrd_iio_read_raw() local
57 struct vprbrd *vb = adc->vb; in vprbrd_iio_read_raw()
58 struct vprbrd_adc_msg *admsg = (struct vprbrd_adc_msg *)vb->buf; in vprbrd_iio_read_raw()
62 mutex_lock(&vb->lock); in vprbrd_iio_read_raw()
64 admsg->cmd = VPRBRD_ADC_CMD_GET; in vprbrd_iio_read_raw()
65 admsg->chan = chan->channel; in vprbrd_iio_read_raw()
66 admsg->val = 0x00; in vprbrd_iio_read_raw()
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Dat91_adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the ADC present in the Atmel AT91 evaluation boards.
40 #define AT91_ADC_TSAMOD (3 << 0) /* ADC mode */
41 #define AT91_ADC_TSAMOD_ADC_ONLY_MODE (0 << 0) /* ADC Mode */
105 #define AT91_ADC_ACR_PENDETSENS (0x3 << 0) /* pull-up resistor */
139 (st->registers->channel_base + (ch * 4))
141 (readl_relaxed(st->reg_base + reg))
143 (writel_relaxed(val, st->reg_base + reg))
157 * struct at91_adc_reg_desc - Various informations relative to registers
163 * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register
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Dberlin2-adc.c2 * Marvell Berlin2 ADC driver
6 * Antoine Tenart <antoine.tenart@free-electrons.com>
29 #define BERLIN2_SM_CTRL_ADC_SEL(x) ((x) << 5) /* 0-15 */
49 #define BERLIN2_SM_CTRL_TSEN_MODE_0_125 (0x0 << 22) /* 0-125 C */
50 #define BERLIN2_SM_CTRL_TSEN_MODE_10_50 (0x1 << 22) /* 10-50 C */
55 #define BERLIN2_SM_ADC_STATUS_DATA_RDY(x) BIT(x) /* 0-15 */
57 #define BERLIN2_SM_ADC_STATUS_INT_EN(x) (BIT(x) << 16) /* 0-15 */
94 BERLIN2_ADC_CHANNEL(4, IIO_VOLTAGE), /* reserved */
95 BERLIN2_ADC_CHANNEL(5, IIO_VOLTAGE), /* reserved */
103 BERLIN2_ADC_CHANNEL(7, IIO_VOLTAGE), /* reserved */
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Dad7606_spi.c1 // SPDX-License-Identifier: GPL-2.0
3 * AD7606 SPI ADC driver
25 * Range of channels from a group are stored in 2 registers.
27 * For channels from second group(8-15) the order is the same, only with
39 * Range for AD7606B channels are stored in registers starting with address 0x3.
40 * Each register stores range for 2 channels(4 bits per channel).
88 * 6 bits of address followed by one reserved bit. in ad7616_spi_rd_wr_cmd()
113 dev_err(&spi->dev, "SPI read error\n"); in ad7606_spi_read_block()
125 struct spi_device *spi = to_spi_device(st->dev); in ad7606_spi_reg_read()
128 .tx_buf = &st->d16[0], in ad7606_spi_reg_read()
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Daspeed-bmc-intel-s2600wf.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
9 compatible = "intel,s2600wf-bmc", "aspeed,ast2500";
12 stdout-path = &uart5;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 no-map;
31 iio-hwmon {
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Daspeed-bmc-opp-mowgli.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
9 compatible = "ibm,mowgli-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
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Daspeed-bmc-opp-lanyang.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
10 compatible = "inventec,lanyang-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 no-map;
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Daspeed-bmc-inspur-on5263m5.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
10 compatible = "inspur,on5263m5-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 no-map;
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Daspeed-bmc-facebook-wedge400.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include "ast2500-facebook-netbmc-common.dtsi"
10 compatible = "facebook,wedge400-bmc", "aspeed,ast2500";
14 * PCA9548 (2-0070) provides 8 channels connecting to
27 * PCA9548 (8-0070) provides 8 channels connecting to
40 * PCA9548 (11-0076) provides 8 channels connecting to
56 stdout-path = &uart1;
60 ast-adc-hwmon {
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Daspeed-bmc-microsoft-olympus.dts1 //SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g4.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
10 compatible = "microsoft,olympus-bmc", "aspeed,ast2400";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 no-map;
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Daspeed-bmc-opp-mihawk.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
9 compatible = "ibm,mihawk-bmc", "aspeed,ast2500";
59 stdout-path = &uart5;
67 reserved-memory {
68 #address-cells = <1>;
69 #size-cells = <1>;
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Daspeed-bmc-quanta-q71l.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3 #include "aspeed-g4.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "quanta,q71l-bmc", "aspeed,ast2400";
30 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
44 no-map;
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/kernel/linux/linux-5.10/include/dt-bindings/iio/
Dqcom,spmi-vadc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2012-2014,2018,2020 The Linux Foundation. All rights reserved.
9 /* Voltage ADC channels */
111 /* ADC channels for SPMI PMIC5 */
143 /* 30k pull-up1 */
161 /* 100k pull-up2 */
179 /* 400k pull-up3 */
207 /* Current and combined current/voltage channels */
224 /* ADC channels for ADC for PMIC7 */
249 /* 30k pull-up1 */
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Dqcom,spmi-adc7-pmr735a.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2020 The Linux Foundation. All rights reserved.
13 /* ADC channels for PMR735A_ADC for PMIC7 */
23 /* 100k pull-up2 */
Dqcom,spmi-adc7-pmr735b.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2020 The Linux Foundation. All rights reserved.
13 /* ADC channels for PMR735B_ADC for PMIC7 */
23 /* 100k pull-up2 */
/kernel/linux/linux-5.10/sound/mips/
Dad1843.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2003 Vivien Chappelier <vivien.chappelier@linux-mips.org>
9 * Copyright 1999 Silicon Graphics, Inc. All rights reserved.
35 ad1843_PDNO = { 0, 14, 1 }, /* Converter Power-Down Flag */
37 ad1843_RIG = { 2, 0, 4 }, /* Right ADC Input Gain */
38 ad1843_RMGE = { 2, 4, 1 }, /* Right ADC Mic Gain Enable */
39 ad1843_RSS = { 2, 5, 3 }, /* Right ADC Source Select */
40 ad1843_LIG = { 2, 8, 4 }, /* Left ADC Input Gain */
41 ad1843_LMGE = { 2, 12, 1 }, /* Left ADC Mic Gain Enable */
42 ad1843_LSS = { 2, 13, 3 }, /* Left ADC Source Select */
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/kernel/linux/linux-5.10/drivers/iio/dac/
Dad5592r-base.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * AD5592R Digital <-> Analog converters driver
5 * Copyright 2014-2016 Analog Devices Inc.
20 #include <dt-bindings/iio/adi,ad5592r.h>
22 #include "ad5592r-base.h"
30 mutex_lock(&st->gpio_lock); in ad5592r_gpio_get()
32 if (st->gpio_out & BIT(offset)) in ad5592r_gpio_get()
33 val = st->gpio_val; in ad5592r_gpio_get()
35 ret = st->ops->gpio_read(st, &val); in ad5592r_gpio_get()
37 mutex_unlock(&st->gpio_lock); in ad5592r_gpio_get()
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dpm6150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
2 // Copyright (c) 2019, The Linux Foundation. All rights reserved.
4 #include <dt-bindings/iio/qcom,spmi-vadc.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/spmi/spmi.h>
8 #include <dt-bindings/thermal/thermal.h>
12 compatible = "qcom,pm6150", "qcom,spmi-pmic";
14 #address-cells = <1>;
15 #size-cells = <0>;
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/kernel/linux/linux-5.10/include/sound/
Demu10k1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 #include <sound/pcm-indirect.h>
25 /* ------------------- DEFINES -------------------- */
31 #define RESERVED 0 macro
33 #define NUM_G 64 /* use all channels */
37 /* FIXME? - according to the OSS driver the EMU10K1 needs a 29 bit DMA mask */
55 #define PTR_CHANNELNUM_MASK 0x0000003f /* For each per-channel register, indicates the */
57 /* accessed. For non per-channel registers the */
88 #define IPR_ADCBUFFULL 0x00008000 /* ADC buffer full */
89 #define IPR_ADCBUFHALFFULL 0x00004000 /* ADC buffer half full */
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