| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,keystone-rproc.txt | 1 TI Keystone DSP devices
4 The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core
5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
10 a dedicated local power/sleep controller etc. The DSP processor core in
13 DSP Device Node:
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
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| D | ti,k3-dsp-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI K3 DSP devices
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
19 controller, a dedicated local power/sleep controller etc. The DSP processor
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| /kernel/linux/linux-5.10/sound/soc/sof/intel/ |
| D | hda-dsp.c | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
15 * Hardware interface for generic Intel audio DSP HDA IP
21 #include "../sof-audio.h"
24 #include "hda-ipc.h"
30 "SOF HDA enable trace when the DSP is in D0I3 in S0");
34 * DSP Core control.
40 u32 reset; in hda_dsp_core_reset_enter() local
43 /* set reset bits for cores */ in hda_dsp_core_reset_enter()
44 reset = HDA_DSP_ADSPCS_CRST_MASK(core_mask); in hda_dsp_core_reset_enter()
47 reset, reset), in hda_dsp_core_reset_enter()
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| D | byt.c | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
12 * Hardware interface for audio DSP on Baytrail, Braswell and Cherrytrail.
20 #include "../sof-audio.h"
21 #include "../../intel/common/soc-intel-quirks.h"
23 /* DSP memories */
36 /* DSP peripherals */
98 u32 offset = sdev->dsp_oops_offset; in byt_get_registers()
106 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) { in byt_get_registers()
107 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", in byt_get_registers()
108 xoops->arch_hdr.totalsize); in byt_get_registers()
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| D | hda-ctrl.c | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
15 * Hardware interface for generic Intel audio DSP HDA IP
26 static int hda_codec_mask = -1;
35 int hda_dsp_ctrl_link_reset(struct snd_sof_dev *sdev, bool reset) in hda_dsp_ctrl_link_reset() argument
41 /* 0 to enter reset and 1 to exit reset */ in hda_dsp_ctrl_link_reset()
42 val = reset ? 0 : SOF_HDA_GCTL_RESET; in hda_dsp_ctrl_link_reset()
44 /* enter/exit HDA controller reset */ in hda_dsp_ctrl_link_reset()
48 /* wait to enter/exit reset */ in hda_dsp_ctrl_link_reset()
57 /* enter/exit reset failed */ in hda_dsp_ctrl_link_reset()
58 dev_err(sdev->dev, "error: failed to %s HDA controller gctl 0x%x\n", in hda_dsp_ctrl_link_reset()
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| D | bdw.c | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
12 * Hardware interface for audio DSP on Broadwell
20 #include "../sof-audio.h"
30 /* DSP memories for BDW */
43 /* DSP peripherals */
77 * DSP Control.
87 /* set DSP to RUN */ in bdw_run()
97 /* put DSP into reset and stall */ in bdw_reset()
102 /* keep in reset for 10ms */ in bdw_reset()
105 /* take DSP out of reset and keep stalled for FW loading */ in bdw_reset()
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| /kernel/linux/linux-5.10/drivers/remoteproc/ |
| D | ti_k3_dsp_remoteproc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI K3 DSP Remote Processor(s) driver
5 * Copyright (C) 2018-2020 Texas Instruments Incorporated - https://www.ti.com/
6 * Suman Anna <s-anna@ti.com>
14 #include <linux/omap-mailbox.h>
17 #include <linux/reset.h>
24 #define KEYSTONE_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
27 * struct k3_dsp_mem - internal memory structure
30 * @dev_addr: Device address of the memory region from DSP view
41 * struct k3_dsp_mem_data - memory definitions for a DSP
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| D | keystone_remoteproc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI Keystone DSP remoteproc driver
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
21 #include <linux/reset.h>
25 #define KEYSTONE_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
28 * struct keystone_rproc_mem - internal memory structure
31 * @dev_addr: Device address of the memory region from DSP view
42 * struct keystone_rproc - keystone remote processor driver structure
48 * @reset: reset control handle
61 struct reset_control *reset; member
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| D | da8xx_remoteproc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Remote processor machine-specific module for DA8XX
10 #include <linux/reset.h>
26 "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
29 * OMAP-L138 Technical References:
30 * http://www.ti.com/product/omap-l138
38 #define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
41 * struct da8xx_rproc_mem - internal memory structure
44 * @dev_addr: Device address of the memory region from DSP view
55 * struct da8xx_rproc - da8xx remote processor instance state
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| /kernel/linux/linux-5.10/sound/soc/intel/skylake/ |
| D | skl-sst-dsp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * skl-sst-dsp.c - SKL SST library generic function
5 * Copyright (C) 2014-15, Intel Corporation.
12 #include "../common/sst-dsp.h"
13 #include "../common/sst-ipc.h"
14 #include "../common/sst-dsp-priv.h"
24 mutex_lock(&ctx->mutex); in skl_dsp_set_state_locked()
25 ctx->sst_state = state; in skl_dsp_set_state_locked()
26 mutex_unlock(&ctx->mutex); in skl_dsp_set_state_locked()
32 * will be reset
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| D | cnl-sst-dsp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * cnl-sst-dsp.c - CNL SST library generic function
5 * Copyright (C) 2016-17, Intel Corporation.
10 * Copyright (C) 2014-15, Intel Corporation.
16 #include "../common/sst-dsp.h"
17 #include "../common/sst-ipc.h"
18 #include "../common/sst-dsp-priv.h"
19 #include "cnl-sst-dsp.h"
40 "Set reset"); in cnl_dsp_core_set_reset_state()
56 "Unset reset"); in cnl_dsp_core_unset_reset_state()
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | keystone-k2hk.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
33 compatible = "arm,cortex-a15";
39 compatible = "arm,cortex-a15";
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| D | keystone-k2l.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
42 /include/ "keystone-k2l-clocks.dtsi"
45 compatible = "ti,da830-uart", "ns16550a";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
41 '#gpio-cells':
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ti/davinci/ |
| D | psc.txt | 3 The PSC provides power management, clock gating and reset functionality. It is
7 - compatible: shall be one of:
8 - "ti,da850-psc0" for PSC0 on DA850/OMAP-L138/AM18XX
9 - "ti,da850-psc1" for PSC1 on DA850/OMAP-L138/AM18XX
10 - reg: physical base address and size of the controller's register area
11 - #clock-cells: from common clock binding; shall be set to 1
12 - #power-domain-cells: from generic power domain binding; shall be set to 1.
13 - clocks: phandles to clocks corresponding to the clock-names property
14 - clock-names: list of parent clock names - depends on compatible value
15 - for "ti,da850-psc0", shall be "pll0_sysclk1", "pll0_sysclk2",
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| /kernel/linux/linux-5.10/arch/arm/mach-sa1100/include/mach/ |
| D | shannon.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 #define SHANNON_GPIO_SPI_FLASH GPIO_GPIO (0) /* Output - Driven low, enables SPI to flash */
9 #define SHANNON_GPIO_SPI_DSP GPIO_GPIO (1) /* Output - Driven low, enables SPI to DSP */
10 /* lcd lower = GPIO 2-9 */
11 #define SHANNON_GPIO_SPI_OUTPUT GPIO_GPIO (10) /* Output - SPI output to DSP */
12 #define SHANNON_GPIO_SPI_INPUT GPIO_GPIO (11) /* Input - SPI input from DSP */
13 #define SHANNON_GPIO_SPI_CLOCK GPIO_GPIO (12) /* Output - Clock for SPI */
14 #define SHANNON_GPIO_SPI_FRAME GPIO_GPIO (13) /* Output - Frame marker - not used */
15 #define SHANNON_GPIO_SPI_RTS GPIO_GPIO (14) /* Input - SPI Ready to Send */
17 #define SHANNON_GPIO_SPI_CTS GPIO_GPIO (15) /* Output - SPI Clear to Send */
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| /kernel/linux/linux-5.10/arch/arc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
98 source "arch/arc/plat-tb10x/Kconfig"
99 source "arch/arc/plat-axs10x/Kconfig"
100 source "arch/arc/plat-hsdk/Kconfig"
118 ISA for the Next Generation ARC-HS cores
143 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
145 -Caches: New Prog Model, Region Flush
146 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
151 bool "ARC-HS"
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| /kernel/linux/linux-5.10/sound/soc/sof/ |
| D | pm.c | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
12 #include "sof-priv.h"
13 #include "sof-audio.h"
16 * Helper function to determine the target DSP state during
18 * D-states. Platform-specific substates, if any, should be
19 * handled by the platform-specific parts.
25 switch (sdev->system_suspend_target) { in snd_sof_dsp_power_target()
27 /* DSP should be in D3 if the system is suspending to S3 */ in snd_sof_dsp_power_target()
32 * Currently, the only criterion for retaining the DSP in D0 in snd_sof_dsp_power_target()
34 * Additional criteria such Soundwire clock-stop mode and in snd_sof_dsp_power_target()
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| D | sof-priv.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
28 #define SOF_DBG_RETAIN_CTX BIT(5) /* prevent DSP D3 on FW exception */
60 /* DSP power state */
72 u32 substate; /* platform-specific */
91 * SOF DSP HW abstraction operations.
92 * Used to abstract DSP HW architecture and any IO busses between host CPU
93 * and DSP device(s).
101 /* DSP core boot / reset */
104 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */ member
197 /* host read DSP stream data */
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| /kernel/linux/linux-5.10/sound/drivers/vx/ |
| D | vx_core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
31 * vx_check_reg_bit - wait for the specified bit is set/reset on a register
35 * @time: time-out of loop in msec
56 return -EIO; in snd_vx_check_reg_bit()
62 * vx_send_irq_dsp - set command irq bit
75 return -EIO; in vx_send_irq_dsp()
86 * vx_reset_chk - reset CHK bit on ISR
92 /* Reset irq CHK */ in vx_reset_chk()
94 return -EIO; in vx_reset_chk()
97 return -EIO; in vx_reset_chk()
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| /kernel/linux/linux-5.10/drivers/char/mwave/ |
| D | 3780i.h | 3 * 3780i.h -- declarations for 3780i.c
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
42 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
45 * 10/23/2000 - Alpha Release
54 /* DSP I/O port offsets and definitions */
62 #define DSP_MsaDataDSISHigh 0x0008 /* MSA data register: d-store word or high byte of i-stor…
63 #define DSP_MsaDataISLow 0x000A /* MSA data register: low word of i-store */
69 unsigned char SoftReset:1; /* RW: Soft reset 0=normal, 1=soft reset active */
76 unsigned short EnableDspInt:1; /* RW: Enable DSP to X86 ISA interrupt 0=mask it, 1=enable it */
84 /* DSP register indexes used with the configuration register address (index) register */
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| /kernel/linux/linux-5.10/include/linux/soundwire/ |
| D | sdw_intel.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
12 * the @params_stream callback, e.g. for interaction with DSP
25 * the @free_stream callback, e.g. for interaction with DSP
46 * struct sdw_intel_acpi_info - Soundwire Intel information found in ACPI tables
48 * @count: link count found with "sdw-master-count" property
49 * @link_mask: bit-wise mask listing links enabled by BIOS menu
63 /* Intel clock-stop/pm_runtime quirk definitions */
74 * reset and re-enumeration will be performed when the bus
76 * in-band wakes.
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| /kernel/linux/linux-5.10/sound/pci/pcxhr/ |
| D | pcxhr_hwdep.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
36 if (mgr->mono_capture) in pcxhr_init_board()
37 card_streams = mgr->capture_chips * 2; in pcxhr_init_board()
39 card_streams = mgr->capture_chips; in pcxhr_init_board()
40 card_streams += mgr->playback_chips * PCXHR_PLAYBACK_STREAMS; in pcxhr_init_board()
50 if ((rmh.stat[0] & MASK_FIRST_FIELD) < mgr->playback_chips * 2) in pcxhr_init_board()
51 return -EINVAL; in pcxhr_init_board()
54 mgr->capture_chips * 2) in pcxhr_init_board()
55 return -EINVAL; in pcxhr_init_board()
58 return -EINVAL; in pcxhr_init_board()
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| /kernel/linux/linux-5.10/sound/pci/asihpi/ |
| D | hpi6000.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 1997-2011 AudioScience Inc. <support@audioscience.com>
9 These PCI bus adapters are based on the TI C6711 DSP.
16 PROFILE_DSP2 get profile data from DSP2 if present (instead of DSP 1)
18 (C) Copyright AudioScience Inc. 1998-2003
74 /* can't access DSP HPI i/f */
76 /* can't access internal DSP memory */
78 /* can't access SDRAM - test#1 */
80 /* can't access SDRAM - test#2 */
210 switch (phm->function) { in subsys_message()
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| D | hpi6205.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 1997-2014 AudioScience Inc. <support@audioscience.com>
11 TMS320C6205 PCI bus mastering DSP,
12 and (except ASI50xx) TI TMS320C6xxx floating point DSP
17 (C) Copyright AudioScience Inc. 1998-2010
61 /* Host-to-DSP Control Register (HDCR) bitfields */
65 /* DSP Page Register (DSPP) bitfields, */
70 * BAR1 maps to non-prefetchable 8 Mbyte memory block
71 * of DSP memory mapped registers (starting at 0x01800000).
80 /* used to control LED (revA) and reset C6713 (revB) */
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