| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | rohm,bd71847-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
21 regulator-boot-on at least for BUCK5. LDO6 is supplied by it and it must
23 voltage monitoring for LDO5/LDO6 can cause PMIC to reset.
30 "^LDO[1-6]$":
37 regulator-name:
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| D | rohm,bd71828-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71828-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
25 "^LDO[1-7]$":
32 regulator-name:
33 pattern: "^ldo[1-7]$"
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| D | rohm,bd71837-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71837-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
21 regulator-boot-on at least for BUCK6 and BUCK7 so that those are not
23 if they are disabled at startup the voltage monitoring for LDO5/LDO6 will
31 "^LDO[1-7]$":
38 regulator-name:
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| /kernel/linux/linux-5.10/drivers/regulator/ |
| D | rohm-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/mfd/rohm-generic.h>
21 if (ret != -EINVAL) in set_dvs_level()
30 for (i = 0; i < desc->n_voltages; i++) { in set_dvs_level()
35 i <<= ffs(desc->vsel_mask) - 1; in set_dvs_level()
46 int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs, in rohm_regulator_set_dvs_levels() argument
53 unsigned int reg, mask, omask, oreg = desc->enable_reg; in rohm_regulator_set_dvs_levels()
59 if (dvs->level_map & bit) { in rohm_regulator_set_dvs_levels()
62 prop = "rohm,dvs-run-voltage"; in rohm_regulator_set_dvs_levels()
63 reg = dvs->run_reg; in rohm_regulator_set_dvs_levels()
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| D | bd71828-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 // bd71828-regulator.c ROHM BD71828GW-DS1 regulator driver
11 #include <linux/mfd/rohm-bd71828.h>
27 const struct rohm_dvs_config dvs; member
34 * DVS Buck voltages can be changed by register values or via GPIO.
112 dev_err(&rdev->dev, in bd71828_set_ramp_delay()
121 return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg + 2, in bd71828_set_ramp_delay()
123 val << (ffs(BD71828_MASK_RAMP_DELAY) - 1)); in bd71828_set_ramp_delay()
134 return rohm_regulator_set_dvs_levels(&data->dvs, np, desc, cfg->regmap); in buck_set_hw_dvs_levels()
144 struct regmap *regmap = cfg->regmap; in ldo6_parse_dt()
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| D | bd718x7-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // bd71837-regulator.c ROHM BD71837MWV/BD71847MWV regulator driver
9 #include <linux/mfd/rohm-bd718x7.h>
50 * controlled by software - or by PMIC internal HW state machine. Whether
51 * regulator should be under SW or HW control can be defined from device-tree.
83 * BUCK1RAMPRATE[1:0] BUCK1 DVS ramp rate setting
95 dev_dbg(&rdev->dev, "Buck[%d] Set Ramp = %d\n", id + 1, in bd718xx_buck1234_set_ramp_delay()
112 dev_err(&rdev->dev, in bd718xx_buck1234_set_ramp_delay()
114 rdev->desc->name, ramp_delay); in bd718xx_buck1234_set_ramp_delay()
117 return regmap_update_bits(rdev->regmap, BD718XX_REG_BUCK1_CTRL + id, in bd718xx_buck1234_set_ramp_delay()
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Voltage and Current Regulator Support"
6 Generic Voltage and Current Regulator support.
8 This framework is designed to provide a generic interface to voltage
10 provide voltage and current control to client or consumer drivers and
16 to both voltage regulators (where voltage output is controllable) and
34 tristate "Fixed voltage regulator support"
36 This driver provides support for fixed voltage regulators,
38 managed regulators and simple non-configurable regulators.
43 This driver provides a virtual consumer for the voltage and
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | rohm,bd71837-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
13 BD71837MWV is programmable Power Management ICs for powering single-core,
14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
35 "#clock-cells":
48 # crucial regulators must have the regulator-always-on and regulator-boot-on
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| D | rohm,bd71847-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic…
24 - rohm,bd71847
25 - rohm,bd71850
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | imx8mq-pico-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "TechNexion PICO-PI-8M";
16 compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
19 stdout-path = &uart1;
22 pmic_osc: clock-pmic {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <32768>;
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| D | imx8mq-phanbell.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2017-2019 NXP
6 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pmic_osc: clock-pmic {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <32768>;
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| D | imx8mq-librem5-devkit.dts | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "dt-bindings/pwm/pwm.h"
11 #include "dt-bindings/usb/pd.h"
16 compatible = "purism,librem5-devkit", "fsl,imx8mq";
18 backlight_dsi: backlight-dsi {
19 compatible = "pwm-backlight";
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| D | imx8mq-librem5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "dt-bindings/pwm/pwm.h"
11 #include "dt-bindings/usb/pd.h"
18 backlight_dsi: backlight-dsi {
19 compatible = "led-backlight";
23 pmic_osc: clock-pmic {
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| D | imx8mm-beacon-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 compatible = "mmc-pwrseq-simple";
9 pinctrl-names = "default";
10 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
11 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
13 clock-names = "ext_clock";
14 post-power-on-delay-ms = <80>;
24 cpu-supply = <&buck2_reg>;
28 operating-points-v2 = <&ddrc_opp_table>;
30 ddrc_opp_table: opp-table {
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| D | imx8mm-evk.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 stdout-path = &uart2;
22 compatible = "gpio-leds";
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_gpio_led>;
29 default-state = "on";
33 reg_usdhc2_vmmc: regulator-usdhc2 {
34 compatible = "regulator-fixed";
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| D | imx8mn-var-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2020 Variscite Ltd.
11 model = "Variscite VAR-SOM-MX8MN module";
12 compatible = "variscite,var-som-mx8mn", "fsl,imx8mn";
15 stdout-path = &uart4;
23 reg_eth_phy: regulator-eth-phy {
24 compatible = "regulator-fixed";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_reg_eth_phy>;
27 regulator-name = "eth_phy_pwr";
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| D | imx8mm-var-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 model = "Variscite VAR-SOM-MX8MM module";
11 compatible = "variscite,var-som-mx8mm", "fsl,imx8mm";
14 stdout-path = &uart4;
22 reg_eth_phy: regulator-eth-phy {
23 compatible = "regulator-fixed";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_reg_eth_phy>;
26 regulator-name = "eth_phy_pwr";
27 regulator-min-microvolt = <3300000>;
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| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | rohm-generic.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 * struct rohm_dvs_config - dynamic voltage scaling register descriptions
33 * @level_map: bitmap representing supported run-levels for this
38 * @idle_reg: register address for regulator config at 'idle' state
39 * @idle_mask: value mask for regulator voltages at 'idle' state
40 * @idle_on_mask: enable mask for regulator at 'idle' state
48 * Description of ROHM PMICs voltage configuration registers for different
69 int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs,
75 static inline int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs, in rohm_regulator_set_dvs_levels() argument
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | s5pv210-goni.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
13 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/input/input.h>
38 pmic_ap_clk: clock-0 {
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <32768>;
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| /kernel/linux/linux-5.10/drivers/cpufreq/ |
| D | brcmstb-avs-cpufreq.c | 3 * supports DVS or DVFS
19 * its name from the technique called "Adaptive Voltage Scaling".
20 * Adaptive voltage scaling was the original purpose of this firmware.
22 * adaptive voltage scaling. However, on some newer Broadcom SoCs, the
28 * technique called "Adaptive Voltage Scaling".
30 * The Broadcom STB AVS CPUfreq driver provides voltage and frequency
32 * DVFS. The AVS firmware is running on its own co-processor. The
34 * (SMP) systems which share clock and voltage across all CPUs.
36 * Actual voltage and frequency scaling is done solely by the AVS
37 * firmware. This driver does not change frequency or voltage itself.
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/ |
| D | tegra210-smaug.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
12 compatible = "google,smaug-rev8", "google,smaug-rev7",
13 "google,smaug-rev6", "google,smaug-rev5",
14 "google,smaug-rev4", "google,smaug-rev3",
15 "google,smaug-rev2", "google,smaug-rev1",
24 stdout-path = "serial0:115200n8";
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
| D | 0001_linux_arch.patch | 7 Change-Id: I8c7b42f8858212fb4b2d56a871d3f4d5afc73954
9 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
11 --- a/arch/arm64/Kconfig
13 @@ -183,7 +183,6 @@ config ARM64
17 - select HOLES_IN_ZONE
21 @@ -1023,6 +1022,9 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
31 @@ -1148,7 +1150,7 @@ config XEN
35 - int
40 @@ -1182,15 +1184,6 @@ config UNMAP_KERNEL_AT_EL0
44 -config MITIGATE_SPECTRE_BRANCH_HISTORY
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