| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | rohm,bd71847-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
20 Note that if BD71847 starts at RUN state you probably want to use
21 regulator-boot-on at least for BUCK5. LDO6 is supplied by it and it must
23 voltage monitoring for LDO5/LDO6 can cause PMIC to reset.
30 "^LDO[1-6]$":
[all …]
|
| D | rohm,bd71837-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71837-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
20 Note that if BD71837 starts at RUN state you probably want to use
21 regulator-boot-on at least for BUCK6 and BUCK7 so that those are not
23 if they are disabled at startup the voltage monitoring for LDO5/LDO6 will
31 "^LDO[1-7]$":
[all …]
|
| D | rohm,bd71828-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71828-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
25 "^LDO[1-7]$":
32 regulator-name:
33 pattern: "^ldo[1-7]$"
[all …]
|
| D | nxp,pca9450-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/nxp,pca9450-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robin Gong <yibin.gong@nxp.com>
18 https://www.nxp.com/docs/en/data-sheet/PCA9450DS.pdf
28 - nxp,pca9450a
29 - nxp,pca9450b
30 - nxp,pca9450c
44 "^LDO[1-5]$":
[all …]
|
| /kernel/linux/linux-5.10/drivers/regulator/ |
| D | rohm-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/mfd/rohm-generic.h>
21 if (ret != -EINVAL) in set_dvs_level()
30 for (i = 0; i < desc->n_voltages; i++) { in set_dvs_level()
35 i <<= ffs(desc->vsel_mask) - 1; in set_dvs_level()
46 int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs, in rohm_regulator_set_dvs_levels() argument
53 unsigned int reg, mask, omask, oreg = desc->enable_reg; in rohm_regulator_set_dvs_levels()
59 if (dvs->level_map & bit) { in rohm_regulator_set_dvs_levels()
62 prop = "rohm,dvs-run-voltage"; in rohm_regulator_set_dvs_levels()
63 reg = dvs->run_reg; in rohm_regulator_set_dvs_levels()
[all …]
|
| D | bd71828-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 // bd71828-regulator.c ROHM BD71828GW-DS1 regulator driver
11 #include <linux/mfd/rohm-bd71828.h>
27 const struct rohm_dvs_config dvs; member
34 * DVS Buck voltages can be changed by register values or via GPIO.
112 dev_err(&rdev->dev, in bd71828_set_ramp_delay()
121 return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg + 2, in bd71828_set_ramp_delay()
123 val << (ffs(BD71828_MASK_RAMP_DELAY) - 1)); in bd71828_set_ramp_delay()
134 return rohm_regulator_set_dvs_levels(&data->dvs, np, desc, cfg->regmap); in buck_set_hw_dvs_levels()
144 struct regmap *regmap = cfg->regmap; in ldo6_parse_dt()
[all …]
|
| D | bd718x7-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // bd71837-regulator.c ROHM BD71837MWV/BD71847MWV regulator driver
9 #include <linux/mfd/rohm-bd718x7.h>
50 * controlled by software - or by PMIC internal HW state machine. Whether
51 * regulator should be under SW or HW control can be defined from device-tree.
83 * BUCK1RAMPRATE[1:0] BUCK1 DVS ramp rate setting
95 dev_dbg(&rdev->dev, "Buck[%d] Set Ramp = %d\n", id + 1, in bd718xx_buck1234_set_ramp_delay()
112 dev_err(&rdev->dev, in bd718xx_buck1234_set_ramp_delay()
114 rdev->desc->name, ramp_delay); in bd718xx_buck1234_set_ramp_delay()
117 return regmap_update_bits(rdev->regmap, BD718XX_REG_BUCK1_CTRL + id, in bd718xx_buck1234_set_ramp_delay()
[all …]
|
| D | wm831x-dcdc.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 // wm831x-dcdc.c -- DC-DC buck converter driver for the WM831x series
63 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_get_mode()
64 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_get_mode()
84 return -EINVAL; in wm831x_dcdc_get_mode()
107 return -EINVAL; in wm831x_dcdc_set_mode_int()
117 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_mode()
118 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_set_mode()
127 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_suspend_mode()
128 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; in wm831x_dcdc_set_suspend_mode()
[all …]
|
| D | pca9450-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0
30 const struct pc9450_dvs_config dvs; member
56 .max_register = PCA9450_MAX_REGISTER - 1,
62 * BUCK1RAM[1:0] BUCK1 DVS ramp rate setting
91 return regmap_update_bits(rdev->regmap, PCA9450_REG_BUCK1CTRL + id * 3, in pca9450_dvs_set_ramp_delay()
184 if (ret == -EINVAL) in buck_set_dvs()
189 for (i = 0; i < desc->n_voltages; i++) { in buck_set_dvs()
194 i <<= ffs(desc->vsel_mask) - 1; in buck_set_dvs()
209 const struct pc9450_dvs_config *dvs = &data->dvs; in pca9450_set_dvs_levels() local
217 prop = "nxp,dvs-run-voltage"; in pca9450_set_dvs_levels()
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | rohm,bd71837-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
13 BD71837MWV is programmable Power Management ICs for powering single-core,
14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
35 "#clock-cells":
48 # crucial regulators must have the regulator-always-on and regulator-boot-on
[all …]
|
| D | rohm,bd71847-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic…
24 - rohm,bd71847
25 - rohm,bd71850
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | imx8mq-pico-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "TechNexion PICO-PI-8M";
16 compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
19 stdout-path = &uart1;
22 pmic_osc: clock-pmic {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <32768>;
[all …]
|
| D | imx8mq-phanbell.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2017-2019 NXP
6 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pmic_osc: clock-pmic {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <32768>;
[all …]
|
| D | imx8mq-librem5-devkit.dts | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "dt-bindings/pwm/pwm.h"
11 #include "dt-bindings/usb/pd.h"
16 compatible = "purism,librem5-devkit", "fsl,imx8mq";
18 backlight_dsi: backlight-dsi {
19 compatible = "pwm-backlight";
[all …]
|
| D | imx8mn-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "imx8mn-evk.dtsi"
10 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "fsl,imx8mn-evk", "fsl,imx8mn";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_pmic>;
23 interrupt-parent = <&gpio1>;
28 regulator-name = "BUCK1";
29 regulator-min-microvolt = <600000>;
[all …]
|
| D | imx8mq-librem5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "dt-bindings/pwm/pwm.h"
11 #include "dt-bindings/usb/pd.h"
18 backlight_dsi: backlight-dsi {
19 compatible = "led-backlight";
23 pmic_osc: clock-pmic {
[all …]
|
| D | imx8mm-beacon-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 compatible = "mmc-pwrseq-simple";
9 pinctrl-names = "default";
10 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
11 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
13 clock-names = "ext_clock";
14 post-power-on-delay-ms = <80>;
24 cpu-supply = <&buck2_reg>;
28 operating-points-v2 = <&ddrc_opp_table>;
30 ddrc_opp_table: opp-table {
[all …]
|
| D | imx8mm-evk.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 stdout-path = &uart2;
22 compatible = "gpio-leds";
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_gpio_led>;
29 default-state = "on";
33 reg_usdhc2_vmmc: regulator-usdhc2 {
34 compatible = "regulator-fixed";
[all …]
|
| D | imx8mn-var-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2020 Variscite Ltd.
11 model = "Variscite VAR-SOM-MX8MN module";
12 compatible = "variscite,var-som-mx8mn", "fsl,imx8mn";
15 stdout-path = &uart4;
23 reg_eth_phy: regulator-eth-phy {
24 compatible = "regulator-fixed";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_reg_eth_phy>;
27 regulator-name = "eth_phy_pwr";
[all …]
|
| D | imx8mm-var-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 model = "Variscite VAR-SOM-MX8MM module";
11 compatible = "variscite,var-som-mx8mm", "fsl,imx8mm";
14 stdout-path = &uart4;
22 reg_eth_phy: regulator-eth-phy {
23 compatible = "regulator-fixed";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_reg_eth_phy>;
26 regulator-name = "eth_phy_pwr";
27 regulator-min-microvolt = <3300000>;
[all …]
|
| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | rohm-generic.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 * struct rohm_dvs_config - dynamic voltage scaling register descriptions
33 * @level_map: bitmap representing supported run-levels for this
35 * @run_reg: register address for regulator config at 'run' state
36 * @run_mask: value mask for regulator voltages at 'run' state
37 * @run_on_mask: enable mask for regulator at 'run' state
48 * Description of ROHM PMICs voltage configuration registers for different
69 int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs,
75 static inline int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs, in rohm_regulator_set_dvs_levels() argument
|
| /kernel/linux/linux-5.10/drivers/cpufreq/ |
| D | s3c2416-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only
47 /* pseudo-frequency for dvs mode */
51 * it's essential to leave dvs, as some boards do not reconfigure the
61 /* S3C2416 only supports changing the voltage in the dvs-mode.
94 /* return our pseudo-frequency when in dvs mode */ in s3c2416_cpufreq_get_speed()
95 if (s3c_freq->is_dvs) in s3c2416_cpufreq_get_speed()
98 return clk_get_rate(s3c_freq->armclk) / 1000; in s3c2416_cpufreq_get_speed()
106 if (clk_get_rate(s3c_freq->armdiv) / 1000 != freq) { in s3c2416_cpufreq_set_armdiv()
107 ret = clk_set_rate(s3c_freq->armdiv, freq * 1000); in s3c2416_cpufreq_set_armdiv()
125 if (s3c_freq->is_dvs) { in s3c2416_cpufreq_enter_dvs()
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | rk3288-veyron-mickey.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
14 compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
15 "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
16 "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
17 "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
18 "google,veyron-mickey-rev0", "google,veyron-mickey",
21 vcc_5v: vcc-5v {
[all …]
|
| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
| D | 0001_linux_arch.patch | 7 Change-Id: I8c7b42f8858212fb4b2d56a871d3f4d5afc73954
9 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
11 --- a/arch/arm64/Kconfig
13 @@ -183,7 +183,6 @@ config ARM64
17 - select HOLES_IN_ZONE
21 @@ -1023,6 +1022,9 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
31 @@ -1148,7 +1150,7 @@ config XEN
32 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
35 - int
40 @@ -1182,15 +1184,6 @@ config UNMAP_KERNEL_AT_EL0
[all …]
|