Searched +full:hardware +full:- +full:triggered (Results 1 – 25 of 614) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | via686a.rst | 6 * Via VT82C686A, VT82C686B Southbridge Integrated Hardware Monitor
10 Addresses scanned: ISA in PCI-space encoded address
12 Datasheet: On request through web form (http://www.via.com.tw/en/resources/download-center/)
15 - Kyösti Mälkki <kmalkki@cc.hut.fi>,
16 - Mark D. Studebaker <mdsxyz123@yahoo.com>
17 - Bob Dougherty <bobd@stanford.edu>
18 - (Some conversion-factor data were contributed by
19 - Jonathan Teh Soon Yew <j.teh@iname.com>
20 - and Alex van Kaam <darkside@chello.nl>.)
23 -----------------
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| D | sis5595.rst | 6 * Silicon Integrated Systems Corp. SiS5595 Southbridge Hardware Monitor
10 Addresses scanned: ISA in PCI-space encoded address
18 - Kyösti Mälkki <kmalkki@cc.hut.fi>,
19 - Mark D. Studebaker <mdsxyz123@yahoo.com>,
20 - Aurelien Jarno <aurelien@aurel32.net> 2.6 port
22 SiS southbridge has a LM78-like chip integrated on the same IC.
55 -----------------
69 -----------
71 The SiS5595 southbridge has integrated hardware monitor functions. It also
72 has an I2C bus, but this driver only supports the hardware monitor. For the
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| D | lm78.rst | 6 * National Semiconductor LM78 / LM78-J
10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
20 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
28 - Frodo Looijaard <frodol@dds.nl>
29 - Jean Delvare <jdelvare@suse.de>
32 -----------
34 This driver implements support for the National Semiconductor LM78, LM78-J
35 and LM79. They are described as 'Microprocessor System Hardware Monitors'.
38 the LM78 and LM78-J are exactly identical. The LM79 has one more VID line,
45 Temperatures are measured in degrees Celsius. An alarm is triggered once
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| D | lm87.rst | 10 Addresses scanned: I2C 0x2c - 0x2e
18 Addresses scanned: I2C 0x2c - 0x2e
24 - Frodo Looijaard <frodol@dds.nl>,
25 - Philip Edelbrock <phil@netroedge.com>,
26 - Mark Studebaker <mdsxyz123@yahoo.com>,
27 - Stephen Rousset <stephen.rousset@rocketlogix.com>,
28 - Dan Eaton <dan.eaton@rocketlogix.com>,
29 - Jean Delvare <jdelvare@suse.de>,
30 - Original 2.6 port Jeff Oliver
33 -----------
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| D | gl518sm.rst | 21 - Frodo Looijaard <frodol@dds.nl>,
22 - Kyösti Mälkki <kmalkki@cc.hut.fi>
23 - Hong-Gunn Chew <hglinux@gunnet.org>
24 - Jean Delvare <jdelvare@suse.de>
27 -----------
46 situation. Measurements are guaranteed between -10 degrees and +110
47 degrees, with a accuracy of +/-3 degrees.
50 triggered if the rotation speed has dropped below a programmable limit. In
51 case when you have selected to turn fan1 off, no fan1 alarm is triggered.
59 An alarm is triggered if the voltage has crossed a programmable minimum or
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| D | lm80.rst | 10 Addresses scanned: I2C 0x28 - 0x2f
20 Addresses scanned: I2C 0x28 - 0x2f
28 - Frodo Looijaard <frodol@dds.nl>,
29 - Philip Edelbrock <phil@netroedge.com>
32 -----------
35 It is described as a 'Serial Interface ACPI-Compatible Microprocessor
36 System Hardware Monitor'. The LM96080 is a more recent incarnation,
48 is unclear about this). Measurements are guaranteed between -55 and
53 triggered if the rotation speed has dropped below a programmable limit. Fan
60 An alarm is triggered if the voltage has crossed a programmable minimum
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| D | smsc47m1.rst | 44 - Mark D. Studebaker <mdsxyz123@yahoo.com>,
45 - With assistance from Bruce Allen <ballen@uwm.edu>, and his
48 - http://www.lsc-group.phys.uwm.edu/%7Eballen/driver/
50 - Gabriele Gorla <gorlik@yahoo.com>,
51 - Jean Delvare <jdelvare@suse.de>
54 -----------
59 The LPC47M15x, LPC47M192 and LPC47M292 chips contain a full 'hardware
61 hardware monitoring block is not supported by this driver, use the
68 triggered if the rotation speed has dropped below a programmable limit. Fan
76 If an alarm triggers, it will remain triggered until the hardware register
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| D | it87.rst | 158 - Christophe Gauthron
159 - Jean Delvare <jdelvare@suse.de>
163 -----------------
176 misconfigured by BIOS - PWM values would be inverted. This option tries
180 Hardware Interfaces
181 -------------------
183 All the chips supported by this driver are LPC Super-I/O chips, accessed
184 through the LPC bus (ISA-like I/O ports). The IT8712F additionally has an
185 SMBus interface to the hardware monitoring functions. This driver no
192 -----------
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| D | w83791d.rst | 10 Addresses scanned: I2C 0x2c - 0x2f
12 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83791D_W83791Gb.pdf
22 - Frodo Looijaard <frodol@dds.nl>,
23 - Philip Edelbrock <phil@netroedge.com>,
24 - Mark Studebaker <mdsxyz123@yahoo.com>
28 - Shane Huang (Winbond),
29 - Rudolf Marek <r.marek@assembler.cz>
33 - Sven Anders <anders@anduras.de>
34 - Marc Hulsman <m.hulsman@tudelft.nl>
37 -----------------
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| D | adc128d818.rst | 17 -----------
27 Measurements are guaranteed between -55 and +125 degrees. The temperature
32 An alarm is triggered if the voltage has crossed a programmable minimum
38 If an alarm triggers, it will remain triggered until the hardware register
|
| D | pc87360.rst | 22 -----------------
27 - 0: None
28 - **1**: Forcibly enable internal voltage and temperature channels,
30 - 2: Forcibly enable all voltage and temperature channels, except in9
31 - 3: Forcibly enable all voltage and temperature channels, including in9
42 -----------
49 hardware monitoring chipsets, not only controlling and monitoring three fans,
56 PC87360 - 2 2 - 0xE1
57 PC87363 - 2 2 - 0xE8
58 PC87364 - 3 3 - 0xE4
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | spi-sprd-adi.txt | 3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
5 framework for its hardware implementation is alike to SPI bus and its timing
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
11 we can configure them to allow other hardware components to use it independently,
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
14 triggered by hardware components instead of ADI software channels.
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
17 channels, the first value specifies the hardware channel id which is used to
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/qcom/ |
| D | rpmh-rsc.txt | 2 ------------
7 val) pair and triggered. Messages in the TCS are then sent in sequence over an
10 The hardware block (Direct Resource Voter or DRV) is a part of the h/w entity
16 A TCS may be triggered from Linux or triggered by the F/W after all the CPUs
17 have powered off to facilitate idle power saving. TCS could be classified as -
19 ACTIVE /* Triggered by Linux */
20 SLEEP /* Triggered by F/W */
21 WAKE /* Triggered by F/W */
22 CONTROL /* Triggered by F/W */
24 The order in which they are described in the DT, should match the hardware
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | samsung-pinctrl.txt | 3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16 - "samsung,exynos3250-pinctrl": for Exynos3250 compatible pin-controller.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/ |
| D | nvidia,tegra124-soctherm.txt | 4 or interrupt-based thermal monitoring, CPU and GPU throttling based
10 - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
11 For Tegra132, must contain "nvidia,tegra132-soctherm".
12 For Tegra210, must contain "nvidia,tegra210-soctherm".
13 - reg : Should contain at least 2 entries for each entry in reg-names:
14 - SOCTHERM register set
15 - Tegra CAR register set: Required for Tegra124 and Tegra210.
16 - CCROC register set: Required for Tegra132.
17 - reg-names : Should contain at least 2 entries:
18 - soctherm-reg
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| /kernel/linux/linux-5.10/drivers/iio/buffer/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 tristate "IIO callback buffer used for push in-kernel interfaces"
10 Should be selected by any drivers that do in-kernel push
37 to another device in hardware. In this case buffers for data transfers
38 are handled by hardware.
51 tristate "Industrial I/O triggered buffer support"
55 Provides helper functions for setting up triggered buffers.
|
| /kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/ |
| D | vidioc-dqevent.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_DQEVENT - Dequeue event
46 .. flat-table:: struct v4l2_event
47 :header-rows: 0
48 :stub-columns: 0
51 * - __u32
52 - ``type``
53 - Type of the event, see :ref:`event-type`.
54 * - union {
55 - ``u``
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| D | ext-ctrls-flash.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _flash-controls:
17 .. _flash-controls-use-cases:
24 ------------------------------------------
34 Synchronised LED flash (hardware strobe)
35 ----------------------------------------
37 The synchronised LED flash is pre-programmed by the host (power and
46 ------------------
52 .. _flash-control-id:
55 -----------------
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interconnect/ |
| D | qcom,bcm-voter.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,bcm-voter.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm BCM-Voter Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
13 The Bus Clock Manager (BCM) is a dedicated hardware accelerator that manages
22 - qcom,bcm-voter
24 qcom,tcs-wait:
26 Optional mask of which TCSs (Triggered Command Sets) wait for completion
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| /kernel/linux/linux-5.10/Documentation/core-api/ |
| D | memory-allocation.rst | 35 :ref:`Documentation/core-api/mm-api.rst <mm-api-gfp-flags>` provides
43 direct reclaim may be triggered under memory pressure; the calling
52 * Untrusted allocations triggered from userspace should be a subject
66 example may be a hardware allocation that maps data directly into
78 :ref:`Documentation/core-api/gfp_mask-from-fs-io.rst <gfp_mask_from_fs_io>`.
81 used to ensure that the allocated memory is accessible by hardware
84 And even with hardware with restrictions it is preferable to use
88 ------------------------------
93 * ``GFP_KERNEL & ~__GFP_RECLAIM`` - optimistic allocation without _any_
99 * ``GFP_KERNEL & ~__GFP_DIRECT_RECLAIM`` (or ``GFP_NOWAIT``)- optimistic
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| /kernel/liteos_m/arch/include/ |
| D | los_interrupt.h | 2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
103 * @brief Delete hardware interrupt.
106 * This API is used to delete hardware interrupt.
110 * <li>The hardware interrupt module is usable only when the configuration item for hardware
112 * <li>Hardware interrupt number value range: [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. The value range
113 * applicable for a Cortex-A7 platform is [32,95].</li>
118 * @param hwiNum [IN] Type#HWI_HANDLE_T: hardware interrupt number. The value range applicable
119 * for a Cortex-A7 platform is [32,95].
120 * @param irqParam [IN] Type #HwiIrqParam *. ID of hardware interrupt which will base on
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,sci-intr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lokesh Vutla <lokeshvutla@ti.com>
13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
19 triggered or level triggered interrupts and that is fixed in hardware.
22 +----------------------+
24 +-------+ | +------+ +-----+ |
25 | GPIO |----------->| | irq0 | | 0 | | Host IRQ
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| D | nxp,lpc3220-mic.txt | 4 - compatible: "nxp,lpc3220-mic" or "nxp,lpc3220-sic".
5 - reg: should contain IC registers location and length.
6 - interrupt-controller: identifies the node as an interrupt controller.
7 - #interrupt-cells: the number of cells to define an interrupt, should be 2.
10 IRQ_TYPE_EDGE_RISING = low-to-high edge triggered,
11 IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered,
12 IRQ_TYPE_LEVEL_HIGH = active high level-sensitive,
13 IRQ_TYPE_LEVEL_LOW = active low level-sensitive.
17 - interrupts: empty for MIC interrupt controller, cascaded MIC
18 hardware interrupts for SIC1 and SIC2
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| D | img,pdc-intc.txt | 10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
34 - <1st-cell>: The interrupt-number that identifies the interrupt source.
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| /kernel/linux/linux-5.10/drivers/power/reset/ |
| D | ltc2952-poweroff.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maintainer: René Moll <linux@r-moll.nl>
8 * ----------------------------------------
9 * - Description
10 * ----------------------------------------
13 * Its function is to determine when a external shut down is triggered
18 * ----------------------------------------
19 * - GPIO
20 * ----------------------------------------
23 * - trigger (input)
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