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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/
Damlogic,meson-gx-pwrc.txt1 Amlogic Meson Power Controller
4 The Amlogic Meson SoCs embeds an internal Power domain controller.
6 VPU Power Domain
7 ----------------
13 power-domain.yaml
16 ---------------------
19 - compatible: should be one of the following :
20 - "amlogic,meson-gx-pwrc-vpu" for the Meson GX SoCs
21 - "amlogic,meson-g12a-pwrc-vpu" for the Meson G12A SoCs
22 - #power-domain-cells: should be 0
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Damlogic,meson-ee-pwrc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/power/amlogic,meson-ee-pwrc.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic Meson Everything-Else Power Domains
11 - Neil Armstrong <narmstrong@baylibre.com>
14 The Everything-Else Power Domains node should be the child of a syscon
17 - compatible: Should be the following:
18 "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
26 - amlogic,meson8-pwrc
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/power/meson-gxbb-power.h>
16 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
23 reserved-memory {
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Dmeson-gxm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gxl.dtsi"
10 compatible = "amlogic,meson-gxm";
13 cpu-map {
47 compatible = "arm,cortex-a53";
49 enable-method = "psci";
50 next-level-cache = <&l2>;
52 #cooling-cells = <2>;
57 compatible = "arm,cortex-a53";
59 enable-method = "psci";
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Dmeson-gxbb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include "meson-gx-mali450.dtsi"
8 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
10 #include <dt-bindings/clock/gxbb-clkc.h>
11 #include <dt-bindings/clock/gxbb-aoclkc.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
15 compatible = "amlogic,meson-gxbb";
19 compatible = "amlogic,meson-gxbb-usb2-phy";
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Dmeson-gxl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
18 compatible = "amlogic,meson-gxl-usb-ctrl";
21 #address-cells = <2>;
22 #size-cells = <2>;
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Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic Meson Display Controller
11 - Neil Armstrong <narmstrong@baylibre.com>
14 The Amlogic Meson Display controller is composed of several components
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
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Damlogic,meson-dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
14 - $ref: /schemas/sound/name-prefix.yaml#
17 The Amlogic Meson Synopsys Designware Integration is composed of
18 - A Synopsys DesignWare HDMI Controller IP
19 - A TOP control block controlling the Clocks and PHY
20 - A custom HDMI PHY in order to convert video to TMDS signal
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/kernel/linux/linux-5.10/drivers/soc/amlogic/
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_MESON_CANVAS) += meson-canvas.o
3 obj-$(CONFIG_MESON_CLK_MEASURE) += meson-clk-measure.o
4 obj-$(CONFIG_MESON_GX_SOCINFO) += meson-gx-socinfo.o
5 obj-$(CONFIG_MESON_GX_PM_DOMAINS) += meson-gx-pwrc-vpu.o
6 obj-$(CONFIG_MESON_MX_SOCINFO) += meson-mx-socinfo.o
7 obj-$(CONFIG_MESON_EE_PM_DOMAINS) += meson-ee-pwrc.o
8 obj-$(CONFIG_MESON_SECURE_PM_DOMAINS) += meson-secure-pwrc.o
Dmeson-ee-pwrc.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <linux/reset-controller.h>
17 #include <dt-bindings/power/meson8-power.h>
18 #include <dt-bindings/power/meson-axg-power.h>
19 #include <dt-bindings/power/meson-g12a-power.h>
20 #include <dt-bindings/power/meson-gxbb-power.h>
21 #include <dt-bindings/power/meson-sm1-power.h>
30 * AO-bus as syscon. 0x3a from GX translates to 0x02, 0x3b translates to 0x03
245 [PWRC_AXG_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, axg_pwrc_mem_vpu,
252 [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu,
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Dmeson-gx-pwrc-vpu.c5 * SPDX-License-Identifier: GPL-2.0+
52 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_power_off()
58 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_off()
63 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, in meson_gx_pwrc_vpu_power_off()
68 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_off()
74 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_gx_pwrc_vpu_power_off()
79 clk_disable_unprepare(pd->vpu_clk); in meson_gx_pwrc_vpu_power_off()
80 clk_disable_unprepare(pd->vapb_clk); in meson_gx_pwrc_vpu_power_off()
90 regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, in meson_g12a_pwrc_vpu_power_off()
96 regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, in meson_g12a_pwrc_vpu_power_off()
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Dmeson-clk-measure.c1 // SPDX-License-Identifier: GPL-2.0+
139 CLK_MSR_ID(46, "vpu"),
191 CLK_MSR_ID(46, "vpu"),
289 CLK_MSR_ID(46, "vpu"),
406 CLK_MSR_ID(46, "vpu"),
493 struct meson_msr *priv = clk_msr_id->priv; in meson_measure_id()
501 regmap_write(priv->regmap, MSR_CLK_REG0, 0); in meson_measure_id()
504 regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_DURATION, in meson_measure_id()
505 FIELD_PREP(MSR_DURATION, duration - 1)); in meson_measure_id()
508 regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_CLK_SRC, in meson_measure_id()
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/kernel/linux/patches/linux-5.10/unionpi_tiger_pacth/
Dlinux-5.10.patch1 diff -Naur a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
2 --- a/arch/arm/boot/Makefile 2022-05-27 17:20:13.781877650 +0800
3 +++ b/arch/arm/boot/Makefile 2022-05-31 11:56:47.693259679 +0800
4 @@ -16,6 +16,7 @@
12 @@ -24,10 +25,12 @@
13 ZRELADDR := $(zreladdr-y)
14 PARAMS_PHYS := $(params_phys-y)
15 INITRD_PHYS := $(initrd_phys-y)
16 +DTB_OBJS ?= $(dtb-y)
21 -targets := Image zImage xipImage bootpImage uImage
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/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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/kernel/linux/patches/linux-5.10/yangfan_patch/
Ddrivers.patch6 Change-Id: I9825adaa8537a316db8a1831e759a74223b9e428
7 ---
9 drivers/block/nbd.c | 6 -
12 drivers/clk/clk.c | 2 +-
13 drivers/clk/rockchip/Kconfig | 42 +-
15 drivers/clk/rockchip/clk-cpu.c | 92 +-
16 drivers/clk/rockchip/clk-ddr.c | 171 +-
17 drivers/clk/rockchip/clk-half-divider.c | 35 +-
18 drivers/clk/rockchip/clk-pll.c | 779 ++-
19 drivers/clk/rockchip/clk-rk3399.c | 589 +-
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