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/kernel/linux/linux-5.10/kernel/time/
Dtick-common.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains the base functions to manage periodic tick
6 * Copyright(C) 2005-2006, Thomas Gleixner <tglx@linutronix.de>
7 * Copyright(C) 2005-2007, Red Hat, Inc., Ingo Molnar
8 * Copyright(C) 2006-2007, Timesys Corp., Thomas Gleixner
23 #include "tick-internal.h"
26 * Tick devices
30 * Tick next event: keeps track of the tick time
44 * 2) Hand off the duty in the NOHZ idle case by setting the value to
56 static int tick_do_timer_boot_cpu __read_mostly = -1;
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Dclocksource.c1 // SPDX-License-Identifier: GPL-2.0+
15 #include <linux/tick.h>
18 #include "tick-internal.h"
22 * clocks_calc_mult_shift - calculate mult/shift factors for scaled math of clocks
27 * @maxsec: guaranteed runtime conversion range in seconds
32 * @to and @from are frequency values in HZ. For clock sources @to is
36 * The @maxsec conversion range argument controls the time frame in
38 * calculated mult and shift factors. This guarantees that no 64bit
57 sftacc--; in clocks_calc_mult_shift()
64 for (sft = 32; sft > 0; sft--) { in clocks_calc_mult_shift()
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Dtimekeeping.c1 // SPDX-License-Identifier: GPL-2.0
4 * timer.c, moved in commit 8524070b7982.
20 #include <linux/tick.h>
26 #include "tick-internal.h"
35 /* Update timekeeper when a tick has passed */
61 * struct tk_fast - NMI safe timekeeper
74 /* Suspend-time cycles value for halted fast timekeeper. */
91 * returns nanoseconds already so no conversion is required, hence mult=1
117 while (tk->tkr_mono.xtime_nsec >= ((u64)NSEC_PER_SEC << tk->tkr_mono.shift)) { in tk_normalize_xtime()
118 tk->tkr_mono.xtime_nsec -= (u64)NSEC_PER_SEC << tk->tkr_mono.shift; in tk_normalize_xtime()
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Dsched_clock.c1 // SPDX-License-Identifier: GPL-2.0
4 * counters to full 64-bit ns values.
23 * struct clock_data - all data needed for sched_clock() (including
30 * @rate: Tick rate of the registered clock.
34 * performance. In particular 'seq' and 'read_data[0]' (combined) should fit
35 * into a single 64-byte cache line.
47 static int irqtime = -1;
54 * We don't need to use get_jiffies_64 on 32-bit arches here in jiffy_sched_clock_read()
57 return (u64)(jiffies - INITIAL_JIFFIES); in jiffy_sched_clock_read()
91 cyc = (rd->read_sched_clock() - rd->epoch_cyc) & in sched_clock()
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/kernel/linux/linux-5.10/drivers/firmware/psci/
Dpsci_checker.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <linux/tick.h>
31 static int tos_resident_cpu = -1;
42 * "enable-method" property of each CPU in the DT, but given that there is no
43 * arch-specific way to check this, we assume that the DT is sensible.
47 int migrate_type = -1; in psci_ops_check()
52 return -EOPNOTSUPP; in psci_ops_check()
66 if (tos_resident_cpu == -1) in psci_ops_check()
67 pr_warn("UP Trusted OS resides on no online CPU\n"); in psci_ops_check()
85 /* Try to power down all CPUs in the mask. */ in down_and_up_cpus()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Darm,arch_timer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
17 The per-core architected timer is attached to a GIC to deliver its
18 per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
24 - items:
25 - enum:
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Darm,arch_timer_mmio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
22 - enum:
23 - arm,armv7-timer-mem
29 '#address-cells':
32 '#size-cells':
37 clock-frequency:
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/kernel/linux/linux-5.10/drivers/cpuidle/
Dcpuidle.c2 * cpuidle.c - core cpuidle infrastructure
4 * (C) 2006-2007 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
23 #include <linux/suspend.h>
24 #include <linux/tick.h>
52 return off || !initialized || !drv || !dev || !dev->enabled; in cpuidle_not_available()
56 * cpuidle_play_dead - cpu off-lining
58 * Returns in case of an error or no driver
67 return -ENODEV; in cpuidle_play_dead()
69 /* Find lowest-power state that supports long-term idle */ in cpuidle_play_dead()
70 for (i = drv->state_count - 1; i >= 0; i--) in cpuidle_play_dead()
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/kernel/linux/linux-5.10/arch/arm/mach-exynos/
Dsuspend.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
6 // Exynos - Suspend support
8 // Based on arch/arm/mach-s3c2410/pm.c
13 #include <linux/suspend.h>
23 #include <linux/soc/samsung/exynos-pmu.h>
24 #include <linux/soc/samsung/exynos-regs-pmu.h>
27 #include <asm/hardware/cache-l2x0.h>
31 #include <asm/suspend.h>
36 #define REG_TABLE_END (-1U)
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/kernel/linux/linux-5.10/kernel/sched/
Didle.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * tasks which are handled in sched/fair.c )
17 * sched_idle_set_state - Record idle state for the current CPU.
32 cpu_idle_force_poll--; in cpu_idle_poll_ctrl()
85 * default_idle_call - Default CPU idle routine.
105 * last -- this is very similar to the entry code. in default_idle_call()
135 return -EBUSY; in call_cpuidle_s2idle()
145 * update no idle residency and return. in call_cpuidle()
148 dev->last_residency_ns = 0; in call_cpuidle()
150 return -EBUSY; in call_cpuidle()
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/kernel/linux/linux-5.10/include/linux/
Dtimekeeper_internal.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 * struct tk_read_base - base structure for timekeeping readout
46 * struct timekeeper - Structure holding internal timekeeping values.
49 * @xtime_sec: Current CLOCK_REALTIME time in seconds
50 * @ktime_sec: Current CLOCK_MONOTONIC time in seconds
52 * @offs_real: Offset clock monotonic -> clock realtime
53 * @offs_boot: Offset clock monotonic -> clock boottime
54 * @offs_tai: Offset clock monotonic -> clock tai
55 * @tai_offset: The current UTC to TAI offset in seconds
58 * @next_leap_ktime: CLOCK_MONOTONIC time value of a pending leap-second
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/kernel/linux/linux-5.10/Documentation/timers/
Dhighres.rst5 Further information can be found in the paper of the OLS 2006 talk "hrtimers
8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
14 changes in the time(r) related Linux subsystems. Figure #1 (p. 2) shows the
19 switched to the name "clock event devices" in meantime.
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
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/kernel/linux/linux-5.10/drivers/net/ipa/
Dipa_endpoint.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2019-2020 Linaro Ltd.
12 #include <linux/dma-direction.h>
26 #define atomic_dec_not_zero(v) atomic_add_unless((v), -1, 0)
30 /* RX buffer is 1 page (or a power-of-2 contiguous pages) */
34 #define IPA_RX_BUFFER_OVERHEAD (PAGE_SIZE - SKB_MAX_ORDER(NET_SKB_PAD, 0))
36 /* Where to find the QMAP mux_id for a packet within modem-supplied metadata */
42 /** enum ipa_status_opcode - status element opcode hardware values */
50 /** enum ipa_status_exception - status element exception type */
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/kernel/linux/linux-5.10/arch/mips/alchemy/devboards/
Dpm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Alchemy Development Board example suspend userspace interface.
10 #include <linux/suspend.h>
12 #include <asm/mach-au1x00/au1000.h>
13 #include <asm/mach-au1x00/gpio-au1000.h>
14 #include <asm/mach-db1x00/bcsr.h>
17 * Generic suspend userspace interface for Alchemy development boards.
19 * can be used by userspace to en/disable all au1x-provided wakeup
54 /* setup 1Hz-timer-based wakeup: wait for reg access */ in db1x_pm_enter()
91 printk(KERN_ERR "db1x: no wakeup source activated!\n"); in db1x_pm_begin()
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/kernel/linux/linux-5.10/drivers/clocksource/
Dtimer-atlas7.c1 // SPDX-License-Identifier: GPL-2.0-or-later
81 ce->event_handler(ce); in sirfsoc_timer_interrupt()
86 /* read 64-bit timer counter */
113 /* enable the tick */ in sirfsoc_timer_set_next_event()
119 /* Oneshot is enabled in set_next_event */
138 for (i = 0; i < SIRFSOC_TIMER_REG_CNT - 2; i++) in sirfsoc_clocksource_resume()
141 writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 2], in sirfsoc_clocksource_resume()
143 writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 1], in sirfsoc_clocksource_resume()
158 .suspend = sirfsoc_clocksource_suspend,
178 ce->irq = irq; in sirfsoc_local_timer_starting_cpu()
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/kernel/linux/linux-5.10/Documentation/driver-api/pm/
Dcpuidle.rst1 .. SPDX-License-Identifier: GPL-2.0
16 Every time one of the logical CPUs in the system (the entities that appear to
19 there are no tasks to run on it except for the special "idle" task associated
23 depended on by it into an idle state in which they will draw less power.
25 However, there may be multiple different idle states that can be used in such a
26 situation in principle, so it may be necessary to find the most suitable one
29 subsystem in the kernel, called ``CPUIdle``.
32 principle, so the generic code that in principle need not depend on the hardware
33 or platform design details in it is separate from the code that interacts with
44 one of the logical CPUs in the system turns out to be idle. Its role is to
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/kernel/linux/linux-5.10/drivers/memory/tegra/
Dmc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
24 { .compatible = "nvidia,tegra20-mc-gart", .data = &tegra20_mc_soc },
27 { .compatible = "nvidia,tegra30-mc", .data = &tegra30_mc_soc },
30 { .compatible = "nvidia,tegra114-mc", .data = &tegra114_mc_soc },
33 { .compatible = "nvidia,tegra124-mc", .data = &tegra124_mc_soc },
36 { .compatible = "nvidia,tegra132-mc", .data = &tegra132_mc_soc },
39 { .compatible = "nvidia,tegra210-mc", .data = &tegra210_mc_soc },
51 spin_lock_irqsave(&mc->lock, flags); in tegra_mc_block_dma_common()
53 value = mc_readl(mc, rst->control) | BIT(rst->bit); in tegra_mc_block_dma_common()
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/kernel/liteos_m/components/power/
Dlos_pm.h2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without modification,
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
105 * Pm error code: Deep and shutdown must implement the Tick Timer related interface.
144 …UINT32 (*suspend)(UINT32 mode); /* The device enters low power consumption, Unlocked task scheduli… member
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/kernel/liteos_a/kernel/base/include/
Dlos_sched_pri.h2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without modification,
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 #define AFFI_MASK_TO_CPUID(mask) ((UINT16)((mask) - 1))
81 INT_NO_RESCH = 0x0, /* no needs to schedule */
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/kernel/liteos_a/kernel/base/core/
Dlos_task.c2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without modification,
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
107 (VOID)strncpy_s(g_mainTask[i].taskName, OS_TCB_NAME_LEN, name, OS_TCB_NAME_LEN - 1); in OsSetMainTask()
122 LOS_ListTailInsert(&g_taskRecycleList, &taskCB->pendList); in OsTaskInsertToRecycleList()
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/kernel/linux/linux-5.10/drivers/usb/host/
Dohci.h1 /* SPDX-License-Identifier: GPL-1.0+ */
6 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
27 /* first fields are hardware-specified */
41 __hc32 hwNextED; /* next ED in list */
49 struct ed *ed_prev; /* for non-interrupt EDs */
53 /* create --> IDLE --> OPER --> ... --> IDLE --> destroy
54 * usually: OPER --> UNLINK --> (IDLE | OPER) --> ...
69 /* HC may see EDs on rm_list until next frame (frame_no == tick) */
70 u16 tick; member
76 ((int) (ohci->wdh_cnt - ed->takeback_wdh_cnt) >= 0)
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/kernel/liteos_a/kernel/include/
Dlos_task.h2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without modification,
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
108 * Solution: Re-configure the task priority by referring to the priority range.
158 * Solution: Suspend the task after it is resumed.
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-h5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <arm/sunxi-h3-h5.dtsi>
6 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <0>;
14 compatible = "arm,cortex-a53";
17 enable-method = "psci";
19 clock-latency-ns = <244144>; /* 8 32k periods */
20 #cooling-cells = <2>;
24 compatible = "arm,cortex-a53";
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/kernel/linux/linux-5.10/drivers/idle/
Dintel_idle.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * intel_idle.c - native hardware idle loop for modern Intel processors
5 * Copyright (c) 2013 - 2020, Intel Corporation.
12 * in lieu of the legacy ACPI processor_idle driver. The intent is to
23 * for preventing entry into deep C-states
25 * CPU will flush caches as needed when entering a C-state via MWAIT
26 * (in contrast to entering ACPI C3, in which case the WBINVD
33 * ACPI has a .suspend hack to turn off deep c-statees during suspend
35 * Have not seen issues with suspend, but may need same workaround here.
39 /* un-comment DEBUG to enable pr_debug() statements */
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/kernel/linux/linux-5.10/arch/arm/mach-omap1/
Dpm.c2 * linux/arch/arm/mach-omap1/pm.c
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
38 #include <linux/suspend.h>
57 #include <linux/omap-dma.h>
58 #include <clocksource/timer-ti-dm.h>
91 return -EINVAL; in idle_store()
107 * a clock tick interrupt . .
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