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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dqcom,pdc.txt1 PDC interrupt controller
4 Power Domain Controller (PDC) that is on always-on domain. In addition to
10 controller PDC is next in hierarchy, followed by others. Drivers requiring
11 wakeup capabilities of their device interrupts routed through the PDC, must
12 specify PDC as their interrupt controller and request the PDC port associated
20 Definition: Should contain "qcom,<soc>-pdc" and "qcom,pdc"
21 - "qcom,sc7180-pdc": For SC7180
22 - "qcom,sdm845-pdc": For SDM845
27 Definition: Specifies the base physical address for PDC hardware.
35 The first element of the tuple is the PDC pin for the
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Dimg,pdc-intc.txt1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
4 representation of a PDC IRQ controller. This has a number of input interrupt
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
52 * TZ1090 PDC block
54 pdc: pdc@02006000 {
65 compatible = "img,pdc-intc";
82 * An SoC peripheral that is wired through the PDC.
86 interrupt-parent = <&pdc>;
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/kernel/linux/linux-5.10/sound/soc/atmel/
Datmel-pcm.h32 unsigned int xpr; /* PDC recv/trans pointer */
33 unsigned int xcr; /* PDC recv/trans counter */
34 unsigned int xnpr; /* PDC next recv/trans pointer */
35 unsigned int xncr; /* PDC next recv/trans counter */
36 unsigned int ptcr; /* PDC transfer control */
45 u32 pdc_enable; /* PDC recv/trans enable */
46 u32 pdc_disable; /* PDC recv/trans disable */
52 * PDC DMA operation. All fields except dma_intr_handler() are initialized
59 int pdc_xfer_size; /* PDC counter increment in bytes */
61 struct atmel_pdc_regs *pdc; /* PDC receive or transmit registers */ member
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Datmel-pcm-pdc.c168 /* re-start the PDC */ in atmel_pcm_dma_irq()
175 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_dma_irq()
177 ssc_writex(params->ssc->regs, params->pdc->xcr, in atmel_pcm_dma_irq()
184 /* Load the PDC next pointer and counter registers */ in atmel_pcm_dma_irq()
189 ssc_writex(params->ssc->regs, params->pdc->xnpr, in atmel_pcm_dma_irq()
191 ssc_writex(params->ssc->regs, params->pdc->xncr, in atmel_pcm_dma_irq()
276 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_trigger()
278 ssc_writex(params->ssc->regs, params->pdc->xcr, in atmel_pcm_trigger()
282 ssc_writex(params->ssc->regs, params->pdc->xnpr, in atmel_pcm_trigger()
284 ssc_writex(params->ssc->regs, params->pdc->xncr, in atmel_pcm_trigger()
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DMakefile3 snd-soc-atmel-pcm-pdc-objs := atmel-pcm-pdc.o
11 # pdc and dma need to both be built-in if any user of
14 obj-$(CONFIG_SND_ATMEL_SOC_SSC) += snd-soc-atmel-pcm-pdc.o
/kernel/linux/linux-5.10/arch/parisc/kernel/
Dprocessor.c27 #include <asm/pdc.h>
55 ** The code path not shared is how PDC hands control of the CPU to the OS.
102 txn_addr = dev->hpa.start; /* for legacy PDC */ in processor_probe()
141 * We'll care when we need to query PAT PDC about a CPU *after* in processor_probe()
241 #define p ((unsigned long *)&boot_cpu_data.pdc.model) in collect_boot_cpu_data()
242 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) { in collect_boot_cpu_data()
247 add_device_randomness(&boot_cpu_data.pdc.model, in collect_boot_cpu_data()
248 sizeof(boot_cpu_data.pdc.model)); in collect_boot_cpu_data()
252 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) { in collect_boot_cpu_data()
254 boot_cpu_data.pdc.versions); in collect_boot_cpu_data()
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Dpdc_cons.c3 * PDC Console support - ie use firmware to dump text via boot console
20 * The PDC console is a simple console, which can be used for debugging
24 * This code uses the ROM (=PDC) based functions to read and write characters
25 * from and to PDC's boot path.
40 #include <asm/pdc.h> /* for iodc_call() proto and friends */
150 * It is unregistered if the pdc console was not selected as the in pdc_console_tty_driver_init()
162 printk(KERN_INFO "PDC console driver not registered anymore, not creating %s\n", pdc_cons.name); in pdc_console_tty_driver_init()
166 printk(KERN_INFO "The PDC console driver is still registered, removing CON_BOOT flag\n"); in pdc_console_tty_driver_init()
189 printk(KERN_ERR "Unable to register the PDC console TTY driver\n"); in pdc_console_tty_driver_init()
228 /* register the pdc console */ in pdc_console_init_force()
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Dfirmware.c3 * arch/parisc/kernel/firmware.c - safe PDC access routines
5 * PDC == Processor Dependent Code
7 * See PDC documentation at
20 * guidelines when writing PDC wrappers:
22 * - the name of the pdc wrapper should match one of the macros
25 * - use the static PDC result buffers and "copyout" to structs
27 * - hold pdc_lock while in PDC or using static result buffers
30 * - the name of the struct used for pdc return values should equal
32 * corresponding PDC call
64 #include <asm/pdc.h>
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Dpacache.S10 * NOTE: fdc,fic, and pdc instructions that use base register modification
858 1: pdc,m r31(%r28)
859 pdc,m r31(%r28)
860 pdc,m r31(%r28)
861 pdc,m r31(%r28)
862 pdc,m r31(%r28)
863 pdc,m r31(%r28)
864 pdc,m r31(%r28)
865 pdc,m r31(%r28)
866 pdc,m r31(%r28)
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Dpdc_chassis.c3 * interfaces to Chassis Codes via PDC (firmware)
31 #include <asm/pdc.h>
57 * @pdc_chassis_old: 1 if old pdc chassis style
83 * As soon as a panic occurs, we should inform the PDC.
103 * As soon as a reboot occurs, we should inform the PDC.
150 * @retval: PDC call return value.
152 * Only machines with 64 bits PDC PAT and those reported in
155 * returns 0 if no error, -1 if no supported PDC is present or invalid message,
156 * else returns the appropriate PDC error code.
269 printk(KERN_INFO "Enabling PDC chassis warnings support v%s\n", in pdc_chassis_create_procfs()
Dinventory.c26 #include <asm/pdc.h>
35 ** DEBUG_PAT Dump details which PDC PAT provides about ranges/devices.
58 /* Determine the pdc "type" used on this machine */ in setup_pdc()
60 printk(KERN_INFO "Determining PDC firmware type: "); in setup_pdc()
71 * is a pdc pat box, or it is an older box. All 64 bit capable in setup_pdc()
72 * machines are either pdc pat boxes or they support PDC_SYSTEM_MAP. in setup_pdc()
127 #define PDC_PAGE_ADJ_SHIFT (PAGE_SHIFT - 12) /* pdc pages are always 4k */
137 * pdc info is bad in this case). in set_pmem_entry()
174 /* All of the PDC PAT specific code is 64-bit only */
193 long status; /* PDC return value status */ in pat_query_module()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dbrcm,iproc-pdc-mbox.txt1 The PDC driver manages data transfer to and from various offload engines
2 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
3 one device tree entry per block. On some chips, the PDC functionality is
7 - compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for
9 - reg: Should contain PDC registers location and length.
10 - interrupts: Should contain the IRQ line for the PDC.
19 compatible = "brcm,iproc-pdc-mbox";
20 reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
/kernel/linux/linux-5.10/drivers/mailbox/
Dbcm-pdc-mailbox.c7 * Broadcom PDC Mailbox Driver
8 * The PDC provides a ring based programming interface to one or more hardware
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
10 * cryptographic offload hardware. In some chips the PDC is referred to as MDE,
11 * and in others the FA2/FA+ hardware is used with this PDC driver.
13 * The PDC driver registers with the Linux mailbox framework as a mailbox
14 * controller, once for each PDC instance. Ring 0 for each PDC is registered as
15 * a mailbox channel. The PDC driver uses interrupts to determine when data
16 * transfers to and from an offload engine are complete. The PDC driver uses
20 * The PDC driver allows multiple messages to be pending in the descriptor
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/
Dqcom,pdc-global.yaml4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
7 title: Qualcomm PDC Global
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
21 - const: "qcom,sc7180-pdc-global"
22 - const: "qcom,sdm845-pdc-global"
26 - const: "qcom,sdm845-pdc-global"
44 compatible = "qcom,sdm845-pdc-global";
/kernel/linux/linux-5.10/drivers/irqchip/
Dqcom-pdc.c126 * active low interrupts to be handled at GIC, PDC has an inverter that inverts
148 * qcom_pdc_gic_set_type: Configure PDC for the interrupt
153 * If @type is edge triggered, forward that as Rising edge as PDC
155 * If @type is level, then forward that as level high as PDC
200 * When we change types the PDC can give a phantom interrupt. in qcom_pdc_gic_set_type()
215 .name = "PDC",
366 n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32)); in pdc_setup_pin_mapping()
378 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
383 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
388 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
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Dirq-imgpdc.c3 * IMG PowerDown Controller (PDC)
7 * Exposes the syswake and PDC peripheral wake interrupts to the system.
20 /* PDC interrupt register numbers */
31 /* PDC interrupt register field masks */
56 /* PDC interrupt constants */
66 * struct pdc_intc_priv - private pdc interrupt data.
70 * @syswake_irq: Shared PDC syswake IRQ number.
71 * @domain: IRQ domain for PDC peripheral and syswake IRQs.
72 * @pdc_base: Base of PDC registers.
74 * @lock: Lock to protect the PDC syswake registers and the cached
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/kernel/linux/linux-5.10/include/linux/
Datmel-ssc.h276 /* SSC PDC Receive Pointer Register */
279 /* SSC PDC Receive Counter Register */
282 /* SSC PDC Transmit Pointer Register */
285 /* SSC PDC Receive Next Pointer Register */
288 /* SSC PDC Receive Next Counter Register */
291 /* SSC PDC Transmit Counter Register */
294 /* SSC PDC Transmit Next Pointer Register */
297 /* SSC PDC Transmit Next Counter Register */
300 /* SSC PDC Transfer Control Register */
311 /* SSC PDC Transfer Status Register */
/kernel/linux/linux-5.10/drivers/tty/serial/
Datmel_serial.c117 bool use_pdc_rx; /* enable PDC receiver */
118 short pdc_rx_idx; /* current PDC RX buffer */
119 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
122 bool use_pdc_tx; /* enable PDC transmitter */
123 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
554 /* disable PDC transmit */ in atmel_stop_tx()
593 /* re-enable PDC transmit */ in atmel_start_tx()
615 /* enable PDC controller */ in atmel_start_rx()
633 /* disable PDC receive */ in atmel_stop_rx()
1315 * PDC receive. Just schedule the tasklet and let it in atmel_handle_receive()
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/kernel/linux/linux-5.10/arch/parisc/include/asm/
Dpdcpat.h63 /* PDC PAT CHASSIS LOG -- Platform logging & forward progress functions */
70 /* PDC PAT COMPLEX */
74 /* PDC PAT CPU -- CPU configuration within the protection domain */
89 /* PDC PAT EVENT -- Platform Events */
98 /* PDC PAT HPMC -- Cause processor to go into spin loop, and wait
104 #define PDC_PAT_HPMC_SET_PARAMS 1L /* Allows OS to specify intr which PDC
113 /* PDC PAT IO -- On-line services for I/O modules */
143 /* PDC PAT MEM -- Manage memory page deallocation */
168 /* PDC PAT NVOLATILE -- Access Non-Volatile Memory */
177 /* PDC PAT PD */
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Dpdc.h5 #include <uapi/asm/pdc.h>
14 extern unsigned long parisc_pat_pdc_cap; /* PDC capabilities (PAT) */
18 #define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
27 /* wrapper-functions from pdc.c */
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/
Dimgpdc-wdt.txt1 *ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT)
4 - compatible : Should be "img,pdc-wdt"
14 compatible = "img,pdc-wdt";
/kernel/linux/linux-5.10/drivers/reset/
Dreset-qcom-pdc.c12 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
26 .name = "pdc-reset",
109 { .compatible = "qcom,sdm845-pdc-global" },
123 MODULE_DESCRIPTION("Qualcomm PDC Reset Driver");
/kernel/linux/linux-5.10/drivers/parisc/
DKconfig114 bool "PDC chassis state codes support"
132 bool "PDC chassis warnings support"
146 tristate "PDC Stable Storage support"
151 variables (PDC non volatile variables such as Primary Boot Path,
Diosapic.c51 ** For PCI devices, "Legacy" PDC initializes the "INTERRUPT_LINE" register
53 ** The newer "PAT" firmware supports PDC calls which return tables.
57 ** One such PAT PDC call returns the "Interrupt Routing Table" (IRT).
128 #include <asm/pdc.h>
226 /* The IRT needs to be 8-byte aligned for the PDC call. in iosapic_alloc_irt()
266 long status; /* PDC return value status */ in iosapic_load_irt()
273 /* Use pat pdc routine to get interrupt routing table size */ in iosapic_load_irt()
300 ** C3000/J5000 (and similar) platforms with Sprockets PDC in iosapic_load_irt()
382 irt_cell = NULL; /* old PDC w/o iosapic */ in iosapic_init()
447 ** Legacy PDC already does this translation for us and stores it in INTR_LINE.
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/kernel/linux/linux-5.10/arch/parisc/include/uapi/asm/
Dpdc.h6 * PDC return values ...
7 * All PDC calls return a subset of these errors.
25 * PDC entry points...
31 #define PDC_CHASSIS 2 /* PDC-chassis functions */
44 #define PDC_MODEL 4 /* PDC model information call */
120 #define PDC_ADD_VALID 12 /* Memory validation PDC call */
179 #define PDC_ALLOC 24 /* allocate static storage for PDC & IODC */
259 /* Legacy PDC definitions for same stuff */
412 int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */
422 unsigned int mem_pdc; /* PDC entry point */
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