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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dmicrel-ksz90x1.txt8 Note that these settings are applied after any phy-specific fixup from
14 All skew control options are specified in picoseconds. The minimum
15 value is 0, the maximum value is 3000, and it can be specified in 200ps
17 skew values actually increase in 120ps steps, starting from -840ps. The
23 The following table shows the actual skew delay you will get for each of the
25 corresponding pad skew register:
27 Device Tree Value Delay Pad Skew Register Value
28 -----------------------------------------------------
29 0 -840ps 0000
30 200 -720ps 0001
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsama5d3xmb_gmac.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xmb_gmac.dtsi - Device Tree Include file for SAMA5D3x motherboard
13 phy-mode = "rgmii";
14 #address-cells = <1>;
15 #size-cells = <0>;
17 ethernet-phy@1 {
19 interrupt-parent = <&pioB>;
21 txen-skew-ps = <800>;
22 txc-skew-ps = <3000>;
23 rxdv-skew-ps = <400>;
[all …]
Dsama5d3xcm_cmp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d3xcm_cmp.dtsi - Device Tree Include file for SAMA5D36 CMP CPU Module
9 compatible = "atmel,sama5d3xcm-cmp", "atmel,sama5d3", "atmel,sama5";
12 stdout-path = "serial0:115200n8";
21 clock-frequency = <32768>;
25 clock-frequency = <12000000>;
32 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
37 compatible = "atmel,tcb-timer";
42 compatible = "atmel,tcb-timer";
48 phy-mode = "rgmii";
[all …]
Dsocfpga_cyclone5_de0_nano_soc.dts1 // SPDX-License-Identifier: GPL-2.0
9 model = "Terasic DE-0(Atlas)";
10 compatible = "terasic,de0-atlas", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
27 regulator_3_3v: 3-3-v-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "3.3V";
30 regulator-min-microvolt = <3300000>;
31 regulator-max-microvolt = <3300000>;
35 compatible = "gpio-leds";
[all …]
Dsocfpga_arria10_socdk.dtsi1 // SPDX-License-Identifier: GPL-2.0+
9 compatible = "altr,socfpga-arria10", "altr,socfpga";
18 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
31 label = "a10sr-led0";
36 label = "a10sr-led1";
41 label = "a10sr-led2";
46 label = "a10sr-led3";
51 ref_033v: 033-v-ref {
52 compatible = "regulator-fixed";
[all …]
Dsocfpga_cyclone5_sodia.dts1 // SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "macnica,sodia", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
29 regulator_3_3v: 3-3-v-regulator {
30 compatible = "regulator-fixed";
31 regulator-name = "3.3V";
32 regulator-min-microvolt = <3300000>;
33 regulator-max-microvolt = <3300000>;
[all …]
Dat91-dvk_su60_somc.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
12 compatible = "atmel,asoc-wm8904";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
16 atmel,model = "wm8904 @ DVK-SOM60";
17 atmel,audio-routing =
25 atmel,ssc-controller = <&ssc0>;
26 atmel,audio-codec = <&wm8904>;
35 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
[all …]
Dsocfpga_arria5_socdk.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "altr,socfpga-arria5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
53 regulator_3_3v: 3-3-v-regulator {
54 compatible = "regulator-fixed";
55 regulator-name = "3.3V";
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
63 phy-mode = "rgmii";
[all …]
Dsocfpga_cyclone5_socdk.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
53 regulator_3_3v: 3-3-v-regulator {
54 compatible = "regulator-fixed";
55 regulator-name = "3.3V";
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
67 phy-mode = "rgmii";
[all …]
Dsocfpga_cyclone5_sockit.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "terasic,socfpga-cyclone5-sockit", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
36 linux,default-trigger = "heartbeat";
42 linux,default-trigger = "heartbeat";
48 linux,default-trigger = "heartbeat";
54 linux,default-trigger = "heartbeat";
58 gpio-keys {
59 compatible = "gpio-keys";
[all …]
Dsocfpga_cyclone5_vining_fpga.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
68 regulator-usb-nrst {
69 compatible = "regulator-fixed";
70 regulator-name = "usb_nrst";
[all …]
Dam3874-iceboard.dts1 // SPDX-License-Identifier: GPL-2.0
12 * Copyright (c) 2019 Three-Speed Logic, Inc. <gsmecher@threespeedlogic.com>
15 /dts-v1/;
18 #include <dt-bindings/interrupt-controller/irq.h>
25 stdout-path = "serial1:115200n8";
35 compatible = "regulator-fixed";
36 regulator-name = "vmmcsd_fixed";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
39 regulator-always-on;
[all …]
Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
[all …]
Dimx6qdl-icore-rqs.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/imx6qdl-clock.h>
9 #include <dt-bindings/sound/fsl-imx-audmux.h>
17 reg_1p8v: regulator-1p8v {
18 compatible = "regulator-fixed";
19 regulator-name = "1P8V";
20 regulator-min-microvolt = <1800000>;
21 regulator-max-microvolt = <1800000>;
22 regulator-boot-on;
[all …]
Dimx6qdl-nit6xlite.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 stdout-path = &uart2;
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "regulator-fixed";
26 regulator-name = "2P5V";
27 regulator-min-microvolt = <2500000>;
[all …]
Dimx6qdl-nitrogen6x.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 stdout-path = &uart2;
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <0>;
26 compatible = "regulator-fixed";
28 regulator-name = "2P5V";
29 regulator-min-microvolt = <2500000>;
[all …]
Dimx6qdl-emcon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 or MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/input/input.h>
12 model = "emtrion SoM emCON-MX6";
13 compatible = "emtrion,emcon-mx6";
23 stdout-path = &uart1;
31 gpio-keys {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
[all …]
Dimx6qdl-nitrogen6_max.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 stdout-path = &uart2;
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "regulator-fixed";
26 regulator-name = "1P8V";
27 regulator-min-microvolt = <1800000>;
[all …]
Dimx6qdl-sabrelite.dtsi5 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/imx6qdl-clock.h>
44 #include <dt-bindings/gpio/gpio.h>
45 #include <dt-bindings/input/input.h>
49 stdout-path = &uart2;
58 compatible = "simple-bus";
59 #address-cells = <1>;
60 #size-cells = <0>;
63 compatible = "regulator-fixed";
65 regulator-name = "2P5V";
[all …]
Dimx6q-novena.dts2 * Copyright 2015 Sutajio Ko-Usagi PTE LTD
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
49 /dts-v1/;
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
56 compatible = "kosagi,imx6q-novena", "fsl,imx6q";
65 stdout-path = &uart2;
69 compatible = "pwm-backlight";
71 pinctrl-names = "default";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/intel/
Dsocfpga_agilex_socdk_nand.dts1 // SPDX-License-Identifier: GPL-2.0
18 stdout-path = "serial0:115200n8";
22 compatible = "gpio-leds";
48 clock-frequency = <25000000>;
60 phy-mode = "rgmii";
61 phy-handle = <&phy0>;
63 max-frame-size = <9000>;
66 #address-cells = <1>;
67 #size-cells = <0>;
68 compatible = "snps,dwmac-mdio";
[all …]
Dsocfpga_agilex_socdk.dts1 // SPDX-License-Identifier: GPL-2.0
18 stdout-path = "serial0:115200n8";
22 compatible = "gpio-leds";
48 clock-frequency = <25000000>;
60 phy-mode = "rgmii";
61 phy-handle = <&phy0>;
63 max-frame-size = <9000>;
66 #address-cells = <1>;
67 #size-cells = <0>;
68 compatible = "snps,dwmac-mdio";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10_socdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
19 stdout-path = "serial0:115200n8";
23 compatible = "gpio-leds";
46 ref_033v: 033-v-ref {
47 compatible = "regulator-fixed";
48 regulator-name = "0.33V";
49 regulator-min-microvolt = <330000>;
50 regulator-max-microvolt = <330000>;
56 clock-frequency = <25000000>;
61 sdmmca-ecc@ff8c8c00 {
[all …]
Dsocfpga_stratix10_socdk_nand.dts1 // SPDX-License-Identifier: GPL-2.0-only
19 stdout-path = "serial0:115200n8";
23 compatible = "gpio-leds";
46 ref_033v: 033-v-ref {
47 compatible = "regulator-fixed";
48 regulator-name = "0.33V";
49 regulator-min-microvolt = <330000>;
50 regulator-max-microvolt = <330000>;
56 clock-frequency = <25000000>;
61 sdmmca-ecc@ff8c8c00 {
[all …]
/kernel/linux/linux-5.10/drivers/net/phy/
Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
160 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
164 if (type && type->interrupt_level_mask) in kszphy_config_intr()
165 mask = type->interrupt_level_mask; in kszphy_config_intr()
177 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in kszphy_config_intr()
213 return -EINVAL; in kszphy_setup_led()
233 * unique (non-broadcast) address on a shared bus.
274 struct kszphy_priv *priv = phydev->priv; in kszphy_config_reset()
277 if (priv->rmii_ref_clk_sel) { in kszphy_config_reset()
[all …]

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