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/kernel/linux/linux-5.10/drivers/usb/serial/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
14 Please read <file:Documentation/usb/usb-serial.rst> for more
28 converter port as the system console (the system console is the
30 allows logins in single user mode). This could be useful if some
31 terminal or printer is connected to that serial port.
42 port, /dev/ttyUSB0, as system console.
50 read <file:Documentation/usb/usb-serial.rst> for more information on
61 - Suunto ANT+ USB device.
62 - Medtronic CareLink USB device
63 - Fundamental Software dongle.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/
Dthine,thc63lvd1024.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
15 streams to parallel data outputs. The chip supports single/dual input/output
19 Single or dual operation mode, output data mapping and DDR output modes are
33 The device can operate in single-link mode or dual-link mode. In
34 single-link mode, all pixels are received on port@0, and port@1 shall not
35 contain any endpoint. In dual-link mode, even-numbered pixels are
[all …]
Dsimple-bridge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Transparent non-programmable DRM bridges
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Maxime Ripard <mripard@kernel.org>
14 This binding supports transparent non-programmable bridges that don't require
15 any configuration, with a single input and a single output.
20 - items:
[all …]
/kernel/linux/linux-5.10/Documentation/usb/
Dusb-serial.rst44 ConnectTech WhiteHEAT 4 port converter
45 --------------------------------------
58 -----------------------------------------------
65 properly enumerated, assigned a port, and then communication _should_ be
72 This goes against the current documentation for pilot-xfer and other
76 When the device is connected, try talking to it on the second port
77 (this is usually /dev/ttyUSB1 if you do not have any other usb-serial
78 devices in the system.) The system log should tell you which port is
79 the port to use for the HotSync transfer. The "Generic" port can be used
85 kernel system log for information on which is the correct port to use.
[all …]
/kernel/linux/linux-5.10/Documentation/scsi/
Dbfa.rst1 .. SPDX-License-Identifier: GPL-2.0
8 ------------------
16 1657:0013:1657:0014 425 4Gbps dual port FC HBA
17 1657:0013:1657:0014 825 8Gbps PCIe dual port FC HBA
18 1657:0013:103c:1742 HP 82B 8Gbps PCIedual port FC HBA
19 1657:0013:103c:1744 HP 42B 4Gbps dual port FC HBA
20 1657:0017:1657:0014 415 4Gbps single port FC HBA
21 1657:0017:1657:0014 815 8Gbps single port FC HBA
22 1657:0017:103c:1741 HP 41B 4Gbps single port FC HBA
23 1657:0017:103c 1743 HP 81B 8Gbps single port FC HBA
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Drenesas,rza1-ports.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis
17 writing configuration values to per-port register sets.
18 Each "port" features up to 16 pins, each of them configurable for GPIO
19 function (port mode) or in alternate function mode.
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dam57xx-sbc-am57x.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Support for CompuLab SBC-AM57x single board computer
5 * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
9 #include "am57xx-cl-som-am57x.dts"
10 #include "compulab-sb-som.dtsi"
13 model = "CompuLab CL-SOM-AM57x on SB-SOM-AM57x";
14 …compatible = "compulab,sbc-am57x", "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", …
24 pinctrl-single,pins = <
31 pinctrl-single,pins = <
44 pinctrl-single,pins = <
[all …]
Domap4-panda-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2013 Texas Instruments Incorporated - https://www.ti.com/
5 #include <dt-bindings/input/input.h>
7 #include "omap4-mcpdm.dtsi"
15 reserved-memory {
16 #address-cells = <1>;
17 #size-cells = <1>;
20 dsp_memory_region: dsp-memory@98000000 {
21 compatible = "shared-dma-pool";
27 ipu_memory_region: ipu-memory@98800000 {
[all …]
Domap3-beagle-xm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
11 compatible = "ti,omap3-beagle-xm", "ti,omap3630", "ti,omap36xx", "ti,omap3";
15 cpu0-supply = <&vcc>;
32 #clock-cells = <0>;
33 compatible = "fixed-clock";
34 clock-frequency = <26000000>;
38 compatible = "gpio-leds";
42 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
[all …]
Domap3-igep0020-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "omap3-igep.dtsi"
10 #include "omap-gpmc-smsc9221.dtsi"
15 pinctrl-names = "default";
16 pinctrl-0 = <&leds_pins>;
17 compatible = "gpio-leds";
22 default-state = "on";
28 default-state = "off";
34 default-state = "off";
43 /* HS USB Port 1 Power */
[all …]
Domap3-cm-t3x.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Common support for CompuLab CM-T3x CoMs
14 compatible = "gpio-leds";
15 pinctrl-names = "default";
16 pinctrl-0 = <&green_led_pins>;
18 label = "cm-t3x:green";
20 linux,default-trigger = "heartbeat";
24 /* HS USB Port 1 Power */
26 compatible = "regulator-fixed";
27 regulator-name = "hsusb1_vbus";
[all …]
Domap4-sdp.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
9 #include "omap4-mcpdm.dtsi"
13 compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4";
26 vdd_eth: fixedregulator-vdd-eth {
27 pinctrl-names = "default";
28 pinctrl-0 = <&enet_enable_gpio>;
30 compatible = "regulator-fixed";
31 regulator-name = "VDD_ETH";
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/kernel/linux/linux-5.10/Documentation/ABI/stable/
Dsysfs-driver-ib_srp1 What: /sys/class/infiniband_srp/srp-<hca>-<port_number>/add_target
4 Contact: linux-rdma@vger.kernel.org
7 a comma-separated list of login parameters to this sysfs
10 * id_ext, a 16-digit hexadecimal number specifying the eight
11 byte identifier extension in the 16-byte SRP target port
12 identifier. The target port identifier is sent by ib_srp
14 * ioc_guid, a 16-digit hexadecimal number specifying the eight
15 byte I/O controller GUID portion of the 16-byte target port
17 * dgid, a 32-digit hexadecimal number specifying the
19 * pkey, a four-digit hexadecimal number specifying the
[all …]
/kernel/linux/linux-5.10/drivers/tty/serial/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
19 comment "Non-8250 serial port support"
22 tristate "ARM AMBA PL010 serial port support"
33 bool "Support for console on AMBA serial port"
39 messages and warnings and which allows logins in single user mode).
49 tristate "ARM AMBA PL011 serial port support"
60 bool "Support for console on AMBA serial port"
67 messages and warnings and which allows logins in single user mode).
89 bool "Early console using RISC-V SBI"
95 Support for early debug console using RISC-V SBI. This enables
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/
Dnvidia,tegra186-gpio.txt15 register set. These registers exist in a single contiguous block of physical
31 implemented by the SoC. Each GPIO is assigned to a port, and a port may control
32 a number of GPIOs. Thus, each GPIO is named according to an alphabetical port
33 name and an integer GPIO name within the port. For example, GPIO_PA0, GPIO_PN6,
37 implemented GPIOs within each port varies. GPIO registers within a controller
38 are grouped and laid out according to the port they affect.
40 The mapping from port name to the GPIO controller that implements that port, and
41 the mapping from port name to register offset within a controller, are both
42 extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h>
43 describes the port-level mapping. In that file, the naming convention for ports
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/
Dsrio.txt3 RapidIO port node:
5 - compatible
11 Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major
15 - reg
17 Value type: <prop-encoded-array>
22 - interrupts
24 Value type: <prop_encoded-array>
30 A single IRQ that handles error conditions is specified by this
31 property. (Typically shared with port-write).
33 - fsl,srio-rmu-handle:
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/
Dr8a77990-ebisu.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
26 stdout-path = "serial0:115200n8";
29 audio_clkout: audio-clkout {
32 * but needed to avoid cs2000/rcar_sound probe dead-lock
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
36 clock-frequency = <11289600>;
40 compatible = "pwm-backlight";
[all …]
/kernel/linux/linux-5.10/drivers/infiniband/ulp/srpt/
Dib_srpt.h2 * Copyright (c) 2006 - 2009 Mellanox Technology Inc. All rights reserved.
3 * Copyright (C) 2009 - 2010 Bart Van Assche <bvanassche@acm.org>.
15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
78 SRP_MTCH_ACTION = 0x03, /* MULTI-CHANNEL ACTION */
138 * enum srpt_command_state - SCSI command state managed by SRPT
162 * struct srpt_ioctx - shared SRPT I/O context information
178 * struct srpt_recv_ioctx - SRPT receive I/O context
196 * struct srpt_send_ioctx - SRPT send I/O context
201 * @s_rw_ctx: @rw_ctxs points here if only a single rw_ctx is needed.
[all …]
/kernel/linux/linux-5.10/samples/pktgen/
Dpktgen_sample01_simple.sh2 # SPDX-License-Identifier: GPL-2.0
5 # * pktgen sending with single thread and single interface
6 # * flow variation via random UDP source port
13 # - go look in parameters.sh to see which setting are avail
14 # - required param is the interface "-i" stored in $DEV
18 if [ -z "$DEST_IP" ]; then
19 [ -z "$IP6" ] && DEST_IP="198.18.0.42" || DEST_IP="FD00::1"
21 [ -z "$CLONE_SKB" ] && CLONE_SKB="0"
22 # Example enforce param "-m" for dst_mac
23 [ -z "$DST_MAC" ] && usage && err 2 "Must specify -m dst_mac"
[all …]
/kernel/linux/linux-5.10/Documentation/networking/dsa/
Dconfiguration.rst1 .. SPDX-License-Identifier: GPL-2.0
10 .. _dsa-config-showcases:
13 -----------------------
18 *single port*
19 Every switch port acts as a different configurable Ethernet port
22 Every switch port is part of one configurable Ethernet bridge
25 Every switch port except one upstream port is part of a configurable
27 The upstream port acts as different configurable Ethernet port.
32 Through DSA every port of a switch is handled like a normal linux Ethernet
33 interface. The CPU port is the switch port connected to an Ethernet MAC chip.
[all …]
/kernel/linux/linux-5.10/drivers/net/wan/
Dhd64570.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* SCA HD64570 register definitions - all addresses for mode 0 (8086 MPU)
42 /* MSCI channel (port) 0 registers - offset 0x20
43 MSCI channel (port) 1 registers - offset 0x40 */
77 /* Timer channel 0 (port 0 RX) registers - offset 0x60
78 Timer channel 1 (port 0 TX) registers - offset 0x68
79 Timer channel 2 (port 1 RX) registers - offset 0x70
80 Timer channel 3 (port 1 TX) registers - offset 0x78
88 #define TCNTL 0x00 /* Up-counter L */
89 #define TCNTH 0x01 /* Up-counter H */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/i2c/
Dst,st-mipid02.txt1 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
3 MIPID02 has two CSI-2 input ports, only one of those ports can be active at a
4 time. Active port input stream will be de-serialized and its content outputted
5 through PARALLEL output port.
6 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second
7 input port is a single lane 800Mbps. Both ports support clock and data lane
8 polarity swap. First port also supports data lane swap.
9 PARALLEL output port has a maximum width of 12 bits.
11 YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.
14 - compatible: shall be "st,st-mipid02"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dhisilicon-hns-nic.txt4 - compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
5 "hisilicon,hns-nic-v1" is for hip05.
6 "hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
7 - ae-handle: accelerator engine handle for hns,
9 see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
10 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can
11 connect to 8 PHYs. Port 0 to 1 are both used for administration purpose. They
17 port-id can be 2 to 7. Here is the diagram:
18 +-----+---------------+
20 +-+-+-+---+-+-+-+-+-+-+
[all …]
Dmarvell-orion-net.txt10 describes up to 3 ethernet port nodes within that controller. The reason for
11 the multiple levels is that the port registers are interleaved within a single
12 set of controller registers. Each port node describes port-specific properties.
16 only one port associated. Multiple ports are implemented as multiple single-port
23 - #address-cells: shall be 1.
24 - #size-cells: shall be 0.
25 - compatible: shall be one of "marvell,orion-eth", "marvell,kirkwood-eth".
26 - reg: address and length of the controller registers.
29 - clocks: phandle reference to the controller clock.
30 - marvell,tx-checksum-limit: max tx packet size for hardware checksum.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dti,da850-vpif.txt2 ----------------------
4 The TI Video Port InterFace (VPIF) is the primary component for video
12 - compatible: must be "ti,da850-vpif"
13 - reg: physical base address and length of the registers set for the device;
14 - interrupts: should contain IRQ line for the VPIF
18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
19 single 16-bit channel. It should contain one or two port child nodes
20 with child 'endpoint' node. If there are two ports then port@0 must
21 describe the input and port@1 output channels. Please refer to the
23 Documentation/devicetree/bindings/media/video-interfaces.txt.
[all …]

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