Searched +full:uniphier +full:- +full:pxs3 +full:- +full:ahci +full:- +full:phy (Results 1 – 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | socionext,uniphier-ahci-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier AHCI PHY
10 This describes the deivcetree bindings for PHY interfaces built into
11 AHCI controller implemented on Socionext UniPhier SoCs.
14 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
19 - socionext,uniphier-pxs2-ahci-phy
20 - socionext,uniphier-pxs3-ahci-phy
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/ |
| D | uniphier-reset.txt | 1 UniPhier glue reset controller
5 -----------------------------------
12 - compatible: Should be
13 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3
14 "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB3
15 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3
16 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3
17 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3
18 "socionext,uniphier-pro4-ahci-reset" - for Pro4 SoC AHCI
19 "socionext,uniphier-pxs2-ahci-reset" - for PXs2 SoC AHCI
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| /kernel/linux/linux-5.10/drivers/phy/socionext/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # PHY drivers for Socionext platforms.
7 tristate "UniPhier USB2 PHY driver"
13 Enable this to support USB PHY implemented on USB2 controller
14 on UniPhier SoCs. This driver provides interface to interact
15 with USB 2.0 PHY that is part of the UniPhier SoC.
16 In case of Pro4, it is necessary to specify this USB2 PHY instead
17 of USB3 HS-PHY.
20 tristate "UniPhier USB3 PHY driver"
25 Enable this to support USB PHY implemented in USB3 controller
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| D | phy-uniphier-ahci.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * phy-uniphier-ahci.c - PHY driver for UniPhier AHCI controller
4 * Copyright 2016-2020, Socionext Inc.
15 #include <linux/phy/phy.h>
35 /* for PXs2/PXs3 */
58 val = readl(priv->base + CKCTRL); in uniphier_ahciphy_pxs2_enable()
62 writel(val, priv->base + CKCTRL); in uniphier_ahciphy_pxs2_enable()
64 writel(val, priv->base + CKCTRL); in uniphier_ahciphy_pxs2_enable()
67 writel(val, priv->base + CKCTRL); in uniphier_ahciphy_pxs2_enable()
69 writel(val, priv->base + CKCTRL); in uniphier_ahciphy_pxs2_enable()
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