Searched +full:zynqmp +full:- +full:dpdma (Results 1 – 7 of 7) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dpdma.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Xilinx ZynqMP DisplayPort DMA Controller Device Tree Bindings10 These bindings describe the DMA engine included in the Xilinx ZynqMP16 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>19 - $ref: "../dma-controller.yaml#"22 "#dma-cells":25 The cell is the DMA channel ID (see dt-bindings/dma/xlnx-zynqmp-dpdma.h[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Xilinx ZynqMP DPDMA Engine driver5 * Copyright (C) 2015 - 2020 Xilinx, Inc.27 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>30 #include "../virt-dma.h"32 /* DPDMA registers */118 /* DPDMA descriptor fields */141 * struct xilinx_dpdma_hw_desc - DPDMA hardware descriptor179 * struct xilinx_dpdma_sw_desc - DPDMA software descriptor180 * @hw: DPDMA hardware descriptor[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */3 * ZynqMP Display Driver5 * Copyright (C) 2017 - 2020 Xilinx, Inc.8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>24 /* The DPDMA is limited to 44 bit addressing. */
1 // SPDX-License-Identifier: GPL-2.03 * ZynqMP Display Controller Driver5 * Copyright (C) 2017 - 2020 Xilinx, Inc.8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>27 #include <linux/dma-mapping.h>43 * --------45 * The display controller part of ZynqMP DP subsystem, made of the Audio/Video48 * +------------------------------------------------------------+49 * +--------+ | +----------------+ +-----------+ |[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Xilinx ZynqMP DisplayPort Subsystem10 The DisplayPort subsystem of Xilinx ZynqMP (Zynq UltraScale+ MPSoC)14 +------------------------------------------------------------+15 +--------+ | +----------------+ +-----------+ |16 | DPDMA | --->| | --> | Video | Video +-------------+ |17 | 4x vid | | | | | Rendering | -+--> | | | +------+[all …]
1 # SPDX-License-Identifier: GPL-2.0-only103 tristate "Analog Devices AXI-DMAC DMA support"109 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA129 bool "ST-Ericsson COH901318 DMA support"133 Enable support for ST-Ericsson COH 901 318 DMA.152 tristate "SA-11x0 DMA support"157 Support the DMA engine found on Intel StrongARM SA-1100 and158 SA-1110 SoCs. This DMA engine can only be used with on-chip216 This module can be found on Freescale Vybrid and LS-1 SoCs.259 Enable support for the IMG multi-threaded DMA controller (MDC).[all …]
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]