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1 /*
2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 
33 #include <net/flow_dissector.h>
34 #include <net/flow_offload.h>
35 #include <net/sch_generic.h>
36 #include <net/pkt_cls.h>
37 #include <net/tc_act/tc_gact.h>
38 #include <net/tc_act/tc_skbedit.h>
39 #include <linux/mlx5/fs.h>
40 #include <linux/mlx5/device.h>
41 #include <linux/rhashtable.h>
42 #include <linux/refcount.h>
43 #include <linux/completion.h>
44 #include <net/tc_act/tc_mirred.h>
45 #include <net/tc_act/tc_vlan.h>
46 #include <net/tc_act/tc_tunnel_key.h>
47 #include <net/tc_act/tc_pedit.h>
48 #include <net/tc_act/tc_csum.h>
49 #include <net/tc_act/tc_mpls.h>
50 #include <net/arp.h>
51 #include <net/ipv6_stubs.h>
52 #include <net/bareudp.h>
53 #include <net/bonding.h>
54 #include "en.h"
55 #include "en_rep.h"
56 #include "en/rep/tc.h"
57 #include "en/rep/neigh.h"
58 #include "en_tc.h"
59 #include "eswitch.h"
60 #include "fs_core.h"
61 #include "en/port.h"
62 #include "en/tc_tun.h"
63 #include "en/mapping.h"
64 #include "en/tc_ct.h"
65 #include "en/mod_hdr.h"
66 #include "lib/devcom.h"
67 #include "lib/geneve.h"
68 #include "lib/fs_chains.h"
69 #include "diag/en_tc_tracepoint.h"
70 #include <asm/div64.h>
71 
72 #define nic_chains(priv) ((priv)->fs.tc.chains)
73 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto)
74 #define MLX5E_TC_FLOW_BASE (MLX5E_TC_FLAG_LAST_EXPORTED_BIT + 1)
75 
76 enum {
77 	MLX5E_TC_FLOW_FLAG_INGRESS	= MLX5E_TC_FLAG_INGRESS_BIT,
78 	MLX5E_TC_FLOW_FLAG_EGRESS	= MLX5E_TC_FLAG_EGRESS_BIT,
79 	MLX5E_TC_FLOW_FLAG_ESWITCH	= MLX5E_TC_FLAG_ESW_OFFLOAD_BIT,
80 	MLX5E_TC_FLOW_FLAG_FT		= MLX5E_TC_FLAG_FT_OFFLOAD_BIT,
81 	MLX5E_TC_FLOW_FLAG_NIC		= MLX5E_TC_FLAG_NIC_OFFLOAD_BIT,
82 	MLX5E_TC_FLOW_FLAG_OFFLOADED	= MLX5E_TC_FLOW_BASE,
83 	MLX5E_TC_FLOW_FLAG_HAIRPIN	= MLX5E_TC_FLOW_BASE + 1,
84 	MLX5E_TC_FLOW_FLAG_HAIRPIN_RSS	= MLX5E_TC_FLOW_BASE + 2,
85 	MLX5E_TC_FLOW_FLAG_SLOW		= MLX5E_TC_FLOW_BASE + 3,
86 	MLX5E_TC_FLOW_FLAG_DUP		= MLX5E_TC_FLOW_BASE + 4,
87 	MLX5E_TC_FLOW_FLAG_NOT_READY	= MLX5E_TC_FLOW_BASE + 5,
88 	MLX5E_TC_FLOW_FLAG_DELETED	= MLX5E_TC_FLOW_BASE + 6,
89 	MLX5E_TC_FLOW_FLAG_CT		= MLX5E_TC_FLOW_BASE + 7,
90 	MLX5E_TC_FLOW_FLAG_L3_TO_L2_DECAP = MLX5E_TC_FLOW_BASE + 8,
91 };
92 
93 #define MLX5E_TC_MAX_SPLITS 1
94 
95 /* Helper struct for accessing a struct containing list_head array.
96  * Containing struct
97  *   |- Helper array
98  *      [0] Helper item 0
99  *          |- list_head item 0
100  *          |- index (0)
101  *      [1] Helper item 1
102  *          |- list_head item 1
103  *          |- index (1)
104  * To access the containing struct from one of the list_head items:
105  * 1. Get the helper item from the list_head item using
106  *    helper item =
107  *        container_of(list_head item, helper struct type, list_head field)
108  * 2. Get the contining struct from the helper item and its index in the array:
109  *    containing struct =
110  *        container_of(helper item, containing struct type, helper field[index])
111  */
112 struct encap_flow_item {
113 	struct mlx5e_encap_entry *e; /* attached encap instance */
114 	struct list_head list;
115 	int index;
116 };
117 
118 struct mlx5e_tc_flow {
119 	struct rhash_head	node;
120 	struct mlx5e_priv	*priv;
121 	u64			cookie;
122 	unsigned long		flags;
123 	struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1];
124 
125 	/* flows sharing the same reformat object - currently mpls decap */
126 	struct list_head l3_to_l2_reformat;
127 	struct mlx5e_decap_entry *decap_reformat;
128 
129 	/* Flow can be associated with multiple encap IDs.
130 	 * The number of encaps is bounded by the number of supported
131 	 * destinations.
132 	 */
133 	struct encap_flow_item encaps[MLX5_MAX_FLOW_FWD_VPORTS];
134 	struct mlx5e_tc_flow    *peer_flow;
135 	struct mlx5e_mod_hdr_handle *mh; /* attached mod header instance */
136 	struct mlx5e_hairpin_entry *hpe; /* attached hairpin instance */
137 	struct list_head	hairpin; /* flows sharing the same hairpin */
138 	struct list_head	peer;    /* flows with peer flow */
139 	struct list_head	unready; /* flows not ready to be offloaded (e.g due to missing route) */
140 	struct net_device	*orig_dev; /* netdev adding flow first */
141 	int			tmp_efi_index;
142 	struct list_head	tmp_list; /* temporary flow list used by neigh update */
143 	refcount_t		refcnt;
144 	struct rcu_head		rcu_head;
145 	struct completion	init_done;
146 	int tunnel_id; /* the mapped tunnel id of this flow */
147 	struct mlx5_flow_attr *attr;
148 };
149 
150 struct mlx5e_tc_flow_parse_attr {
151 	const struct ip_tunnel_info *tun_info[MLX5_MAX_FLOW_FWD_VPORTS];
152 	struct net_device *filter_dev;
153 	struct mlx5_flow_spec spec;
154 	struct mlx5e_tc_mod_hdr_acts mod_hdr_acts;
155 	int mirred_ifindex[MLX5_MAX_FLOW_FWD_VPORTS];
156 	struct ethhdr eth;
157 };
158 
159 #define MLX5E_TC_TABLE_NUM_GROUPS 4
160 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(18)
161 
162 struct mlx5e_tc_attr_to_reg_mapping mlx5e_tc_attr_to_reg_mappings[] = {
163 	[CHAIN_TO_REG] = {
164 		.mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_0,
165 		.moffset = 0,
166 		.mlen = 2,
167 	},
168 	[TUNNEL_TO_REG] = {
169 		.mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_1,
170 		.moffset = 1,
171 		.mlen = 3,
172 		.soffset = MLX5_BYTE_OFF(fte_match_param,
173 					 misc_parameters_2.metadata_reg_c_1),
174 	},
175 	[ZONE_TO_REG] = zone_to_reg_ct,
176 	[ZONE_RESTORE_TO_REG] = zone_restore_to_reg_ct,
177 	[CTSTATE_TO_REG] = ctstate_to_reg_ct,
178 	[MARK_TO_REG] = mark_to_reg_ct,
179 	[LABELS_TO_REG] = labels_to_reg_ct,
180 	[FTEID_TO_REG] = fteid_to_reg_ct,
181 	/* For NIC rules we store the retore metadata directly
182 	 * into reg_b that is passed to SW since we don't
183 	 * jump between steering domains.
184 	 */
185 	[NIC_CHAIN_TO_REG] = {
186 		.mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_B,
187 		.moffset = 0,
188 		.mlen = 2,
189 	},
190 	[NIC_ZONE_RESTORE_TO_REG] = nic_zone_restore_to_reg_ct,
191 };
192 
193 static void mlx5e_put_flow_tunnel_id(struct mlx5e_tc_flow *flow);
194 
195 void
mlx5e_tc_match_to_reg_match(struct mlx5_flow_spec * spec,enum mlx5e_tc_attr_to_reg type,u32 data,u32 mask)196 mlx5e_tc_match_to_reg_match(struct mlx5_flow_spec *spec,
197 			    enum mlx5e_tc_attr_to_reg type,
198 			    u32 data,
199 			    u32 mask)
200 {
201 	int soffset = mlx5e_tc_attr_to_reg_mappings[type].soffset;
202 	int match_len = mlx5e_tc_attr_to_reg_mappings[type].mlen;
203 	void *headers_c = spec->match_criteria;
204 	void *headers_v = spec->match_value;
205 	void *fmask, *fval;
206 
207 	fmask = headers_c + soffset;
208 	fval = headers_v + soffset;
209 
210 	mask = (__force u32)(cpu_to_be32(mask)) >> (32 - (match_len * 8));
211 	data = (__force u32)(cpu_to_be32(data)) >> (32 - (match_len * 8));
212 
213 	memcpy(fmask, &mask, match_len);
214 	memcpy(fval, &data, match_len);
215 
216 	spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2;
217 }
218 
219 void
mlx5e_tc_match_to_reg_get_match(struct mlx5_flow_spec * spec,enum mlx5e_tc_attr_to_reg type,u32 * data,u32 * mask)220 mlx5e_tc_match_to_reg_get_match(struct mlx5_flow_spec *spec,
221 				enum mlx5e_tc_attr_to_reg type,
222 				u32 *data,
223 				u32 *mask)
224 {
225 	int soffset = mlx5e_tc_attr_to_reg_mappings[type].soffset;
226 	int match_len = mlx5e_tc_attr_to_reg_mappings[type].mlen;
227 	void *headers_c = spec->match_criteria;
228 	void *headers_v = spec->match_value;
229 	void *fmask, *fval;
230 
231 	fmask = headers_c + soffset;
232 	fval = headers_v + soffset;
233 
234 	memcpy(mask, fmask, match_len);
235 	memcpy(data, fval, match_len);
236 
237 	*mask = be32_to_cpu((__force __be32)(*mask << (32 - (match_len * 8))));
238 	*data = be32_to_cpu((__force __be32)(*data << (32 - (match_len * 8))));
239 }
240 
241 int
mlx5e_tc_match_to_reg_set(struct mlx5_core_dev * mdev,struct mlx5e_tc_mod_hdr_acts * mod_hdr_acts,enum mlx5_flow_namespace_type ns,enum mlx5e_tc_attr_to_reg type,u32 data)242 mlx5e_tc_match_to_reg_set(struct mlx5_core_dev *mdev,
243 			  struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
244 			  enum mlx5_flow_namespace_type ns,
245 			  enum mlx5e_tc_attr_to_reg type,
246 			  u32 data)
247 {
248 	int moffset = mlx5e_tc_attr_to_reg_mappings[type].moffset;
249 	int mfield = mlx5e_tc_attr_to_reg_mappings[type].mfield;
250 	int mlen = mlx5e_tc_attr_to_reg_mappings[type].mlen;
251 	char *modact;
252 	int err;
253 
254 	err = alloc_mod_hdr_actions(mdev, ns, mod_hdr_acts);
255 	if (err)
256 		return err;
257 
258 	modact = mod_hdr_acts->actions +
259 		 (mod_hdr_acts->num_actions * MLX5_MH_ACT_SZ);
260 
261 	/* Firmware has 5bit length field and 0 means 32bits */
262 	if (mlen == 4)
263 		mlen = 0;
264 
265 	MLX5_SET(set_action_in, modact, action_type, MLX5_ACTION_TYPE_SET);
266 	MLX5_SET(set_action_in, modact, field, mfield);
267 	MLX5_SET(set_action_in, modact, offset, moffset * 8);
268 	MLX5_SET(set_action_in, modact, length, mlen * 8);
269 	MLX5_SET(set_action_in, modact, data, data);
270 	mod_hdr_acts->num_actions++;
271 
272 	return 0;
273 }
274 
275 #define esw_offloads_mode(esw) (mlx5_eswitch_mode(esw) == MLX5_ESWITCH_OFFLOADS)
276 
277 static struct mlx5_tc_ct_priv *
get_ct_priv(struct mlx5e_priv * priv)278 get_ct_priv(struct mlx5e_priv *priv)
279 {
280 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
281 	struct mlx5_rep_uplink_priv *uplink_priv;
282 	struct mlx5e_rep_priv *uplink_rpriv;
283 
284 	if (esw_offloads_mode(esw)) {
285 		uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
286 		uplink_priv = &uplink_rpriv->uplink_priv;
287 
288 		return uplink_priv->ct_priv;
289 	}
290 
291 	return priv->fs.tc.ct;
292 }
293 
294 struct mlx5_flow_handle *
mlx5_tc_rule_insert(struct mlx5e_priv * priv,struct mlx5_flow_spec * spec,struct mlx5_flow_attr * attr)295 mlx5_tc_rule_insert(struct mlx5e_priv *priv,
296 		    struct mlx5_flow_spec *spec,
297 		    struct mlx5_flow_attr *attr)
298 {
299 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
300 
301 	if (esw_offloads_mode(esw))
302 		return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
303 
304 	return	mlx5e_add_offloaded_nic_rule(priv, spec, attr);
305 }
306 
307 void
mlx5_tc_rule_delete(struct mlx5e_priv * priv,struct mlx5_flow_handle * rule,struct mlx5_flow_attr * attr)308 mlx5_tc_rule_delete(struct mlx5e_priv *priv,
309 		    struct mlx5_flow_handle *rule,
310 		    struct mlx5_flow_attr *attr)
311 {
312 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
313 
314 	if (esw_offloads_mode(esw)) {
315 		mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
316 
317 		return;
318 	}
319 
320 	mlx5e_del_offloaded_nic_rule(priv, rule, attr);
321 }
322 
323 struct mlx5e_hairpin {
324 	struct mlx5_hairpin *pair;
325 
326 	struct mlx5_core_dev *func_mdev;
327 	struct mlx5e_priv *func_priv;
328 	u32 tdn;
329 	u32 tirn;
330 
331 	int num_channels;
332 	struct mlx5e_rqt indir_rqt;
333 	u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
334 	struct mlx5e_ttc_table ttc;
335 };
336 
337 struct mlx5e_hairpin_entry {
338 	/* a node of a hash table which keeps all the  hairpin entries */
339 	struct hlist_node hairpin_hlist;
340 
341 	/* protects flows list */
342 	spinlock_t flows_lock;
343 	/* flows sharing the same hairpin */
344 	struct list_head flows;
345 	/* hpe's that were not fully initialized when dead peer update event
346 	 * function traversed them.
347 	 */
348 	struct list_head dead_peer_wait_list;
349 
350 	u16 peer_vhca_id;
351 	u8 prio;
352 	struct mlx5e_hairpin *hp;
353 	refcount_t refcnt;
354 	struct completion res_ready;
355 };
356 
357 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
358 			      struct mlx5e_tc_flow *flow);
359 
mlx5e_flow_get(struct mlx5e_tc_flow * flow)360 static struct mlx5e_tc_flow *mlx5e_flow_get(struct mlx5e_tc_flow *flow)
361 {
362 	if (!flow || !refcount_inc_not_zero(&flow->refcnt))
363 		return ERR_PTR(-EINVAL);
364 	return flow;
365 }
366 
mlx5e_flow_put(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow)367 static void mlx5e_flow_put(struct mlx5e_priv *priv,
368 			   struct mlx5e_tc_flow *flow)
369 {
370 	if (refcount_dec_and_test(&flow->refcnt)) {
371 		mlx5e_tc_del_flow(priv, flow);
372 		kfree_rcu(flow, rcu_head);
373 	}
374 }
375 
__flow_flag_set(struct mlx5e_tc_flow * flow,unsigned long flag)376 static void __flow_flag_set(struct mlx5e_tc_flow *flow, unsigned long flag)
377 {
378 	/* Complete all memory stores before setting bit. */
379 	smp_mb__before_atomic();
380 	set_bit(flag, &flow->flags);
381 }
382 
383 #define flow_flag_set(flow, flag) __flow_flag_set(flow, MLX5E_TC_FLOW_FLAG_##flag)
384 
__flow_flag_test_and_set(struct mlx5e_tc_flow * flow,unsigned long flag)385 static bool __flow_flag_test_and_set(struct mlx5e_tc_flow *flow,
386 				     unsigned long flag)
387 {
388 	/* test_and_set_bit() provides all necessary barriers */
389 	return test_and_set_bit(flag, &flow->flags);
390 }
391 
392 #define flow_flag_test_and_set(flow, flag)			\
393 	__flow_flag_test_and_set(flow,				\
394 				 MLX5E_TC_FLOW_FLAG_##flag)
395 
__flow_flag_clear(struct mlx5e_tc_flow * flow,unsigned long flag)396 static void __flow_flag_clear(struct mlx5e_tc_flow *flow, unsigned long flag)
397 {
398 	/* Complete all memory stores before clearing bit. */
399 	smp_mb__before_atomic();
400 	clear_bit(flag, &flow->flags);
401 }
402 
403 #define flow_flag_clear(flow, flag) __flow_flag_clear(flow, \
404 						      MLX5E_TC_FLOW_FLAG_##flag)
405 
__flow_flag_test(struct mlx5e_tc_flow * flow,unsigned long flag)406 static bool __flow_flag_test(struct mlx5e_tc_flow *flow, unsigned long flag)
407 {
408 	bool ret = test_bit(flag, &flow->flags);
409 
410 	/* Read fields of flow structure only after checking flags. */
411 	smp_mb__after_atomic();
412 	return ret;
413 }
414 
415 #define flow_flag_test(flow, flag) __flow_flag_test(flow, \
416 						    MLX5E_TC_FLOW_FLAG_##flag)
417 
mlx5e_is_eswitch_flow(struct mlx5e_tc_flow * flow)418 bool mlx5e_is_eswitch_flow(struct mlx5e_tc_flow *flow)
419 {
420 	return flow_flag_test(flow, ESWITCH);
421 }
422 
mlx5e_is_ft_flow(struct mlx5e_tc_flow * flow)423 static bool mlx5e_is_ft_flow(struct mlx5e_tc_flow *flow)
424 {
425 	return flow_flag_test(flow, FT);
426 }
427 
mlx5e_is_offloaded_flow(struct mlx5e_tc_flow * flow)428 static bool mlx5e_is_offloaded_flow(struct mlx5e_tc_flow *flow)
429 {
430 	return flow_flag_test(flow, OFFLOADED);
431 }
432 
get_flow_name_space(struct mlx5e_tc_flow * flow)433 static int get_flow_name_space(struct mlx5e_tc_flow *flow)
434 {
435 	return mlx5e_is_eswitch_flow(flow) ?
436 		MLX5_FLOW_NAMESPACE_FDB : MLX5_FLOW_NAMESPACE_KERNEL;
437 }
438 
439 static struct mod_hdr_tbl *
get_mod_hdr_table(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow)440 get_mod_hdr_table(struct mlx5e_priv *priv, struct mlx5e_tc_flow *flow)
441 {
442 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
443 
444 	return get_flow_name_space(flow) == MLX5_FLOW_NAMESPACE_FDB ?
445 		&esw->offloads.mod_hdr :
446 		&priv->fs.tc.mod_hdr;
447 }
448 
mlx5e_attach_mod_hdr(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,struct mlx5e_tc_flow_parse_attr * parse_attr)449 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
450 				struct mlx5e_tc_flow *flow,
451 				struct mlx5e_tc_flow_parse_attr *parse_attr)
452 {
453 	struct mlx5_modify_hdr *modify_hdr;
454 	struct mlx5e_mod_hdr_handle *mh;
455 
456 	mh = mlx5e_mod_hdr_attach(priv->mdev, get_mod_hdr_table(priv, flow),
457 				  get_flow_name_space(flow),
458 				  &parse_attr->mod_hdr_acts);
459 	if (IS_ERR(mh))
460 		return PTR_ERR(mh);
461 
462 	modify_hdr = mlx5e_mod_hdr_get(mh);
463 	flow->attr->modify_hdr = modify_hdr;
464 	flow->mh = mh;
465 
466 	return 0;
467 }
468 
mlx5e_detach_mod_hdr(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow)469 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
470 				 struct mlx5e_tc_flow *flow)
471 {
472 	/* flow wasn't fully initialized */
473 	if (!flow->mh)
474 		return;
475 
476 	mlx5e_mod_hdr_detach(priv->mdev, get_mod_hdr_table(priv, flow),
477 			     flow->mh);
478 	flow->mh = NULL;
479 }
480 
481 static
mlx5e_hairpin_get_mdev(struct net * net,int ifindex)482 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
483 {
484 	struct mlx5_core_dev *mdev;
485 	struct net_device *netdev;
486 	struct mlx5e_priv *priv;
487 
488 	netdev = dev_get_by_index(net, ifindex);
489 	if (!netdev)
490 		return ERR_PTR(-ENODEV);
491 
492 	priv = netdev_priv(netdev);
493 	mdev = priv->mdev;
494 	dev_put(netdev);
495 
496 	/* Mirred tc action holds a refcount on the ifindex net_device (see
497 	 * net/sched/act_mirred.c:tcf_mirred_get_dev). So, it's okay to continue using mdev
498 	 * after dev_put(netdev), while we're in the context of adding a tc flow.
499 	 *
500 	 * The mdev pointer corresponds to the peer/out net_device of a hairpin. It is then
501 	 * stored in a hairpin object, which exists until all flows, that refer to it, get
502 	 * removed.
503 	 *
504 	 * On the other hand, after a hairpin object has been created, the peer net_device may
505 	 * be removed/unbound while there are still some hairpin flows that are using it. This
506 	 * case is handled by mlx5e_tc_hairpin_update_dead_peer, which is hooked to
507 	 * NETDEV_UNREGISTER event of the peer net_device.
508 	 */
509 	return mdev;
510 }
511 
mlx5e_hairpin_create_transport(struct mlx5e_hairpin * hp)512 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
513 {
514 	u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {};
515 	void *tirc;
516 	int err;
517 
518 	err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
519 	if (err)
520 		goto alloc_tdn_err;
521 
522 	tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
523 
524 	MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
525 	MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
526 	MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
527 
528 	err = mlx5_core_create_tir(hp->func_mdev, in, &hp->tirn);
529 	if (err)
530 		goto create_tir_err;
531 
532 	return 0;
533 
534 create_tir_err:
535 	mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
536 alloc_tdn_err:
537 	return err;
538 }
539 
mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin * hp)540 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
541 {
542 	mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
543 	mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
544 }
545 
mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin * hp,void * rqtc)546 static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
547 {
548 	u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn;
549 	struct mlx5e_priv *priv = hp->func_priv;
550 	int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
551 
552 	mlx5e_build_default_indir_rqt(indirection_rqt, sz,
553 				      hp->num_channels);
554 
555 	for (i = 0; i < sz; i++) {
556 		ix = i;
557 		if (priv->rss_params.hfunc == ETH_RSS_HASH_XOR)
558 			ix = mlx5e_bits_invert(i, ilog2(sz));
559 		ix = indirection_rqt[ix];
560 		rqn = hp->pair->rqn[ix];
561 		MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
562 	}
563 }
564 
mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin * hp)565 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
566 {
567 	int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
568 	struct mlx5e_priv *priv = hp->func_priv;
569 	struct mlx5_core_dev *mdev = priv->mdev;
570 	void *rqtc;
571 	u32 *in;
572 
573 	inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
574 	in = kvzalloc(inlen, GFP_KERNEL);
575 	if (!in)
576 		return -ENOMEM;
577 
578 	rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
579 
580 	MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
581 	MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
582 
583 	mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
584 
585 	err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
586 	if (!err)
587 		hp->indir_rqt.enabled = true;
588 
589 	kvfree(in);
590 	return err;
591 }
592 
mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin * hp)593 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
594 {
595 	struct mlx5e_priv *priv = hp->func_priv;
596 	u32 in[MLX5_ST_SZ_DW(create_tir_in)];
597 	int tt, i, err;
598 	void *tirc;
599 
600 	for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
601 		struct mlx5e_tirc_config ttconfig = mlx5e_tirc_get_default_config(tt);
602 
603 		memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
604 		tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
605 
606 		MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
607 		MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
608 		MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
609 		mlx5e_build_indir_tir_ctx_hash(&priv->rss_params, &ttconfig, tirc, false);
610 
611 		err = mlx5_core_create_tir(hp->func_mdev, in,
612 					   &hp->indir_tirn[tt]);
613 		if (err) {
614 			mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
615 			goto err_destroy_tirs;
616 		}
617 	}
618 	return 0;
619 
620 err_destroy_tirs:
621 	for (i = 0; i < tt; i++)
622 		mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
623 	return err;
624 }
625 
mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin * hp)626 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
627 {
628 	int tt;
629 
630 	for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
631 		mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
632 }
633 
mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin * hp,struct ttc_params * ttc_params)634 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
635 					 struct ttc_params *ttc_params)
636 {
637 	struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
638 	int tt;
639 
640 	memset(ttc_params, 0, sizeof(*ttc_params));
641 
642 	ttc_params->any_tt_tirn = hp->tirn;
643 
644 	for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
645 		ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
646 
647 	ft_attr->max_fte = MLX5E_TTC_TABLE_SIZE;
648 	ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
649 	ft_attr->prio = MLX5E_TC_PRIO;
650 }
651 
mlx5e_hairpin_rss_init(struct mlx5e_hairpin * hp)652 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
653 {
654 	struct mlx5e_priv *priv = hp->func_priv;
655 	struct ttc_params ttc_params;
656 	int err;
657 
658 	err = mlx5e_hairpin_create_indirect_rqt(hp);
659 	if (err)
660 		return err;
661 
662 	err = mlx5e_hairpin_create_indirect_tirs(hp);
663 	if (err)
664 		goto err_create_indirect_tirs;
665 
666 	mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
667 	err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
668 	if (err)
669 		goto err_create_ttc_table;
670 
671 	netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
672 		   hp->num_channels, hp->ttc.ft.t->id);
673 
674 	return 0;
675 
676 err_create_ttc_table:
677 	mlx5e_hairpin_destroy_indirect_tirs(hp);
678 err_create_indirect_tirs:
679 	mlx5e_destroy_rqt(priv, &hp->indir_rqt);
680 
681 	return err;
682 }
683 
mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin * hp)684 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
685 {
686 	struct mlx5e_priv *priv = hp->func_priv;
687 
688 	mlx5e_destroy_ttc_table(priv, &hp->ttc);
689 	mlx5e_hairpin_destroy_indirect_tirs(hp);
690 	mlx5e_destroy_rqt(priv, &hp->indir_rqt);
691 }
692 
693 static struct mlx5e_hairpin *
mlx5e_hairpin_create(struct mlx5e_priv * priv,struct mlx5_hairpin_params * params,int peer_ifindex)694 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
695 		     int peer_ifindex)
696 {
697 	struct mlx5_core_dev *func_mdev, *peer_mdev;
698 	struct mlx5e_hairpin *hp;
699 	struct mlx5_hairpin *pair;
700 	int err;
701 
702 	hp = kzalloc(sizeof(*hp), GFP_KERNEL);
703 	if (!hp)
704 		return ERR_PTR(-ENOMEM);
705 
706 	func_mdev = priv->mdev;
707 	peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
708 	if (IS_ERR(peer_mdev)) {
709 		err = PTR_ERR(peer_mdev);
710 		goto create_pair_err;
711 	}
712 
713 	pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
714 	if (IS_ERR(pair)) {
715 		err = PTR_ERR(pair);
716 		goto create_pair_err;
717 	}
718 	hp->pair = pair;
719 	hp->func_mdev = func_mdev;
720 	hp->func_priv = priv;
721 	hp->num_channels = params->num_channels;
722 
723 	err = mlx5e_hairpin_create_transport(hp);
724 	if (err)
725 		goto create_transport_err;
726 
727 	if (hp->num_channels > 1) {
728 		err = mlx5e_hairpin_rss_init(hp);
729 		if (err)
730 			goto rss_init_err;
731 	}
732 
733 	return hp;
734 
735 rss_init_err:
736 	mlx5e_hairpin_destroy_transport(hp);
737 create_transport_err:
738 	mlx5_core_hairpin_destroy(hp->pair);
739 create_pair_err:
740 	kfree(hp);
741 	return ERR_PTR(err);
742 }
743 
mlx5e_hairpin_destroy(struct mlx5e_hairpin * hp)744 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
745 {
746 	if (hp->num_channels > 1)
747 		mlx5e_hairpin_rss_cleanup(hp);
748 	mlx5e_hairpin_destroy_transport(hp);
749 	mlx5_core_hairpin_destroy(hp->pair);
750 	kvfree(hp);
751 }
752 
hash_hairpin_info(u16 peer_vhca_id,u8 prio)753 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
754 {
755 	return (peer_vhca_id << 16 | prio);
756 }
757 
mlx5e_hairpin_get(struct mlx5e_priv * priv,u16 peer_vhca_id,u8 prio)758 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
759 						     u16 peer_vhca_id, u8 prio)
760 {
761 	struct mlx5e_hairpin_entry *hpe;
762 	u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
763 
764 	hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
765 			       hairpin_hlist, hash_key) {
766 		if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio) {
767 			refcount_inc(&hpe->refcnt);
768 			return hpe;
769 		}
770 	}
771 
772 	return NULL;
773 }
774 
mlx5e_hairpin_put(struct mlx5e_priv * priv,struct mlx5e_hairpin_entry * hpe)775 static void mlx5e_hairpin_put(struct mlx5e_priv *priv,
776 			      struct mlx5e_hairpin_entry *hpe)
777 {
778 	/* no more hairpin flows for us, release the hairpin pair */
779 	if (!refcount_dec_and_mutex_lock(&hpe->refcnt, &priv->fs.tc.hairpin_tbl_lock))
780 		return;
781 	hash_del(&hpe->hairpin_hlist);
782 	mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
783 
784 	if (!IS_ERR_OR_NULL(hpe->hp)) {
785 		netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
786 			   dev_name(hpe->hp->pair->peer_mdev->device));
787 
788 		mlx5e_hairpin_destroy(hpe->hp);
789 	}
790 
791 	WARN_ON(!list_empty(&hpe->flows));
792 	kfree(hpe);
793 }
794 
795 #define UNKNOWN_MATCH_PRIO 8
796 
mlx5e_hairpin_get_prio(struct mlx5e_priv * priv,struct mlx5_flow_spec * spec,u8 * match_prio,struct netlink_ext_ack * extack)797 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
798 				  struct mlx5_flow_spec *spec, u8 *match_prio,
799 				  struct netlink_ext_ack *extack)
800 {
801 	void *headers_c, *headers_v;
802 	u8 prio_val, prio_mask = 0;
803 	bool vlan_present;
804 
805 #ifdef CONFIG_MLX5_CORE_EN_DCB
806 	if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
807 		NL_SET_ERR_MSG_MOD(extack,
808 				   "only PCP trust state supported for hairpin");
809 		return -EOPNOTSUPP;
810 	}
811 #endif
812 	headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
813 	headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
814 
815 	vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
816 	if (vlan_present) {
817 		prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
818 		prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
819 	}
820 
821 	if (!vlan_present || !prio_mask) {
822 		prio_val = UNKNOWN_MATCH_PRIO;
823 	} else if (prio_mask != 0x7) {
824 		NL_SET_ERR_MSG_MOD(extack,
825 				   "masked priority match not supported for hairpin");
826 		return -EOPNOTSUPP;
827 	}
828 
829 	*match_prio = prio_val;
830 	return 0;
831 }
832 
mlx5e_hairpin_flow_add(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,struct mlx5e_tc_flow_parse_attr * parse_attr,struct netlink_ext_ack * extack)833 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
834 				  struct mlx5e_tc_flow *flow,
835 				  struct mlx5e_tc_flow_parse_attr *parse_attr,
836 				  struct netlink_ext_ack *extack)
837 {
838 	int peer_ifindex = parse_attr->mirred_ifindex[0];
839 	struct mlx5_hairpin_params params;
840 	struct mlx5_core_dev *peer_mdev;
841 	struct mlx5e_hairpin_entry *hpe;
842 	struct mlx5e_hairpin *hp;
843 	u64 link_speed64;
844 	u32 link_speed;
845 	u8 match_prio;
846 	u16 peer_id;
847 	int err;
848 
849 	peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
850 	if (IS_ERR(peer_mdev)) {
851 		NL_SET_ERR_MSG_MOD(extack, "invalid ifindex of mirred device");
852 		return PTR_ERR(peer_mdev);
853 	}
854 
855 	if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
856 		NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported");
857 		return -EOPNOTSUPP;
858 	}
859 
860 	peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
861 	err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio,
862 				     extack);
863 	if (err)
864 		return err;
865 
866 	mutex_lock(&priv->fs.tc.hairpin_tbl_lock);
867 	hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
868 	if (hpe) {
869 		mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
870 		wait_for_completion(&hpe->res_ready);
871 
872 		if (IS_ERR(hpe->hp)) {
873 			err = -EREMOTEIO;
874 			goto out_err;
875 		}
876 		goto attach_flow;
877 	}
878 
879 	hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
880 	if (!hpe) {
881 		mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
882 		return -ENOMEM;
883 	}
884 
885 	spin_lock_init(&hpe->flows_lock);
886 	INIT_LIST_HEAD(&hpe->flows);
887 	INIT_LIST_HEAD(&hpe->dead_peer_wait_list);
888 	hpe->peer_vhca_id = peer_id;
889 	hpe->prio = match_prio;
890 	refcount_set(&hpe->refcnt, 1);
891 	init_completion(&hpe->res_ready);
892 
893 	hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
894 		 hash_hairpin_info(peer_id, match_prio));
895 	mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
896 
897 	params.log_data_size = 15;
898 	params.log_data_size = min_t(u8, params.log_data_size,
899 				     MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
900 	params.log_data_size = max_t(u8, params.log_data_size,
901 				     MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
902 
903 	params.log_num_packets = params.log_data_size -
904 				 MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
905 	params.log_num_packets = min_t(u8, params.log_num_packets,
906 				       MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
907 
908 	params.q_counter = priv->q_counter;
909 	/* set hairpin pair per each 50Gbs share of the link */
910 	mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
911 	link_speed = max_t(u32, link_speed, 50000);
912 	link_speed64 = link_speed;
913 	do_div(link_speed64, 50000);
914 	params.num_channels = link_speed64;
915 
916 	hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
917 	hpe->hp = hp;
918 	complete_all(&hpe->res_ready);
919 	if (IS_ERR(hp)) {
920 		err = PTR_ERR(hp);
921 		goto out_err;
922 	}
923 
924 	netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
925 		   hp->tirn, hp->pair->rqn[0],
926 		   dev_name(hp->pair->peer_mdev->device),
927 		   hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
928 
929 attach_flow:
930 	if (hpe->hp->num_channels > 1) {
931 		flow_flag_set(flow, HAIRPIN_RSS);
932 		flow->attr->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
933 	} else {
934 		flow->attr->nic_attr->hairpin_tirn = hpe->hp->tirn;
935 	}
936 
937 	flow->hpe = hpe;
938 	spin_lock(&hpe->flows_lock);
939 	list_add(&flow->hairpin, &hpe->flows);
940 	spin_unlock(&hpe->flows_lock);
941 
942 	return 0;
943 
944 out_err:
945 	mlx5e_hairpin_put(priv, hpe);
946 	return err;
947 }
948 
mlx5e_hairpin_flow_del(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow)949 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
950 				   struct mlx5e_tc_flow *flow)
951 {
952 	/* flow wasn't fully initialized */
953 	if (!flow->hpe)
954 		return;
955 
956 	spin_lock(&flow->hpe->flows_lock);
957 	list_del(&flow->hairpin);
958 	spin_unlock(&flow->hpe->flows_lock);
959 
960 	mlx5e_hairpin_put(priv, flow->hpe);
961 	flow->hpe = NULL;
962 }
963 
964 struct mlx5_flow_handle *
mlx5e_add_offloaded_nic_rule(struct mlx5e_priv * priv,struct mlx5_flow_spec * spec,struct mlx5_flow_attr * attr)965 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,
966 			     struct mlx5_flow_spec *spec,
967 			     struct mlx5_flow_attr *attr)
968 {
969 	struct mlx5_flow_context *flow_context = &spec->flow_context;
970 	struct mlx5_fs_chains *nic_chains = nic_chains(priv);
971 	struct mlx5_nic_flow_attr *nic_attr = attr->nic_attr;
972 	struct mlx5e_tc_table *tc = &priv->fs.tc;
973 	struct mlx5_flow_destination dest[2] = {};
974 	struct mlx5_flow_act flow_act = {
975 		.action = attr->action,
976 		.flags    = FLOW_ACT_NO_APPEND,
977 	};
978 	struct mlx5_flow_handle *rule;
979 	struct mlx5_flow_table *ft;
980 	int dest_ix = 0;
981 
982 	flow_context->flags |= FLOW_CONTEXT_HAS_TAG;
983 	flow_context->flow_tag = nic_attr->flow_tag;
984 
985 	if (attr->dest_ft) {
986 		dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
987 		dest[dest_ix].ft = attr->dest_ft;
988 		dest_ix++;
989 	} else if (nic_attr->hairpin_ft) {
990 		dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
991 		dest[dest_ix].ft = nic_attr->hairpin_ft;
992 		dest_ix++;
993 	} else if (nic_attr->hairpin_tirn) {
994 		dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
995 		dest[dest_ix].tir_num = nic_attr->hairpin_tirn;
996 		dest_ix++;
997 	} else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
998 		dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
999 		if (attr->dest_chain) {
1000 			dest[dest_ix].ft = mlx5_chains_get_table(nic_chains,
1001 								 attr->dest_chain, 1,
1002 								 MLX5E_TC_FT_LEVEL);
1003 			if (IS_ERR(dest[dest_ix].ft))
1004 				return ERR_CAST(dest[dest_ix].ft);
1005 		} else {
1006 			dest[dest_ix].ft = priv->fs.vlan.ft.t;
1007 		}
1008 		dest_ix++;
1009 	}
1010 
1011 	if (dest[0].type == MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE &&
1012 	    MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level))
1013 		flow_act.flags |= FLOW_ACT_IGNORE_FLOW_LEVEL;
1014 
1015 	if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1016 		dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
1017 		dest[dest_ix].counter_id = mlx5_fc_id(attr->counter);
1018 		dest_ix++;
1019 	}
1020 
1021 	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1022 		flow_act.modify_hdr = attr->modify_hdr;
1023 
1024 	mutex_lock(&tc->t_lock);
1025 	if (IS_ERR_OR_NULL(tc->t)) {
1026 		/* Create the root table here if doesn't exist yet */
1027 		tc->t =
1028 			mlx5_chains_get_table(nic_chains, 0, 1, MLX5E_TC_FT_LEVEL);
1029 
1030 		if (IS_ERR(tc->t)) {
1031 			mutex_unlock(&tc->t_lock);
1032 			netdev_err(priv->netdev,
1033 				   "Failed to create tc offload table\n");
1034 			rule = ERR_CAST(priv->fs.tc.t);
1035 			goto err_ft_get;
1036 		}
1037 	}
1038 	mutex_unlock(&tc->t_lock);
1039 
1040 	if (attr->chain || attr->prio)
1041 		ft = mlx5_chains_get_table(nic_chains,
1042 					   attr->chain, attr->prio,
1043 					   MLX5E_TC_FT_LEVEL);
1044 	else
1045 		ft = attr->ft;
1046 
1047 	if (IS_ERR(ft)) {
1048 		rule = ERR_CAST(ft);
1049 		goto err_ft_get;
1050 	}
1051 
1052 	if (attr->outer_match_level != MLX5_MATCH_NONE)
1053 		spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;
1054 
1055 	rule = mlx5_add_flow_rules(ft, spec,
1056 				   &flow_act, dest, dest_ix);
1057 	if (IS_ERR(rule))
1058 		goto err_rule;
1059 
1060 	return rule;
1061 
1062 err_rule:
1063 	if (attr->chain || attr->prio)
1064 		mlx5_chains_put_table(nic_chains,
1065 				      attr->chain, attr->prio,
1066 				      MLX5E_TC_FT_LEVEL);
1067 err_ft_get:
1068 	if (attr->dest_chain)
1069 		mlx5_chains_put_table(nic_chains,
1070 				      attr->dest_chain, 1,
1071 				      MLX5E_TC_FT_LEVEL);
1072 
1073 	return ERR_CAST(rule);
1074 }
1075 
1076 static int
mlx5e_tc_add_nic_flow(struct mlx5e_priv * priv,struct mlx5e_tc_flow_parse_attr * parse_attr,struct mlx5e_tc_flow * flow,struct netlink_ext_ack * extack)1077 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
1078 		      struct mlx5e_tc_flow_parse_attr *parse_attr,
1079 		      struct mlx5e_tc_flow *flow,
1080 		      struct netlink_ext_ack *extack)
1081 {
1082 	struct mlx5_flow_attr *attr = flow->attr;
1083 	struct mlx5_core_dev *dev = priv->mdev;
1084 	struct mlx5_fc *counter = NULL;
1085 	int err;
1086 
1087 	if (flow_flag_test(flow, HAIRPIN)) {
1088 		err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack);
1089 		if (err)
1090 			return err;
1091 	}
1092 
1093 	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1094 		counter = mlx5_fc_create(dev, true);
1095 		if (IS_ERR(counter))
1096 			return PTR_ERR(counter);
1097 
1098 		attr->counter = counter;
1099 	}
1100 
1101 	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1102 		err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
1103 		dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
1104 		if (err)
1105 			return err;
1106 	}
1107 
1108 	if (flow_flag_test(flow, CT))
1109 		flow->rule[0] = mlx5_tc_ct_flow_offload(get_ct_priv(priv), flow, &parse_attr->spec,
1110 							attr, &parse_attr->mod_hdr_acts);
1111 	else
1112 		flow->rule[0] = mlx5e_add_offloaded_nic_rule(priv, &parse_attr->spec,
1113 							     attr);
1114 
1115 	return PTR_ERR_OR_ZERO(flow->rule[0]);
1116 }
1117 
mlx5e_del_offloaded_nic_rule(struct mlx5e_priv * priv,struct mlx5_flow_handle * rule,struct mlx5_flow_attr * attr)1118 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv,
1119 				  struct mlx5_flow_handle *rule,
1120 				  struct mlx5_flow_attr *attr)
1121 {
1122 	struct mlx5_fs_chains *nic_chains = nic_chains(priv);
1123 
1124 	mlx5_del_flow_rules(rule);
1125 
1126 	if (attr->chain || attr->prio)
1127 		mlx5_chains_put_table(nic_chains, attr->chain, attr->prio,
1128 				      MLX5E_TC_FT_LEVEL);
1129 
1130 	if (attr->dest_chain)
1131 		mlx5_chains_put_table(nic_chains, attr->dest_chain, 1,
1132 				      MLX5E_TC_FT_LEVEL);
1133 }
1134 
mlx5e_tc_del_nic_flow(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow)1135 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
1136 				  struct mlx5e_tc_flow *flow)
1137 {
1138 	struct mlx5_flow_attr *attr = flow->attr;
1139 	struct mlx5e_tc_table *tc = &priv->fs.tc;
1140 
1141 	flow_flag_clear(flow, OFFLOADED);
1142 
1143 	if (flow_flag_test(flow, CT))
1144 		mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), flow, attr);
1145 	else if (!IS_ERR_OR_NULL(flow->rule[0]))
1146 		mlx5e_del_offloaded_nic_rule(priv, flow->rule[0], attr);
1147 
1148 	/* Remove root table if no rules are left to avoid
1149 	 * extra steering hops.
1150 	 */
1151 	mutex_lock(&priv->fs.tc.t_lock);
1152 	if (!mlx5e_tc_num_filters(priv, MLX5_TC_FLAG(NIC_OFFLOAD)) &&
1153 	    !IS_ERR_OR_NULL(tc->t)) {
1154 		mlx5_chains_put_table(nic_chains(priv), 0, 1, MLX5E_TC_FT_LEVEL);
1155 		priv->fs.tc.t = NULL;
1156 	}
1157 	mutex_unlock(&priv->fs.tc.t_lock);
1158 
1159 	kvfree(attr->parse_attr);
1160 
1161 	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1162 		mlx5e_detach_mod_hdr(priv, flow);
1163 
1164 	mlx5_fc_destroy(priv->mdev, attr->counter);
1165 
1166 	if (flow_flag_test(flow, HAIRPIN))
1167 		mlx5e_hairpin_flow_del(priv, flow);
1168 
1169 	kfree(flow->attr);
1170 }
1171 
1172 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1173 			       struct mlx5e_tc_flow *flow, int out_index);
1174 
1175 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
1176 			      struct mlx5e_tc_flow *flow,
1177 			      struct net_device *mirred_dev,
1178 			      int out_index,
1179 			      struct netlink_ext_ack *extack,
1180 			      struct net_device **encap_dev,
1181 			      bool *encap_valid);
1182 static int mlx5e_attach_decap(struct mlx5e_priv *priv,
1183 			      struct mlx5e_tc_flow *flow,
1184 			      struct netlink_ext_ack *extack);
1185 static void mlx5e_detach_decap(struct mlx5e_priv *priv,
1186 			       struct mlx5e_tc_flow *flow);
1187 
1188 static struct mlx5_flow_handle *
mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch * esw,struct mlx5e_tc_flow * flow,struct mlx5_flow_spec * spec,struct mlx5_flow_attr * attr)1189 mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw,
1190 			   struct mlx5e_tc_flow *flow,
1191 			   struct mlx5_flow_spec *spec,
1192 			   struct mlx5_flow_attr *attr)
1193 {
1194 	struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts;
1195 	struct mlx5_flow_handle *rule;
1196 
1197 	if (attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)
1198 		return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
1199 
1200 	if (flow_flag_test(flow, CT)) {
1201 		mod_hdr_acts = &attr->parse_attr->mod_hdr_acts;
1202 
1203 		return mlx5_tc_ct_flow_offload(get_ct_priv(flow->priv),
1204 					       flow, spec, attr,
1205 					       mod_hdr_acts);
1206 	}
1207 
1208 	rule = mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
1209 	if (IS_ERR(rule))
1210 		return rule;
1211 
1212 	if (attr->esw_attr->split_count) {
1213 		flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, spec, attr);
1214 		if (IS_ERR(flow->rule[1])) {
1215 			mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
1216 			return flow->rule[1];
1217 		}
1218 	}
1219 
1220 	return rule;
1221 }
1222 
1223 static void
mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch * esw,struct mlx5e_tc_flow * flow,struct mlx5_flow_attr * attr)1224 mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw,
1225 			     struct mlx5e_tc_flow *flow,
1226 			     struct mlx5_flow_attr *attr)
1227 {
1228 	flow_flag_clear(flow, OFFLOADED);
1229 
1230 	if (attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)
1231 		goto offload_rule_0;
1232 
1233 	if (flow_flag_test(flow, CT)) {
1234 		mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), flow, attr);
1235 		return;
1236 	}
1237 
1238 	if (attr->esw_attr->split_count)
1239 		mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr);
1240 
1241 offload_rule_0:
1242 	mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
1243 }
1244 
1245 static struct mlx5_flow_handle *
mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch * esw,struct mlx5e_tc_flow * flow,struct mlx5_flow_spec * spec)1246 mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw,
1247 			      struct mlx5e_tc_flow *flow,
1248 			      struct mlx5_flow_spec *spec)
1249 {
1250 	struct mlx5_flow_attr *slow_attr;
1251 	struct mlx5_flow_handle *rule;
1252 
1253 	slow_attr = mlx5_alloc_flow_attr(MLX5_FLOW_NAMESPACE_FDB);
1254 	if (!slow_attr)
1255 		return ERR_PTR(-ENOMEM);
1256 
1257 	memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
1258 	slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1259 	slow_attr->esw_attr->split_count = 0;
1260 	slow_attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
1261 
1262 	rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr);
1263 	if (!IS_ERR(rule))
1264 		flow_flag_set(flow, SLOW);
1265 
1266 	kfree(slow_attr);
1267 
1268 	return rule;
1269 }
1270 
1271 static void
mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch * esw,struct mlx5e_tc_flow * flow)1272 mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw,
1273 				  struct mlx5e_tc_flow *flow)
1274 {
1275 	struct mlx5_flow_attr *slow_attr;
1276 
1277 	slow_attr = mlx5_alloc_flow_attr(MLX5_FLOW_NAMESPACE_FDB);
1278 	if (!slow_attr) {
1279 		mlx5_core_warn(flow->priv->mdev, "Unable to alloc attr to unoffload slow path rule\n");
1280 		return;
1281 	}
1282 
1283 	memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
1284 	slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1285 	slow_attr->esw_attr->split_count = 0;
1286 	slow_attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
1287 	mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr);
1288 	flow_flag_clear(flow, SLOW);
1289 	kfree(slow_attr);
1290 }
1291 
1292 /* Caller must obtain uplink_priv->unready_flows_lock mutex before calling this
1293  * function.
1294  */
unready_flow_add(struct mlx5e_tc_flow * flow,struct list_head * unready_flows)1295 static void unready_flow_add(struct mlx5e_tc_flow *flow,
1296 			     struct list_head *unready_flows)
1297 {
1298 	flow_flag_set(flow, NOT_READY);
1299 	list_add_tail(&flow->unready, unready_flows);
1300 }
1301 
1302 /* Caller must obtain uplink_priv->unready_flows_lock mutex before calling this
1303  * function.
1304  */
unready_flow_del(struct mlx5e_tc_flow * flow)1305 static void unready_flow_del(struct mlx5e_tc_flow *flow)
1306 {
1307 	list_del(&flow->unready);
1308 	flow_flag_clear(flow, NOT_READY);
1309 }
1310 
add_unready_flow(struct mlx5e_tc_flow * flow)1311 static void add_unready_flow(struct mlx5e_tc_flow *flow)
1312 {
1313 	struct mlx5_rep_uplink_priv *uplink_priv;
1314 	struct mlx5e_rep_priv *rpriv;
1315 	struct mlx5_eswitch *esw;
1316 
1317 	esw = flow->priv->mdev->priv.eswitch;
1318 	rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1319 	uplink_priv = &rpriv->uplink_priv;
1320 
1321 	mutex_lock(&uplink_priv->unready_flows_lock);
1322 	unready_flow_add(flow, &uplink_priv->unready_flows);
1323 	mutex_unlock(&uplink_priv->unready_flows_lock);
1324 }
1325 
remove_unready_flow(struct mlx5e_tc_flow * flow)1326 static void remove_unready_flow(struct mlx5e_tc_flow *flow)
1327 {
1328 	struct mlx5_rep_uplink_priv *uplink_priv;
1329 	struct mlx5e_rep_priv *rpriv;
1330 	struct mlx5_eswitch *esw;
1331 
1332 	esw = flow->priv->mdev->priv.eswitch;
1333 	rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1334 	uplink_priv = &rpriv->uplink_priv;
1335 
1336 	mutex_lock(&uplink_priv->unready_flows_lock);
1337 	unready_flow_del(flow);
1338 	mutex_unlock(&uplink_priv->unready_flows_lock);
1339 }
1340 
1341 static int
mlx5e_tc_add_fdb_flow(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,struct netlink_ext_ack * extack)1342 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
1343 		      struct mlx5e_tc_flow *flow,
1344 		      struct netlink_ext_ack *extack)
1345 {
1346 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1347 	struct net_device *out_dev, *encap_dev = NULL;
1348 	struct mlx5e_tc_flow_parse_attr *parse_attr;
1349 	struct mlx5_flow_attr *attr = flow->attr;
1350 	struct mlx5_esw_flow_attr *esw_attr;
1351 	struct mlx5_fc *counter = NULL;
1352 	struct mlx5e_rep_priv *rpriv;
1353 	struct mlx5e_priv *out_priv;
1354 	bool encap_valid = true;
1355 	u32 max_prio, max_chain;
1356 	int err = 0;
1357 	int out_index;
1358 
1359 	if (!mlx5_chains_prios_supported(esw_chains(esw)) && attr->prio != 1) {
1360 		NL_SET_ERR_MSG_MOD(extack,
1361 				   "E-switch priorities unsupported, upgrade FW");
1362 		return -EOPNOTSUPP;
1363 	}
1364 
1365 	/* We check chain range only for tc flows.
1366 	 * For ft flows, we checked attr->chain was originally 0 and set it to
1367 	 * FDB_FT_CHAIN which is outside tc range.
1368 	 * See mlx5e_rep_setup_ft_cb().
1369 	 */
1370 	max_chain = mlx5_chains_get_chain_range(esw_chains(esw));
1371 	if (!mlx5e_is_ft_flow(flow) && attr->chain > max_chain) {
1372 		NL_SET_ERR_MSG_MOD(extack,
1373 				   "Requested chain is out of supported range");
1374 		return -EOPNOTSUPP;
1375 	}
1376 
1377 	max_prio = mlx5_chains_get_prio_range(esw_chains(esw));
1378 	if (attr->prio > max_prio) {
1379 		NL_SET_ERR_MSG_MOD(extack,
1380 				   "Requested priority is out of supported range");
1381 		return -EOPNOTSUPP;
1382 	}
1383 
1384 	if (flow_flag_test(flow, L3_TO_L2_DECAP)) {
1385 		err = mlx5e_attach_decap(priv, flow, extack);
1386 		if (err)
1387 			return err;
1388 	}
1389 
1390 	parse_attr = attr->parse_attr;
1391 	esw_attr = attr->esw_attr;
1392 
1393 	for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++) {
1394 		int mirred_ifindex;
1395 
1396 		if (!(esw_attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP))
1397 			continue;
1398 
1399 		mirred_ifindex = parse_attr->mirred_ifindex[out_index];
1400 		out_dev = __dev_get_by_index(dev_net(priv->netdev),
1401 					     mirred_ifindex);
1402 		err = mlx5e_attach_encap(priv, flow, out_dev, out_index,
1403 					 extack, &encap_dev, &encap_valid);
1404 		if (err)
1405 			return err;
1406 
1407 		out_priv = netdev_priv(encap_dev);
1408 		rpriv = out_priv->ppriv;
1409 		esw_attr->dests[out_index].rep = rpriv->rep;
1410 		esw_attr->dests[out_index].mdev = out_priv->mdev;
1411 	}
1412 
1413 	err = mlx5_eswitch_add_vlan_action(esw, attr);
1414 	if (err)
1415 		return err;
1416 
1417 	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR &&
1418 	    !(attr->ct_attr.ct_action & TCA_CT_ACT_CLEAR)) {
1419 		err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
1420 		dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
1421 		if (err)
1422 			return err;
1423 	}
1424 
1425 	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1426 		counter = mlx5_fc_create(esw_attr->counter_dev, true);
1427 		if (IS_ERR(counter))
1428 			return PTR_ERR(counter);
1429 
1430 		attr->counter = counter;
1431 	}
1432 
1433 	/* we get here if one of the following takes place:
1434 	 * (1) there's no error
1435 	 * (2) there's an encap action and we don't have valid neigh
1436 	 */
1437 	if (!encap_valid)
1438 		flow->rule[0] = mlx5e_tc_offload_to_slow_path(esw, flow, &parse_attr->spec);
1439 	else
1440 		flow->rule[0] = mlx5e_tc_offload_fdb_rules(esw, flow, &parse_attr->spec, attr);
1441 
1442 	if (IS_ERR(flow->rule[0]))
1443 		return PTR_ERR(flow->rule[0]);
1444 	else
1445 		flow_flag_set(flow, OFFLOADED);
1446 
1447 	return 0;
1448 }
1449 
mlx5_flow_has_geneve_opt(struct mlx5e_tc_flow * flow)1450 static bool mlx5_flow_has_geneve_opt(struct mlx5e_tc_flow *flow)
1451 {
1452 	struct mlx5_flow_spec *spec = &flow->attr->parse_attr->spec;
1453 	void *headers_v = MLX5_ADDR_OF(fte_match_param,
1454 				       spec->match_value,
1455 				       misc_parameters_3);
1456 	u32 geneve_tlv_opt_0_data = MLX5_GET(fte_match_set_misc3,
1457 					     headers_v,
1458 					     geneve_tlv_option_0_data);
1459 
1460 	return !!geneve_tlv_opt_0_data;
1461 }
1462 
mlx5e_tc_del_fdb_flow(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow)1463 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
1464 				  struct mlx5e_tc_flow *flow)
1465 {
1466 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1467 	struct mlx5_flow_attr *attr = flow->attr;
1468 	int out_index;
1469 
1470 	mlx5e_put_flow_tunnel_id(flow);
1471 
1472 	if (flow_flag_test(flow, NOT_READY))
1473 		remove_unready_flow(flow);
1474 
1475 	if (mlx5e_is_offloaded_flow(flow)) {
1476 		if (flow_flag_test(flow, SLOW))
1477 			mlx5e_tc_unoffload_from_slow_path(esw, flow);
1478 		else
1479 			mlx5e_tc_unoffload_fdb_rules(esw, flow, attr);
1480 	}
1481 
1482 	if (mlx5_flow_has_geneve_opt(flow))
1483 		mlx5_geneve_tlv_option_del(priv->mdev->geneve);
1484 
1485 	mlx5_eswitch_del_vlan_action(esw, attr);
1486 
1487 	for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++)
1488 		if (attr->esw_attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP) {
1489 			mlx5e_detach_encap(priv, flow, out_index);
1490 			kfree(attr->parse_attr->tun_info[out_index]);
1491 		}
1492 	kvfree(attr->parse_attr);
1493 
1494 	mlx5_tc_ct_match_del(get_ct_priv(priv), &flow->attr->ct_attr);
1495 
1496 	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1497 		mlx5e_detach_mod_hdr(priv, flow);
1498 
1499 	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT)
1500 		mlx5_fc_destroy(attr->esw_attr->counter_dev, attr->counter);
1501 
1502 	if (flow_flag_test(flow, L3_TO_L2_DECAP))
1503 		mlx5e_detach_decap(priv, flow);
1504 
1505 	kfree(flow->attr);
1506 }
1507 
mlx5e_tc_encap_flows_add(struct mlx5e_priv * priv,struct mlx5e_encap_entry * e,struct list_head * flow_list)1508 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
1509 			      struct mlx5e_encap_entry *e,
1510 			      struct list_head *flow_list)
1511 {
1512 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1513 	struct mlx5_esw_flow_attr *esw_attr;
1514 	struct mlx5_flow_handle *rule;
1515 	struct mlx5_flow_attr *attr;
1516 	struct mlx5_flow_spec *spec;
1517 	struct mlx5e_tc_flow *flow;
1518 	int err;
1519 
1520 	e->pkt_reformat = mlx5_packet_reformat_alloc(priv->mdev,
1521 						     e->reformat_type,
1522 						     e->encap_size, e->encap_header,
1523 						     MLX5_FLOW_NAMESPACE_FDB);
1524 	if (IS_ERR(e->pkt_reformat)) {
1525 		mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %lu\n",
1526 			       PTR_ERR(e->pkt_reformat));
1527 		return;
1528 	}
1529 	e->flags |= MLX5_ENCAP_ENTRY_VALID;
1530 	mlx5e_rep_queue_neigh_stats_work(priv);
1531 
1532 	list_for_each_entry(flow, flow_list, tmp_list) {
1533 		bool all_flow_encaps_valid = true;
1534 		int i;
1535 
1536 		if (!mlx5e_is_offloaded_flow(flow))
1537 			continue;
1538 		attr = flow->attr;
1539 		esw_attr = attr->esw_attr;
1540 		spec = &attr->parse_attr->spec;
1541 
1542 		esw_attr->dests[flow->tmp_efi_index].pkt_reformat = e->pkt_reformat;
1543 		esw_attr->dests[flow->tmp_efi_index].flags |= MLX5_ESW_DEST_ENCAP_VALID;
1544 		/* Flow can be associated with multiple encap entries.
1545 		 * Before offloading the flow verify that all of them have
1546 		 * a valid neighbour.
1547 		 */
1548 		for (i = 0; i < MLX5_MAX_FLOW_FWD_VPORTS; i++) {
1549 			if (!(esw_attr->dests[i].flags & MLX5_ESW_DEST_ENCAP))
1550 				continue;
1551 			if (!(esw_attr->dests[i].flags & MLX5_ESW_DEST_ENCAP_VALID)) {
1552 				all_flow_encaps_valid = false;
1553 				break;
1554 			}
1555 		}
1556 		/* Do not offload flows with unresolved neighbors */
1557 		if (!all_flow_encaps_valid)
1558 			continue;
1559 		/* update from slow path rule to encap rule */
1560 		rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, attr);
1561 		if (IS_ERR(rule)) {
1562 			err = PTR_ERR(rule);
1563 			mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n",
1564 				       err);
1565 			continue;
1566 		}
1567 
1568 		mlx5e_tc_unoffload_from_slow_path(esw, flow);
1569 		flow->rule[0] = rule;
1570 		/* was unset when slow path rule removed */
1571 		flow_flag_set(flow, OFFLOADED);
1572 	}
1573 }
1574 
mlx5e_tc_encap_flows_del(struct mlx5e_priv * priv,struct mlx5e_encap_entry * e,struct list_head * flow_list)1575 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
1576 			      struct mlx5e_encap_entry *e,
1577 			      struct list_head *flow_list)
1578 {
1579 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1580 	struct mlx5_esw_flow_attr *esw_attr;
1581 	struct mlx5_flow_handle *rule;
1582 	struct mlx5_flow_attr *attr;
1583 	struct mlx5_flow_spec *spec;
1584 	struct mlx5e_tc_flow *flow;
1585 	int err;
1586 
1587 	list_for_each_entry(flow, flow_list, tmp_list) {
1588 		if (!mlx5e_is_offloaded_flow(flow))
1589 			continue;
1590 		attr = flow->attr;
1591 		esw_attr = attr->esw_attr;
1592 		spec = &attr->parse_attr->spec;
1593 
1594 		/* update from encap rule to slow path rule */
1595 		rule = mlx5e_tc_offload_to_slow_path(esw, flow, spec);
1596 		/* mark the flow's encap dest as non-valid */
1597 		esw_attr->dests[flow->tmp_efi_index].flags &= ~MLX5_ESW_DEST_ENCAP_VALID;
1598 
1599 		if (IS_ERR(rule)) {
1600 			err = PTR_ERR(rule);
1601 			mlx5_core_warn(priv->mdev, "Failed to update slow path (encap) flow, %d\n",
1602 				       err);
1603 			continue;
1604 		}
1605 
1606 		mlx5e_tc_unoffload_fdb_rules(esw, flow, attr);
1607 		flow->rule[0] = rule;
1608 		/* was unset when fast path rule removed */
1609 		flow_flag_set(flow, OFFLOADED);
1610 	}
1611 
1612 	/* we know that the encap is valid */
1613 	e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
1614 	mlx5_packet_reformat_dealloc(priv->mdev, e->pkt_reformat);
1615 }
1616 
mlx5e_tc_get_counter(struct mlx5e_tc_flow * flow)1617 static struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow)
1618 {
1619 	return flow->attr->counter;
1620 }
1621 
1622 /* Takes reference to all flows attached to encap and adds the flows to
1623  * flow_list using 'tmp_list' list_head in mlx5e_tc_flow.
1624  */
mlx5e_take_all_encap_flows(struct mlx5e_encap_entry * e,struct list_head * flow_list)1625 void mlx5e_take_all_encap_flows(struct mlx5e_encap_entry *e, struct list_head *flow_list)
1626 {
1627 	struct encap_flow_item *efi;
1628 	struct mlx5e_tc_flow *flow;
1629 
1630 	list_for_each_entry(efi, &e->flows, list) {
1631 		flow = container_of(efi, struct mlx5e_tc_flow, encaps[efi->index]);
1632 		if (IS_ERR(mlx5e_flow_get(flow)))
1633 			continue;
1634 		wait_for_completion(&flow->init_done);
1635 
1636 		flow->tmp_efi_index = efi->index;
1637 		list_add(&flow->tmp_list, flow_list);
1638 	}
1639 }
1640 
1641 /* Iterate over tmp_list of flows attached to flow_list head. */
mlx5e_put_encap_flow_list(struct mlx5e_priv * priv,struct list_head * flow_list)1642 void mlx5e_put_encap_flow_list(struct mlx5e_priv *priv, struct list_head *flow_list)
1643 {
1644 	struct mlx5e_tc_flow *flow, *tmp;
1645 
1646 	list_for_each_entry_safe(flow, tmp, flow_list, tmp_list)
1647 		mlx5e_flow_put(priv, flow);
1648 }
1649 
1650 static struct mlx5e_encap_entry *
mlx5e_get_next_valid_encap(struct mlx5e_neigh_hash_entry * nhe,struct mlx5e_encap_entry * e)1651 mlx5e_get_next_valid_encap(struct mlx5e_neigh_hash_entry *nhe,
1652 			   struct mlx5e_encap_entry *e)
1653 {
1654 	struct mlx5e_encap_entry *next = NULL;
1655 
1656 retry:
1657 	rcu_read_lock();
1658 
1659 	/* find encap with non-zero reference counter value */
1660 	for (next = e ?
1661 		     list_next_or_null_rcu(&nhe->encap_list,
1662 					   &e->encap_list,
1663 					   struct mlx5e_encap_entry,
1664 					   encap_list) :
1665 		     list_first_or_null_rcu(&nhe->encap_list,
1666 					    struct mlx5e_encap_entry,
1667 					    encap_list);
1668 	     next;
1669 	     next = list_next_or_null_rcu(&nhe->encap_list,
1670 					  &next->encap_list,
1671 					  struct mlx5e_encap_entry,
1672 					  encap_list))
1673 		if (mlx5e_encap_take(next))
1674 			break;
1675 
1676 	rcu_read_unlock();
1677 
1678 	/* release starting encap */
1679 	if (e)
1680 		mlx5e_encap_put(netdev_priv(e->out_dev), e);
1681 	if (!next)
1682 		return next;
1683 
1684 	/* wait for encap to be fully initialized */
1685 	wait_for_completion(&next->res_ready);
1686 	/* continue searching if encap entry is not in valid state after completion */
1687 	if (!(next->flags & MLX5_ENCAP_ENTRY_VALID)) {
1688 		e = next;
1689 		goto retry;
1690 	}
1691 
1692 	return next;
1693 }
1694 
mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry * nhe)1695 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
1696 {
1697 	struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
1698 	struct mlx5e_encap_entry *e = NULL;
1699 	struct mlx5e_tc_flow *flow;
1700 	struct mlx5_fc *counter;
1701 	struct neigh_table *tbl;
1702 	bool neigh_used = false;
1703 	struct neighbour *n;
1704 	u64 lastuse;
1705 
1706 	if (m_neigh->family == AF_INET)
1707 		tbl = &arp_tbl;
1708 #if IS_ENABLED(CONFIG_IPV6)
1709 	else if (m_neigh->family == AF_INET6)
1710 		tbl = ipv6_stub->nd_tbl;
1711 #endif
1712 	else
1713 		return;
1714 
1715 	/* mlx5e_get_next_valid_encap() releases previous encap before returning
1716 	 * next one.
1717 	 */
1718 	while ((e = mlx5e_get_next_valid_encap(nhe, e)) != NULL) {
1719 		struct mlx5e_priv *priv = netdev_priv(e->out_dev);
1720 		struct encap_flow_item *efi, *tmp;
1721 		struct mlx5_eswitch *esw;
1722 		LIST_HEAD(flow_list);
1723 
1724 		esw = priv->mdev->priv.eswitch;
1725 		mutex_lock(&esw->offloads.encap_tbl_lock);
1726 		list_for_each_entry_safe(efi, tmp, &e->flows, list) {
1727 			flow = container_of(efi, struct mlx5e_tc_flow,
1728 					    encaps[efi->index]);
1729 			if (IS_ERR(mlx5e_flow_get(flow)))
1730 				continue;
1731 			list_add(&flow->tmp_list, &flow_list);
1732 
1733 			if (mlx5e_is_offloaded_flow(flow)) {
1734 				counter = mlx5e_tc_get_counter(flow);
1735 				lastuse = mlx5_fc_query_lastuse(counter);
1736 				if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
1737 					neigh_used = true;
1738 					break;
1739 				}
1740 			}
1741 		}
1742 		mutex_unlock(&esw->offloads.encap_tbl_lock);
1743 
1744 		mlx5e_put_encap_flow_list(priv, &flow_list);
1745 		if (neigh_used) {
1746 			/* release current encap before breaking the loop */
1747 			mlx5e_encap_put(priv, e);
1748 			break;
1749 		}
1750 	}
1751 
1752 	trace_mlx5e_tc_update_neigh_used_value(nhe, neigh_used);
1753 
1754 	if (neigh_used) {
1755 		nhe->reported_lastuse = jiffies;
1756 
1757 		/* find the relevant neigh according to the cached device and
1758 		 * dst ip pair
1759 		 */
1760 		n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev);
1761 		if (!n)
1762 			return;
1763 
1764 		neigh_event_send(n, NULL);
1765 		neigh_release(n);
1766 	}
1767 }
1768 
mlx5e_encap_dealloc(struct mlx5e_priv * priv,struct mlx5e_encap_entry * e)1769 static void mlx5e_encap_dealloc(struct mlx5e_priv *priv, struct mlx5e_encap_entry *e)
1770 {
1771 	WARN_ON(!list_empty(&e->flows));
1772 
1773 	if (e->compl_result > 0) {
1774 		mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1775 
1776 		if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1777 			mlx5_packet_reformat_dealloc(priv->mdev, e->pkt_reformat);
1778 	}
1779 
1780 	kfree(e->tun_info);
1781 	kfree(e->encap_header);
1782 	kfree_rcu(e, rcu);
1783 }
1784 
mlx5e_decap_dealloc(struct mlx5e_priv * priv,struct mlx5e_decap_entry * d)1785 static void mlx5e_decap_dealloc(struct mlx5e_priv *priv,
1786 				struct mlx5e_decap_entry *d)
1787 {
1788 	WARN_ON(!list_empty(&d->flows));
1789 
1790 	if (!d->compl_result)
1791 		mlx5_packet_reformat_dealloc(priv->mdev, d->pkt_reformat);
1792 
1793 	kfree_rcu(d, rcu);
1794 }
1795 
mlx5e_encap_put(struct mlx5e_priv * priv,struct mlx5e_encap_entry * e)1796 void mlx5e_encap_put(struct mlx5e_priv *priv, struct mlx5e_encap_entry *e)
1797 {
1798 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1799 
1800 	if (!refcount_dec_and_mutex_lock(&e->refcnt, &esw->offloads.encap_tbl_lock))
1801 		return;
1802 	hash_del_rcu(&e->encap_hlist);
1803 	mutex_unlock(&esw->offloads.encap_tbl_lock);
1804 
1805 	mlx5e_encap_dealloc(priv, e);
1806 }
1807 
mlx5e_decap_put(struct mlx5e_priv * priv,struct mlx5e_decap_entry * d)1808 static void mlx5e_decap_put(struct mlx5e_priv *priv, struct mlx5e_decap_entry *d)
1809 {
1810 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1811 
1812 	if (!refcount_dec_and_mutex_lock(&d->refcnt, &esw->offloads.decap_tbl_lock))
1813 		return;
1814 	hash_del_rcu(&d->hlist);
1815 	mutex_unlock(&esw->offloads.decap_tbl_lock);
1816 
1817 	mlx5e_decap_dealloc(priv, d);
1818 }
1819 
mlx5e_detach_encap(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,int out_index)1820 static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1821 			       struct mlx5e_tc_flow *flow, int out_index)
1822 {
1823 	struct mlx5e_encap_entry *e = flow->encaps[out_index].e;
1824 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1825 
1826 	/* flow wasn't fully initialized */
1827 	if (!e)
1828 		return;
1829 
1830 	mutex_lock(&esw->offloads.encap_tbl_lock);
1831 	list_del(&flow->encaps[out_index].list);
1832 	flow->encaps[out_index].e = NULL;
1833 	if (!refcount_dec_and_test(&e->refcnt)) {
1834 		mutex_unlock(&esw->offloads.encap_tbl_lock);
1835 		return;
1836 	}
1837 	hash_del_rcu(&e->encap_hlist);
1838 	mutex_unlock(&esw->offloads.encap_tbl_lock);
1839 
1840 	mlx5e_encap_dealloc(priv, e);
1841 }
1842 
mlx5e_detach_decap(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow)1843 static void mlx5e_detach_decap(struct mlx5e_priv *priv,
1844 			       struct mlx5e_tc_flow *flow)
1845 {
1846 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1847 	struct mlx5e_decap_entry *d = flow->decap_reformat;
1848 
1849 	if (!d)
1850 		return;
1851 
1852 	mutex_lock(&esw->offloads.decap_tbl_lock);
1853 	list_del(&flow->l3_to_l2_reformat);
1854 	flow->decap_reformat = NULL;
1855 
1856 	if (!refcount_dec_and_test(&d->refcnt)) {
1857 		mutex_unlock(&esw->offloads.decap_tbl_lock);
1858 		return;
1859 	}
1860 	hash_del_rcu(&d->hlist);
1861 	mutex_unlock(&esw->offloads.decap_tbl_lock);
1862 
1863 	mlx5e_decap_dealloc(priv, d);
1864 }
1865 
__mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow * flow)1866 static void __mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow)
1867 {
1868 	struct mlx5_eswitch *esw = flow->priv->mdev->priv.eswitch;
1869 
1870 	if (!flow_flag_test(flow, ESWITCH) ||
1871 	    !flow_flag_test(flow, DUP))
1872 		return;
1873 
1874 	mutex_lock(&esw->offloads.peer_mutex);
1875 	list_del(&flow->peer);
1876 	mutex_unlock(&esw->offloads.peer_mutex);
1877 
1878 	flow_flag_clear(flow, DUP);
1879 
1880 	if (refcount_dec_and_test(&flow->peer_flow->refcnt)) {
1881 		mlx5e_tc_del_fdb_flow(flow->peer_flow->priv, flow->peer_flow);
1882 		kfree(flow->peer_flow);
1883 	}
1884 
1885 	flow->peer_flow = NULL;
1886 }
1887 
mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow * flow)1888 static void mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow)
1889 {
1890 	struct mlx5_core_dev *dev = flow->priv->mdev;
1891 	struct mlx5_devcom *devcom = dev->priv.devcom;
1892 	struct mlx5_eswitch *peer_esw;
1893 
1894 	peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
1895 	if (!peer_esw)
1896 		return;
1897 
1898 	__mlx5e_tc_del_fdb_peer_flow(flow);
1899 	mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
1900 }
1901 
mlx5e_tc_del_flow(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow)1902 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1903 			      struct mlx5e_tc_flow *flow)
1904 {
1905 	if (mlx5e_is_eswitch_flow(flow)) {
1906 		mlx5e_tc_del_fdb_peer_flow(flow);
1907 		mlx5e_tc_del_fdb_flow(priv, flow);
1908 	} else {
1909 		mlx5e_tc_del_nic_flow(priv, flow);
1910 	}
1911 }
1912 
flow_has_tc_fwd_action(struct flow_cls_offload * f)1913 static int flow_has_tc_fwd_action(struct flow_cls_offload *f)
1914 {
1915 	struct flow_rule *rule = flow_cls_offload_flow_rule(f);
1916 	struct flow_action *flow_action = &rule->action;
1917 	const struct flow_action_entry *act;
1918 	int i;
1919 
1920 	flow_action_for_each(i, act, flow_action) {
1921 		switch (act->id) {
1922 		case FLOW_ACTION_GOTO:
1923 			return true;
1924 		default:
1925 			continue;
1926 		}
1927 	}
1928 
1929 	return false;
1930 }
1931 
1932 static int
enc_opts_is_dont_care_or_full_match(struct mlx5e_priv * priv,struct flow_dissector_key_enc_opts * opts,struct netlink_ext_ack * extack,bool * dont_care)1933 enc_opts_is_dont_care_or_full_match(struct mlx5e_priv *priv,
1934 				    struct flow_dissector_key_enc_opts *opts,
1935 				    struct netlink_ext_ack *extack,
1936 				    bool *dont_care)
1937 {
1938 	struct geneve_opt *opt;
1939 	int off = 0;
1940 
1941 	*dont_care = true;
1942 
1943 	while (opts->len > off) {
1944 		opt = (struct geneve_opt *)&opts->data[off];
1945 
1946 		if (!(*dont_care) || opt->opt_class || opt->type ||
1947 		    memchr_inv(opt->opt_data, 0, opt->length * 4)) {
1948 			*dont_care = false;
1949 
1950 			if (opt->opt_class != htons(U16_MAX) ||
1951 			    opt->type != U8_MAX) {
1952 				NL_SET_ERR_MSG(extack,
1953 					       "Partial match of tunnel options in chain > 0 isn't supported");
1954 				netdev_warn(priv->netdev,
1955 					    "Partial match of tunnel options in chain > 0 isn't supported");
1956 				return -EOPNOTSUPP;
1957 			}
1958 		}
1959 
1960 		off += sizeof(struct geneve_opt) + opt->length * 4;
1961 	}
1962 
1963 	return 0;
1964 }
1965 
1966 #define COPY_DISSECTOR(rule, diss_key, dst)\
1967 ({ \
1968 	struct flow_rule *__rule = (rule);\
1969 	typeof(dst) __dst = dst;\
1970 \
1971 	memcpy(__dst,\
1972 	       skb_flow_dissector_target(__rule->match.dissector,\
1973 					 diss_key,\
1974 					 __rule->match.key),\
1975 	       sizeof(*__dst));\
1976 })
1977 
mlx5e_get_flow_tunnel_id(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,struct flow_cls_offload * f,struct net_device * filter_dev)1978 static int mlx5e_get_flow_tunnel_id(struct mlx5e_priv *priv,
1979 				    struct mlx5e_tc_flow *flow,
1980 				    struct flow_cls_offload *f,
1981 				    struct net_device *filter_dev)
1982 {
1983 	struct flow_rule *rule = flow_cls_offload_flow_rule(f);
1984 	struct netlink_ext_ack *extack = f->common.extack;
1985 	struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts;
1986 	struct flow_match_enc_opts enc_opts_match;
1987 	struct tunnel_match_enc_opts tun_enc_opts;
1988 	struct mlx5_rep_uplink_priv *uplink_priv;
1989 	struct mlx5_flow_attr *attr = flow->attr;
1990 	struct mlx5e_rep_priv *uplink_rpriv;
1991 	struct tunnel_match_key tunnel_key;
1992 	bool enc_opts_is_dont_care = true;
1993 	u32 tun_id, enc_opts_id = 0;
1994 	struct mlx5_eswitch *esw;
1995 	u32 value, mask;
1996 	int err;
1997 
1998 	esw = priv->mdev->priv.eswitch;
1999 	uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2000 	uplink_priv = &uplink_rpriv->uplink_priv;
2001 
2002 	memset(&tunnel_key, 0, sizeof(tunnel_key));
2003 	COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_CONTROL,
2004 		       &tunnel_key.enc_control);
2005 	if (tunnel_key.enc_control.addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS)
2006 		COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
2007 			       &tunnel_key.enc_ipv4);
2008 	else
2009 		COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
2010 			       &tunnel_key.enc_ipv6);
2011 	COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IP, &tunnel_key.enc_ip);
2012 	COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_PORTS,
2013 		       &tunnel_key.enc_tp);
2014 	COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_KEYID,
2015 		       &tunnel_key.enc_key_id);
2016 	tunnel_key.filter_ifindex = filter_dev->ifindex;
2017 
2018 	err = mapping_add(uplink_priv->tunnel_mapping, &tunnel_key, &tun_id);
2019 	if (err)
2020 		return err;
2021 
2022 	flow_rule_match_enc_opts(rule, &enc_opts_match);
2023 	err = enc_opts_is_dont_care_or_full_match(priv,
2024 						  enc_opts_match.mask,
2025 						  extack,
2026 						  &enc_opts_is_dont_care);
2027 	if (err)
2028 		goto err_enc_opts;
2029 
2030 	if (!enc_opts_is_dont_care) {
2031 		memset(&tun_enc_opts, 0, sizeof(tun_enc_opts));
2032 		memcpy(&tun_enc_opts.key, enc_opts_match.key,
2033 		       sizeof(*enc_opts_match.key));
2034 		memcpy(&tun_enc_opts.mask, enc_opts_match.mask,
2035 		       sizeof(*enc_opts_match.mask));
2036 
2037 		err = mapping_add(uplink_priv->tunnel_enc_opts_mapping,
2038 				  &tun_enc_opts, &enc_opts_id);
2039 		if (err)
2040 			goto err_enc_opts;
2041 	}
2042 
2043 	value = tun_id << ENC_OPTS_BITS | enc_opts_id;
2044 	mask = enc_opts_id ? TUNNEL_ID_MASK :
2045 			     (TUNNEL_ID_MASK & ~ENC_OPTS_BITS_MASK);
2046 
2047 	if (attr->chain) {
2048 		mlx5e_tc_match_to_reg_match(&attr->parse_attr->spec,
2049 					    TUNNEL_TO_REG, value, mask);
2050 	} else {
2051 		mod_hdr_acts = &attr->parse_attr->mod_hdr_acts;
2052 		err = mlx5e_tc_match_to_reg_set(priv->mdev,
2053 						mod_hdr_acts, MLX5_FLOW_NAMESPACE_FDB,
2054 						TUNNEL_TO_REG, value);
2055 		if (err)
2056 			goto err_set;
2057 
2058 		attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
2059 	}
2060 
2061 	flow->tunnel_id = value;
2062 	return 0;
2063 
2064 err_set:
2065 	if (enc_opts_id)
2066 		mapping_remove(uplink_priv->tunnel_enc_opts_mapping,
2067 			       enc_opts_id);
2068 err_enc_opts:
2069 	mapping_remove(uplink_priv->tunnel_mapping, tun_id);
2070 	return err;
2071 }
2072 
mlx5e_put_flow_tunnel_id(struct mlx5e_tc_flow * flow)2073 static void mlx5e_put_flow_tunnel_id(struct mlx5e_tc_flow *flow)
2074 {
2075 	u32 enc_opts_id = flow->tunnel_id & ENC_OPTS_BITS_MASK;
2076 	u32 tun_id = flow->tunnel_id >> ENC_OPTS_BITS;
2077 	struct mlx5_rep_uplink_priv *uplink_priv;
2078 	struct mlx5e_rep_priv *uplink_rpriv;
2079 	struct mlx5_eswitch *esw;
2080 
2081 	esw = flow->priv->mdev->priv.eswitch;
2082 	uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
2083 	uplink_priv = &uplink_rpriv->uplink_priv;
2084 
2085 	if (tun_id)
2086 		mapping_remove(uplink_priv->tunnel_mapping, tun_id);
2087 	if (enc_opts_id)
2088 		mapping_remove(uplink_priv->tunnel_enc_opts_mapping,
2089 			       enc_opts_id);
2090 }
2091 
mlx5e_tc_get_flow_tun_id(struct mlx5e_tc_flow * flow)2092 u32 mlx5e_tc_get_flow_tun_id(struct mlx5e_tc_flow *flow)
2093 {
2094 	return flow->tunnel_id;
2095 }
2096 
mlx5e_tc_set_ethertype(struct mlx5_core_dev * mdev,struct flow_match_basic * match,bool outer,void * headers_c,void * headers_v)2097 void mlx5e_tc_set_ethertype(struct mlx5_core_dev *mdev,
2098 			    struct flow_match_basic *match, bool outer,
2099 			    void *headers_c, void *headers_v)
2100 {
2101 	bool ip_version_cap;
2102 
2103 	ip_version_cap = outer ?
2104 		MLX5_CAP_FLOWTABLE_NIC_RX(mdev,
2105 					  ft_field_support.outer_ip_version) :
2106 		MLX5_CAP_FLOWTABLE_NIC_RX(mdev,
2107 					  ft_field_support.inner_ip_version);
2108 
2109 	if (ip_version_cap && match->mask->n_proto == htons(0xFFFF) &&
2110 	    (match->key->n_proto == htons(ETH_P_IP) ||
2111 	     match->key->n_proto == htons(ETH_P_IPV6))) {
2112 		MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_version);
2113 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version,
2114 			 match->key->n_proto == htons(ETH_P_IP) ? 4 : 6);
2115 	} else {
2116 		MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
2117 			 ntohs(match->mask->n_proto));
2118 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
2119 			 ntohs(match->key->n_proto));
2120 	}
2121 }
2122 
parse_tunnel_attr(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,struct mlx5_flow_spec * spec,struct flow_cls_offload * f,struct net_device * filter_dev,u8 * match_level,bool * match_inner)2123 static int parse_tunnel_attr(struct mlx5e_priv *priv,
2124 			     struct mlx5e_tc_flow *flow,
2125 			     struct mlx5_flow_spec *spec,
2126 			     struct flow_cls_offload *f,
2127 			     struct net_device *filter_dev,
2128 			     u8 *match_level,
2129 			     bool *match_inner)
2130 {
2131 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
2132 	struct netlink_ext_ack *extack = f->common.extack;
2133 	bool needs_mapping, sets_mapping;
2134 	int err;
2135 
2136 	if (!mlx5e_is_eswitch_flow(flow))
2137 		return -EOPNOTSUPP;
2138 
2139 	needs_mapping = !!flow->attr->chain;
2140 	sets_mapping = !flow->attr->chain && flow_has_tc_fwd_action(f);
2141 	*match_inner = !needs_mapping;
2142 
2143 	if ((needs_mapping || sets_mapping) &&
2144 	    !mlx5_eswitch_reg_c1_loopback_enabled(esw)) {
2145 		NL_SET_ERR_MSG(extack,
2146 			       "Chains on tunnel devices isn't supported without register loopback support");
2147 		netdev_warn(priv->netdev,
2148 			    "Chains on tunnel devices isn't supported without register loopback support");
2149 		return -EOPNOTSUPP;
2150 	}
2151 
2152 	if (!flow->attr->chain) {
2153 		err = mlx5e_tc_tun_parse(filter_dev, priv, spec, f,
2154 					 match_level);
2155 		if (err) {
2156 			NL_SET_ERR_MSG_MOD(extack,
2157 					   "Failed to parse tunnel attributes");
2158 			netdev_warn(priv->netdev,
2159 				    "Failed to parse tunnel attributes");
2160 			return err;
2161 		}
2162 
2163 		/* With mpls over udp we decapsulate using packet reformat
2164 		 * object
2165 		 */
2166 		if (!netif_is_bareudp(filter_dev))
2167 			flow->attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
2168 	}
2169 
2170 	if (!needs_mapping && !sets_mapping)
2171 		return 0;
2172 
2173 	return mlx5e_get_flow_tunnel_id(priv, flow, f, filter_dev);
2174 }
2175 
get_match_inner_headers_criteria(struct mlx5_flow_spec * spec)2176 static void *get_match_inner_headers_criteria(struct mlx5_flow_spec *spec)
2177 {
2178 	return MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2179 			    inner_headers);
2180 }
2181 
get_match_inner_headers_value(struct mlx5_flow_spec * spec)2182 static void *get_match_inner_headers_value(struct mlx5_flow_spec *spec)
2183 {
2184 	return MLX5_ADDR_OF(fte_match_param, spec->match_value,
2185 			    inner_headers);
2186 }
2187 
get_match_outer_headers_criteria(struct mlx5_flow_spec * spec)2188 static void *get_match_outer_headers_criteria(struct mlx5_flow_spec *spec)
2189 {
2190 	return MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2191 			    outer_headers);
2192 }
2193 
get_match_outer_headers_value(struct mlx5_flow_spec * spec)2194 static void *get_match_outer_headers_value(struct mlx5_flow_spec *spec)
2195 {
2196 	return MLX5_ADDR_OF(fte_match_param, spec->match_value,
2197 			    outer_headers);
2198 }
2199 
get_match_headers_value(u32 flags,struct mlx5_flow_spec * spec)2200 static void *get_match_headers_value(u32 flags,
2201 				     struct mlx5_flow_spec *spec)
2202 {
2203 	return (flags & MLX5_FLOW_CONTEXT_ACTION_DECAP) ?
2204 		get_match_inner_headers_value(spec) :
2205 		get_match_outer_headers_value(spec);
2206 }
2207 
get_match_headers_criteria(u32 flags,struct mlx5_flow_spec * spec)2208 static void *get_match_headers_criteria(u32 flags,
2209 					struct mlx5_flow_spec *spec)
2210 {
2211 	return (flags & MLX5_FLOW_CONTEXT_ACTION_DECAP) ?
2212 		get_match_inner_headers_criteria(spec) :
2213 		get_match_outer_headers_criteria(spec);
2214 }
2215 
mlx5e_flower_parse_meta(struct net_device * filter_dev,struct flow_cls_offload * f)2216 static int mlx5e_flower_parse_meta(struct net_device *filter_dev,
2217 				   struct flow_cls_offload *f)
2218 {
2219 	struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2220 	struct netlink_ext_ack *extack = f->common.extack;
2221 	struct net_device *ingress_dev;
2222 	struct flow_match_meta match;
2223 
2224 	if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META))
2225 		return 0;
2226 
2227 	flow_rule_match_meta(rule, &match);
2228 	if (!match.mask->ingress_ifindex)
2229 		return 0;
2230 
2231 	if (match.mask->ingress_ifindex != 0xFFFFFFFF) {
2232 		NL_SET_ERR_MSG_MOD(extack, "Unsupported ingress ifindex mask");
2233 		return -EOPNOTSUPP;
2234 	}
2235 
2236 	ingress_dev = __dev_get_by_index(dev_net(filter_dev),
2237 					 match.key->ingress_ifindex);
2238 	if (!ingress_dev) {
2239 		NL_SET_ERR_MSG_MOD(extack,
2240 				   "Can't find the ingress port to match on");
2241 		return -ENOENT;
2242 	}
2243 
2244 	if (ingress_dev != filter_dev) {
2245 		NL_SET_ERR_MSG_MOD(extack,
2246 				   "Can't match on the ingress filter port");
2247 		return -EOPNOTSUPP;
2248 	}
2249 
2250 	return 0;
2251 }
2252 
skip_key_basic(struct net_device * filter_dev,struct flow_cls_offload * f)2253 static bool skip_key_basic(struct net_device *filter_dev,
2254 			   struct flow_cls_offload *f)
2255 {
2256 	/* When doing mpls over udp decap, the user needs to provide
2257 	 * MPLS_UC as the protocol in order to be able to match on mpls
2258 	 * label fields.  However, the actual ethertype is IP so we want to
2259 	 * avoid matching on this, otherwise we'll fail the match.
2260 	 */
2261 	if (netif_is_bareudp(filter_dev) && f->common.chain_index == 0)
2262 		return true;
2263 
2264 	return false;
2265 }
2266 
__parse_cls_flower(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,struct mlx5_flow_spec * spec,struct flow_cls_offload * f,struct net_device * filter_dev,u8 * inner_match_level,u8 * outer_match_level)2267 static int __parse_cls_flower(struct mlx5e_priv *priv,
2268 			      struct mlx5e_tc_flow *flow,
2269 			      struct mlx5_flow_spec *spec,
2270 			      struct flow_cls_offload *f,
2271 			      struct net_device *filter_dev,
2272 			      u8 *inner_match_level, u8 *outer_match_level)
2273 {
2274 	struct netlink_ext_ack *extack = f->common.extack;
2275 	void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2276 				       outer_headers);
2277 	void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
2278 				       outer_headers);
2279 	void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2280 				    misc_parameters);
2281 	void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
2282 				    misc_parameters);
2283 	struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2284 	struct flow_dissector *dissector = rule->match.dissector;
2285 	enum fs_flow_table_type fs_type;
2286 	u16 addr_type = 0;
2287 	u8 ip_proto = 0;
2288 	u8 *match_level;
2289 	int err;
2290 
2291 	fs_type = mlx5e_is_eswitch_flow(flow) ? FS_FT_FDB : FS_FT_NIC_RX;
2292 	match_level = outer_match_level;
2293 
2294 	if (dissector->used_keys &
2295 	    ~(BIT(FLOW_DISSECTOR_KEY_META) |
2296 	      BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2297 	      BIT(FLOW_DISSECTOR_KEY_BASIC) |
2298 	      BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2299 	      BIT(FLOW_DISSECTOR_KEY_VLAN) |
2300 	      BIT(FLOW_DISSECTOR_KEY_CVLAN) |
2301 	      BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
2302 	      BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
2303 	      BIT(FLOW_DISSECTOR_KEY_PORTS) |
2304 	      BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
2305 	      BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
2306 	      BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
2307 	      BIT(FLOW_DISSECTOR_KEY_ENC_PORTS)	|
2308 	      BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
2309 	      BIT(FLOW_DISSECTOR_KEY_TCP) |
2310 	      BIT(FLOW_DISSECTOR_KEY_IP)  |
2311 	      BIT(FLOW_DISSECTOR_KEY_CT) |
2312 	      BIT(FLOW_DISSECTOR_KEY_ENC_IP) |
2313 	      BIT(FLOW_DISSECTOR_KEY_ENC_OPTS) |
2314 	      BIT(FLOW_DISSECTOR_KEY_MPLS))) {
2315 		NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
2316 		netdev_dbg(priv->netdev, "Unsupported key used: 0x%x\n",
2317 			   dissector->used_keys);
2318 		return -EOPNOTSUPP;
2319 	}
2320 
2321 	if (mlx5e_get_tc_tun(filter_dev)) {
2322 		bool match_inner = false;
2323 
2324 		err = parse_tunnel_attr(priv, flow, spec, f, filter_dev,
2325 					outer_match_level, &match_inner);
2326 		if (err)
2327 			return err;
2328 
2329 		if (match_inner) {
2330 			/* header pointers should point to the inner headers
2331 			 * if the packet was decapsulated already.
2332 			 * outer headers are set by parse_tunnel_attr.
2333 			 */
2334 			match_level = inner_match_level;
2335 			headers_c = get_match_inner_headers_criteria(spec);
2336 			headers_v = get_match_inner_headers_value(spec);
2337 		}
2338 	}
2339 
2340 	err = mlx5e_flower_parse_meta(filter_dev, f);
2341 	if (err)
2342 		return err;
2343 
2344 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC) &&
2345 	    !skip_key_basic(filter_dev, f)) {
2346 		struct flow_match_basic match;
2347 
2348 		flow_rule_match_basic(rule, &match);
2349 		mlx5e_tc_set_ethertype(priv->mdev, &match,
2350 				       match_level == outer_match_level,
2351 				       headers_c, headers_v);
2352 
2353 		if (match.mask->n_proto)
2354 			*match_level = MLX5_MATCH_L2;
2355 	}
2356 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN) ||
2357 	    is_vlan_dev(filter_dev)) {
2358 		struct flow_dissector_key_vlan filter_dev_mask;
2359 		struct flow_dissector_key_vlan filter_dev_key;
2360 		struct flow_match_vlan match;
2361 
2362 		if (is_vlan_dev(filter_dev)) {
2363 			match.key = &filter_dev_key;
2364 			match.key->vlan_id = vlan_dev_vlan_id(filter_dev);
2365 			match.key->vlan_tpid = vlan_dev_vlan_proto(filter_dev);
2366 			match.key->vlan_priority = 0;
2367 			match.mask = &filter_dev_mask;
2368 			memset(match.mask, 0xff, sizeof(*match.mask));
2369 			match.mask->vlan_priority = 0;
2370 		} else {
2371 			flow_rule_match_vlan(rule, &match);
2372 		}
2373 		if (match.mask->vlan_id ||
2374 		    match.mask->vlan_priority ||
2375 		    match.mask->vlan_tpid) {
2376 			if (match.key->vlan_tpid == htons(ETH_P_8021AD)) {
2377 				MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2378 					 svlan_tag, 1);
2379 				MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2380 					 svlan_tag, 1);
2381 			} else {
2382 				MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2383 					 cvlan_tag, 1);
2384 				MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2385 					 cvlan_tag, 1);
2386 			}
2387 
2388 			MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid,
2389 				 match.mask->vlan_id);
2390 			MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid,
2391 				 match.key->vlan_id);
2392 
2393 			MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio,
2394 				 match.mask->vlan_priority);
2395 			MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio,
2396 				 match.key->vlan_priority);
2397 
2398 			*match_level = MLX5_MATCH_L2;
2399 		}
2400 	} else if (*match_level != MLX5_MATCH_NONE) {
2401 		/* cvlan_tag enabled in match criteria and
2402 		 * disabled in match value means both S & C tags
2403 		 * don't exist (untagged of both)
2404 		 */
2405 		MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
2406 		*match_level = MLX5_MATCH_L2;
2407 	}
2408 
2409 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CVLAN)) {
2410 		struct flow_match_vlan match;
2411 
2412 		flow_rule_match_cvlan(rule, &match);
2413 		if (match.mask->vlan_id ||
2414 		    match.mask->vlan_priority ||
2415 		    match.mask->vlan_tpid) {
2416 			if (!MLX5_CAP_FLOWTABLE_TYPE(priv->mdev, ft_field_support.outer_second_vid,
2417 						     fs_type)) {
2418 				NL_SET_ERR_MSG_MOD(extack,
2419 						   "Matching on CVLAN is not supported");
2420 				return -EOPNOTSUPP;
2421 			}
2422 
2423 			if (match.key->vlan_tpid == htons(ETH_P_8021AD)) {
2424 				MLX5_SET(fte_match_set_misc, misc_c,
2425 					 outer_second_svlan_tag, 1);
2426 				MLX5_SET(fte_match_set_misc, misc_v,
2427 					 outer_second_svlan_tag, 1);
2428 			} else {
2429 				MLX5_SET(fte_match_set_misc, misc_c,
2430 					 outer_second_cvlan_tag, 1);
2431 				MLX5_SET(fte_match_set_misc, misc_v,
2432 					 outer_second_cvlan_tag, 1);
2433 			}
2434 
2435 			MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
2436 				 match.mask->vlan_id);
2437 			MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
2438 				 match.key->vlan_id);
2439 			MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
2440 				 match.mask->vlan_priority);
2441 			MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
2442 				 match.key->vlan_priority);
2443 
2444 			*match_level = MLX5_MATCH_L2;
2445 			spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
2446 		}
2447 	}
2448 
2449 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2450 		struct flow_match_eth_addrs match;
2451 
2452 		flow_rule_match_eth_addrs(rule, &match);
2453 		ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2454 					     dmac_47_16),
2455 				match.mask->dst);
2456 		ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2457 					     dmac_47_16),
2458 				match.key->dst);
2459 
2460 		ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2461 					     smac_47_16),
2462 				match.mask->src);
2463 		ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2464 					     smac_47_16),
2465 				match.key->src);
2466 
2467 		if (!is_zero_ether_addr(match.mask->src) ||
2468 		    !is_zero_ether_addr(match.mask->dst))
2469 			*match_level = MLX5_MATCH_L2;
2470 	}
2471 
2472 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
2473 		struct flow_match_control match;
2474 
2475 		flow_rule_match_control(rule, &match);
2476 		addr_type = match.key->addr_type;
2477 
2478 		/* the HW doesn't support frag first/later */
2479 		if (match.mask->flags & FLOW_DIS_FIRST_FRAG)
2480 			return -EOPNOTSUPP;
2481 
2482 		if (match.mask->flags & FLOW_DIS_IS_FRAGMENT) {
2483 			MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
2484 			MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
2485 				 match.key->flags & FLOW_DIS_IS_FRAGMENT);
2486 
2487 			/* the HW doesn't need L3 inline to match on frag=no */
2488 			if (!(match.key->flags & FLOW_DIS_IS_FRAGMENT))
2489 				*match_level = MLX5_MATCH_L2;
2490 	/* ***  L2 attributes parsing up to here *** */
2491 			else
2492 				*match_level = MLX5_MATCH_L3;
2493 		}
2494 	}
2495 
2496 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2497 		struct flow_match_basic match;
2498 
2499 		flow_rule_match_basic(rule, &match);
2500 		ip_proto = match.key->ip_proto;
2501 
2502 		MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
2503 			 match.mask->ip_proto);
2504 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
2505 			 match.key->ip_proto);
2506 
2507 		if (match.mask->ip_proto)
2508 			*match_level = MLX5_MATCH_L3;
2509 	}
2510 
2511 	if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
2512 		struct flow_match_ipv4_addrs match;
2513 
2514 		flow_rule_match_ipv4_addrs(rule, &match);
2515 		memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2516 				    src_ipv4_src_ipv6.ipv4_layout.ipv4),
2517 		       &match.mask->src, sizeof(match.mask->src));
2518 		memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2519 				    src_ipv4_src_ipv6.ipv4_layout.ipv4),
2520 		       &match.key->src, sizeof(match.key->src));
2521 		memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2522 				    dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2523 		       &match.mask->dst, sizeof(match.mask->dst));
2524 		memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2525 				    dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2526 		       &match.key->dst, sizeof(match.key->dst));
2527 
2528 		if (match.mask->src || match.mask->dst)
2529 			*match_level = MLX5_MATCH_L3;
2530 	}
2531 
2532 	if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
2533 		struct flow_match_ipv6_addrs match;
2534 
2535 		flow_rule_match_ipv6_addrs(rule, &match);
2536 		memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2537 				    src_ipv4_src_ipv6.ipv6_layout.ipv6),
2538 		       &match.mask->src, sizeof(match.mask->src));
2539 		memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2540 				    src_ipv4_src_ipv6.ipv6_layout.ipv6),
2541 		       &match.key->src, sizeof(match.key->src));
2542 
2543 		memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2544 				    dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
2545 		       &match.mask->dst, sizeof(match.mask->dst));
2546 		memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2547 				    dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
2548 		       &match.key->dst, sizeof(match.key->dst));
2549 
2550 		if (ipv6_addr_type(&match.mask->src) != IPV6_ADDR_ANY ||
2551 		    ipv6_addr_type(&match.mask->dst) != IPV6_ADDR_ANY)
2552 			*match_level = MLX5_MATCH_L3;
2553 	}
2554 
2555 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IP)) {
2556 		struct flow_match_ip match;
2557 
2558 		flow_rule_match_ip(rule, &match);
2559 		MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn,
2560 			 match.mask->tos & 0x3);
2561 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn,
2562 			 match.key->tos & 0x3);
2563 
2564 		MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp,
2565 			 match.mask->tos >> 2);
2566 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp,
2567 			 match.key->tos  >> 2);
2568 
2569 		MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit,
2570 			 match.mask->ttl);
2571 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit,
2572 			 match.key->ttl);
2573 
2574 		if (match.mask->ttl &&
2575 		    !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
2576 						ft_field_support.outer_ipv4_ttl)) {
2577 			NL_SET_ERR_MSG_MOD(extack,
2578 					   "Matching on TTL is not supported");
2579 			return -EOPNOTSUPP;
2580 		}
2581 
2582 		if (match.mask->tos || match.mask->ttl)
2583 			*match_level = MLX5_MATCH_L3;
2584 	}
2585 
2586 	/* ***  L3 attributes parsing up to here *** */
2587 
2588 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
2589 		struct flow_match_ports match;
2590 
2591 		flow_rule_match_ports(rule, &match);
2592 		switch (ip_proto) {
2593 		case IPPROTO_TCP:
2594 			MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2595 				 tcp_sport, ntohs(match.mask->src));
2596 			MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2597 				 tcp_sport, ntohs(match.key->src));
2598 
2599 			MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2600 				 tcp_dport, ntohs(match.mask->dst));
2601 			MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2602 				 tcp_dport, ntohs(match.key->dst));
2603 			break;
2604 
2605 		case IPPROTO_UDP:
2606 			MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2607 				 udp_sport, ntohs(match.mask->src));
2608 			MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2609 				 udp_sport, ntohs(match.key->src));
2610 
2611 			MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2612 				 udp_dport, ntohs(match.mask->dst));
2613 			MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2614 				 udp_dport, ntohs(match.key->dst));
2615 			break;
2616 		default:
2617 			NL_SET_ERR_MSG_MOD(extack,
2618 					   "Only UDP and TCP transports are supported for L4 matching");
2619 			netdev_err(priv->netdev,
2620 				   "Only UDP and TCP transport are supported\n");
2621 			return -EINVAL;
2622 		}
2623 
2624 		if (match.mask->src || match.mask->dst)
2625 			*match_level = MLX5_MATCH_L4;
2626 	}
2627 
2628 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_TCP)) {
2629 		struct flow_match_tcp match;
2630 
2631 		flow_rule_match_tcp(rule, &match);
2632 		MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
2633 			 ntohs(match.mask->flags));
2634 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
2635 			 ntohs(match.key->flags));
2636 
2637 		if (match.mask->flags)
2638 			*match_level = MLX5_MATCH_L4;
2639 	}
2640 
2641 	/* Currenlty supported only for MPLS over UDP */
2642 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_MPLS) &&
2643 	    !netif_is_bareudp(filter_dev)) {
2644 		NL_SET_ERR_MSG_MOD(extack,
2645 				   "Matching on MPLS is supported only for MPLS over UDP");
2646 		netdev_err(priv->netdev,
2647 			   "Matching on MPLS is supported only for MPLS over UDP\n");
2648 		return -EOPNOTSUPP;
2649 	}
2650 
2651 	return 0;
2652 }
2653 
parse_cls_flower(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,struct mlx5_flow_spec * spec,struct flow_cls_offload * f,struct net_device * filter_dev)2654 static int parse_cls_flower(struct mlx5e_priv *priv,
2655 			    struct mlx5e_tc_flow *flow,
2656 			    struct mlx5_flow_spec *spec,
2657 			    struct flow_cls_offload *f,
2658 			    struct net_device *filter_dev)
2659 {
2660 	u8 inner_match_level, outer_match_level, non_tunnel_match_level;
2661 	struct netlink_ext_ack *extack = f->common.extack;
2662 	struct mlx5_core_dev *dev = priv->mdev;
2663 	struct mlx5_eswitch *esw = dev->priv.eswitch;
2664 	struct mlx5e_rep_priv *rpriv = priv->ppriv;
2665 	struct mlx5_eswitch_rep *rep;
2666 	bool is_eswitch_flow;
2667 	int err;
2668 
2669 	inner_match_level = MLX5_MATCH_NONE;
2670 	outer_match_level = MLX5_MATCH_NONE;
2671 
2672 	err = __parse_cls_flower(priv, flow, spec, f, filter_dev,
2673 				 &inner_match_level, &outer_match_level);
2674 	non_tunnel_match_level = (inner_match_level == MLX5_MATCH_NONE) ?
2675 				 outer_match_level : inner_match_level;
2676 
2677 	is_eswitch_flow = mlx5e_is_eswitch_flow(flow);
2678 	if (!err && is_eswitch_flow) {
2679 		rep = rpriv->rep;
2680 		if (rep->vport != MLX5_VPORT_UPLINK &&
2681 		    (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
2682 		    esw->offloads.inline_mode < non_tunnel_match_level)) {
2683 			NL_SET_ERR_MSG_MOD(extack,
2684 					   "Flow is not offloaded due to min inline setting");
2685 			netdev_warn(priv->netdev,
2686 				    "Flow is not offloaded due to min inline setting, required %d actual %d\n",
2687 				    non_tunnel_match_level, esw->offloads.inline_mode);
2688 			return -EOPNOTSUPP;
2689 		}
2690 	}
2691 
2692 	flow->attr->inner_match_level = inner_match_level;
2693 	flow->attr->outer_match_level = outer_match_level;
2694 
2695 
2696 	return err;
2697 }
2698 
2699 struct pedit_headers {
2700 	struct ethhdr  eth;
2701 	struct vlan_hdr vlan;
2702 	struct iphdr   ip4;
2703 	struct ipv6hdr ip6;
2704 	struct tcphdr  tcp;
2705 	struct udphdr  udp;
2706 };
2707 
2708 struct pedit_headers_action {
2709 	struct pedit_headers	vals;
2710 	struct pedit_headers	masks;
2711 	u32			pedits;
2712 };
2713 
2714 static int pedit_header_offsets[] = {
2715 	[FLOW_ACT_MANGLE_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
2716 	[FLOW_ACT_MANGLE_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
2717 	[FLOW_ACT_MANGLE_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
2718 	[FLOW_ACT_MANGLE_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
2719 	[FLOW_ACT_MANGLE_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
2720 };
2721 
2722 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
2723 
set_pedit_val(u8 hdr_type,u32 mask,u32 val,u32 offset,struct pedit_headers_action * hdrs)2724 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
2725 			 struct pedit_headers_action *hdrs)
2726 {
2727 	u32 *curr_pmask, *curr_pval;
2728 
2729 	curr_pmask = (u32 *)(pedit_header(&hdrs->masks, hdr_type) + offset);
2730 	curr_pval  = (u32 *)(pedit_header(&hdrs->vals, hdr_type) + offset);
2731 
2732 	if (*curr_pmask & mask)  /* disallow acting twice on the same location */
2733 		goto out_err;
2734 
2735 	*curr_pmask |= mask;
2736 	*curr_pval  |= (val & mask);
2737 
2738 	return 0;
2739 
2740 out_err:
2741 	return -EOPNOTSUPP;
2742 }
2743 
2744 struct mlx5_fields {
2745 	u8  field;
2746 	u8  field_bsize;
2747 	u32 field_mask;
2748 	u32 offset;
2749 	u32 match_offset;
2750 };
2751 
2752 #define OFFLOAD(fw_field, field_bsize, field_mask, field, off, match_field) \
2753 		{MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, field_bsize, field_mask, \
2754 		 offsetof(struct pedit_headers, field) + (off), \
2755 		 MLX5_BYTE_OFF(fte_match_set_lyr_2_4, match_field)}
2756 
2757 /* masked values are the same and there are no rewrites that do not have a
2758  * match.
2759  */
2760 #define SAME_VAL_MASK(type, valp, maskp, matchvalp, matchmaskp) ({ \
2761 	type matchmaskx = *(type *)(matchmaskp); \
2762 	type matchvalx = *(type *)(matchvalp); \
2763 	type maskx = *(type *)(maskp); \
2764 	type valx = *(type *)(valp); \
2765 	\
2766 	(valx & maskx) == (matchvalx & matchmaskx) && !(maskx & (maskx ^ \
2767 								 matchmaskx)); \
2768 })
2769 
cmp_val_mask(void * valp,void * maskp,void * matchvalp,void * matchmaskp,u8 bsize)2770 static bool cmp_val_mask(void *valp, void *maskp, void *matchvalp,
2771 			 void *matchmaskp, u8 bsize)
2772 {
2773 	bool same = false;
2774 
2775 	switch (bsize) {
2776 	case 8:
2777 		same = SAME_VAL_MASK(u8, valp, maskp, matchvalp, matchmaskp);
2778 		break;
2779 	case 16:
2780 		same = SAME_VAL_MASK(u16, valp, maskp, matchvalp, matchmaskp);
2781 		break;
2782 	case 32:
2783 		same = SAME_VAL_MASK(u32, valp, maskp, matchvalp, matchmaskp);
2784 		break;
2785 	}
2786 
2787 	return same;
2788 }
2789 
2790 static struct mlx5_fields fields[] = {
2791 	OFFLOAD(DMAC_47_16, 32, U32_MAX, eth.h_dest[0], 0, dmac_47_16),
2792 	OFFLOAD(DMAC_15_0,  16, U16_MAX, eth.h_dest[4], 0, dmac_15_0),
2793 	OFFLOAD(SMAC_47_16, 32, U32_MAX, eth.h_source[0], 0, smac_47_16),
2794 	OFFLOAD(SMAC_15_0,  16, U16_MAX, eth.h_source[4], 0, smac_15_0),
2795 	OFFLOAD(ETHERTYPE,  16, U16_MAX, eth.h_proto, 0, ethertype),
2796 	OFFLOAD(FIRST_VID,  16, U16_MAX, vlan.h_vlan_TCI, 0, first_vid),
2797 
2798 	OFFLOAD(IP_DSCP, 8,    0xfc, ip4.tos,   0, ip_dscp),
2799 	OFFLOAD(IP_TTL,  8,  U8_MAX, ip4.ttl,   0, ttl_hoplimit),
2800 	OFFLOAD(SIPV4,  32, U32_MAX, ip4.saddr, 0, src_ipv4_src_ipv6.ipv4_layout.ipv4),
2801 	OFFLOAD(DIPV4,  32, U32_MAX, ip4.daddr, 0, dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2802 
2803 	OFFLOAD(SIPV6_127_96, 32, U32_MAX, ip6.saddr.s6_addr32[0], 0,
2804 		src_ipv4_src_ipv6.ipv6_layout.ipv6[0]),
2805 	OFFLOAD(SIPV6_95_64,  32, U32_MAX, ip6.saddr.s6_addr32[1], 0,
2806 		src_ipv4_src_ipv6.ipv6_layout.ipv6[4]),
2807 	OFFLOAD(SIPV6_63_32,  32, U32_MAX, ip6.saddr.s6_addr32[2], 0,
2808 		src_ipv4_src_ipv6.ipv6_layout.ipv6[8]),
2809 	OFFLOAD(SIPV6_31_0,   32, U32_MAX, ip6.saddr.s6_addr32[3], 0,
2810 		src_ipv4_src_ipv6.ipv6_layout.ipv6[12]),
2811 	OFFLOAD(DIPV6_127_96, 32, U32_MAX, ip6.daddr.s6_addr32[0], 0,
2812 		dst_ipv4_dst_ipv6.ipv6_layout.ipv6[0]),
2813 	OFFLOAD(DIPV6_95_64,  32, U32_MAX, ip6.daddr.s6_addr32[1], 0,
2814 		dst_ipv4_dst_ipv6.ipv6_layout.ipv6[4]),
2815 	OFFLOAD(DIPV6_63_32,  32, U32_MAX, ip6.daddr.s6_addr32[2], 0,
2816 		dst_ipv4_dst_ipv6.ipv6_layout.ipv6[8]),
2817 	OFFLOAD(DIPV6_31_0,   32, U32_MAX, ip6.daddr.s6_addr32[3], 0,
2818 		dst_ipv4_dst_ipv6.ipv6_layout.ipv6[12]),
2819 	OFFLOAD(IPV6_HOPLIMIT, 8,  U8_MAX, ip6.hop_limit, 0, ttl_hoplimit),
2820 	OFFLOAD(IP_DSCP, 16,  0xc00f, ip6, 0, ip_dscp),
2821 
2822 	OFFLOAD(TCP_SPORT, 16, U16_MAX, tcp.source,  0, tcp_sport),
2823 	OFFLOAD(TCP_DPORT, 16, U16_MAX, tcp.dest,    0, tcp_dport),
2824 	/* in linux iphdr tcp_flags is 8 bits long */
2825 	OFFLOAD(TCP_FLAGS,  8,  U8_MAX, tcp.ack_seq, 5, tcp_flags),
2826 
2827 	OFFLOAD(UDP_SPORT, 16, U16_MAX, udp.source, 0, udp_sport),
2828 	OFFLOAD(UDP_DPORT, 16, U16_MAX, udp.dest,   0, udp_dport),
2829 };
2830 
mask_to_le(unsigned long mask,int size)2831 static unsigned long mask_to_le(unsigned long mask, int size)
2832 {
2833 	__be32 mask_be32;
2834 	__be16 mask_be16;
2835 
2836 	if (size == 32) {
2837 		mask_be32 = (__force __be32)(mask);
2838 		mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
2839 	} else if (size == 16) {
2840 		mask_be32 = (__force __be32)(mask);
2841 		mask_be16 = *(__be16 *)&mask_be32;
2842 		mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
2843 	}
2844 
2845 	return mask;
2846 }
offload_pedit_fields(struct mlx5e_priv * priv,int namespace,struct pedit_headers_action * hdrs,struct mlx5e_tc_flow_parse_attr * parse_attr,u32 * action_flags,struct netlink_ext_ack * extack)2847 static int offload_pedit_fields(struct mlx5e_priv *priv,
2848 				int namespace,
2849 				struct pedit_headers_action *hdrs,
2850 				struct mlx5e_tc_flow_parse_attr *parse_attr,
2851 				u32 *action_flags,
2852 				struct netlink_ext_ack *extack)
2853 {
2854 	struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
2855 	int i, action_size, first, last, next_z;
2856 	void *headers_c, *headers_v, *action, *vals_p;
2857 	u32 *s_masks_p, *a_masks_p, s_mask, a_mask;
2858 	struct mlx5e_tc_mod_hdr_acts *mod_acts;
2859 	struct mlx5_fields *f;
2860 	unsigned long mask, field_mask;
2861 	int err;
2862 	u8 cmd;
2863 
2864 	mod_acts = &parse_attr->mod_hdr_acts;
2865 	headers_c = get_match_headers_criteria(*action_flags, &parse_attr->spec);
2866 	headers_v = get_match_headers_value(*action_flags, &parse_attr->spec);
2867 
2868 	set_masks = &hdrs[0].masks;
2869 	add_masks = &hdrs[1].masks;
2870 	set_vals = &hdrs[0].vals;
2871 	add_vals = &hdrs[1].vals;
2872 
2873 	action_size = MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto);
2874 
2875 	for (i = 0; i < ARRAY_SIZE(fields); i++) {
2876 		bool skip;
2877 
2878 		f = &fields[i];
2879 		/* avoid seeing bits set from previous iterations */
2880 		s_mask = 0;
2881 		a_mask = 0;
2882 
2883 		s_masks_p = (void *)set_masks + f->offset;
2884 		a_masks_p = (void *)add_masks + f->offset;
2885 
2886 		s_mask = *s_masks_p & f->field_mask;
2887 		a_mask = *a_masks_p & f->field_mask;
2888 
2889 		if (!s_mask && !a_mask) /* nothing to offload here */
2890 			continue;
2891 
2892 		if (s_mask && a_mask) {
2893 			NL_SET_ERR_MSG_MOD(extack,
2894 					   "can't set and add to the same HW field");
2895 			printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
2896 			return -EOPNOTSUPP;
2897 		}
2898 
2899 		skip = false;
2900 		if (s_mask) {
2901 			void *match_mask = headers_c + f->match_offset;
2902 			void *match_val = headers_v + f->match_offset;
2903 
2904 			cmd  = MLX5_ACTION_TYPE_SET;
2905 			mask = s_mask;
2906 			vals_p = (void *)set_vals + f->offset;
2907 			/* don't rewrite if we have a match on the same value */
2908 			if (cmp_val_mask(vals_p, s_masks_p, match_val,
2909 					 match_mask, f->field_bsize))
2910 				skip = true;
2911 			/* clear to denote we consumed this field */
2912 			*s_masks_p &= ~f->field_mask;
2913 		} else {
2914 			cmd  = MLX5_ACTION_TYPE_ADD;
2915 			mask = a_mask;
2916 			vals_p = (void *)add_vals + f->offset;
2917 			/* add 0 is no change */
2918 			if ((*(u32 *)vals_p & f->field_mask) == 0)
2919 				skip = true;
2920 			/* clear to denote we consumed this field */
2921 			*a_masks_p &= ~f->field_mask;
2922 		}
2923 		if (skip)
2924 			continue;
2925 
2926 		mask = mask_to_le(mask, f->field_bsize);
2927 
2928 		first = find_first_bit(&mask, f->field_bsize);
2929 		next_z = find_next_zero_bit(&mask, f->field_bsize, first);
2930 		last  = find_last_bit(&mask, f->field_bsize);
2931 		if (first < next_z && next_z < last) {
2932 			NL_SET_ERR_MSG_MOD(extack,
2933 					   "rewrite of few sub-fields isn't supported");
2934 			printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
2935 			       mask);
2936 			return -EOPNOTSUPP;
2937 		}
2938 
2939 		err = alloc_mod_hdr_actions(priv->mdev, namespace, mod_acts);
2940 		if (err) {
2941 			NL_SET_ERR_MSG_MOD(extack,
2942 					   "too many pedit actions, can't offload");
2943 			mlx5_core_warn(priv->mdev,
2944 				       "mlx5: parsed %d pedit actions, can't do more\n",
2945 				       mod_acts->num_actions);
2946 			return err;
2947 		}
2948 
2949 		action = mod_acts->actions +
2950 			 (mod_acts->num_actions * action_size);
2951 		MLX5_SET(set_action_in, action, action_type, cmd);
2952 		MLX5_SET(set_action_in, action, field, f->field);
2953 
2954 		if (cmd == MLX5_ACTION_TYPE_SET) {
2955 			int start;
2956 
2957 			field_mask = mask_to_le(f->field_mask, f->field_bsize);
2958 
2959 			/* if field is bit sized it can start not from first bit */
2960 			start = find_first_bit(&field_mask, f->field_bsize);
2961 
2962 			MLX5_SET(set_action_in, action, offset, first - start);
2963 			/* length is num of bits to be written, zero means length of 32 */
2964 			MLX5_SET(set_action_in, action, length, (last - first + 1));
2965 		}
2966 
2967 		if (f->field_bsize == 32)
2968 			MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
2969 		else if (f->field_bsize == 16)
2970 			MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
2971 		else if (f->field_bsize == 8)
2972 			MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
2973 
2974 		++mod_acts->num_actions;
2975 	}
2976 
2977 	return 0;
2978 }
2979 
mlx5e_flow_namespace_max_modify_action(struct mlx5_core_dev * mdev,int namespace)2980 static int mlx5e_flow_namespace_max_modify_action(struct mlx5_core_dev *mdev,
2981 						  int namespace)
2982 {
2983 	if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
2984 		return MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, max_modify_header_actions);
2985 	else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
2986 		return MLX5_CAP_FLOWTABLE_NIC_RX(mdev, max_modify_header_actions);
2987 }
2988 
alloc_mod_hdr_actions(struct mlx5_core_dev * mdev,int namespace,struct mlx5e_tc_mod_hdr_acts * mod_hdr_acts)2989 int alloc_mod_hdr_actions(struct mlx5_core_dev *mdev,
2990 			  int namespace,
2991 			  struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts)
2992 {
2993 	int action_size, new_num_actions, max_hw_actions;
2994 	size_t new_sz, old_sz;
2995 	void *ret;
2996 
2997 	if (mod_hdr_acts->num_actions < mod_hdr_acts->max_actions)
2998 		return 0;
2999 
3000 	action_size = MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto);
3001 
3002 	max_hw_actions = mlx5e_flow_namespace_max_modify_action(mdev,
3003 								namespace);
3004 	new_num_actions = min(max_hw_actions,
3005 			      mod_hdr_acts->actions ?
3006 			      mod_hdr_acts->max_actions * 2 : 1);
3007 	if (mod_hdr_acts->max_actions == new_num_actions)
3008 		return -ENOSPC;
3009 
3010 	new_sz = action_size * new_num_actions;
3011 	old_sz = mod_hdr_acts->max_actions * action_size;
3012 	ret = krealloc(mod_hdr_acts->actions, new_sz, GFP_KERNEL);
3013 	if (!ret)
3014 		return -ENOMEM;
3015 
3016 	memset(ret + old_sz, 0, new_sz - old_sz);
3017 	mod_hdr_acts->actions = ret;
3018 	mod_hdr_acts->max_actions = new_num_actions;
3019 
3020 	return 0;
3021 }
3022 
dealloc_mod_hdr_actions(struct mlx5e_tc_mod_hdr_acts * mod_hdr_acts)3023 void dealloc_mod_hdr_actions(struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts)
3024 {
3025 	kfree(mod_hdr_acts->actions);
3026 	mod_hdr_acts->actions = NULL;
3027 	mod_hdr_acts->num_actions = 0;
3028 	mod_hdr_acts->max_actions = 0;
3029 }
3030 
3031 static const struct pedit_headers zero_masks = {};
3032 
3033 static int
parse_pedit_to_modify_hdr(struct mlx5e_priv * priv,const struct flow_action_entry * act,int namespace,struct mlx5e_tc_flow_parse_attr * parse_attr,struct pedit_headers_action * hdrs,struct netlink_ext_ack * extack)3034 parse_pedit_to_modify_hdr(struct mlx5e_priv *priv,
3035 			  const struct flow_action_entry *act, int namespace,
3036 			  struct mlx5e_tc_flow_parse_attr *parse_attr,
3037 			  struct pedit_headers_action *hdrs,
3038 			  struct netlink_ext_ack *extack)
3039 {
3040 	u8 cmd = (act->id == FLOW_ACTION_MANGLE) ? 0 : 1;
3041 	int err = -EOPNOTSUPP;
3042 	u32 mask, val, offset;
3043 	u8 htype;
3044 
3045 	htype = act->mangle.htype;
3046 	err = -EOPNOTSUPP; /* can't be all optimistic */
3047 
3048 	if (htype == FLOW_ACT_MANGLE_UNSPEC) {
3049 		NL_SET_ERR_MSG_MOD(extack, "legacy pedit isn't offloaded");
3050 		goto out_err;
3051 	}
3052 
3053 	if (!mlx5e_flow_namespace_max_modify_action(priv->mdev, namespace)) {
3054 		NL_SET_ERR_MSG_MOD(extack,
3055 				   "The pedit offload action is not supported");
3056 		goto out_err;
3057 	}
3058 
3059 	mask = act->mangle.mask;
3060 	val = act->mangle.val;
3061 	offset = act->mangle.offset;
3062 
3063 	err = set_pedit_val(htype, ~mask, val, offset, &hdrs[cmd]);
3064 	if (err)
3065 		goto out_err;
3066 
3067 	hdrs[cmd].pedits++;
3068 
3069 	return 0;
3070 out_err:
3071 	return err;
3072 }
3073 
3074 static int
parse_pedit_to_reformat(struct mlx5e_priv * priv,const struct flow_action_entry * act,struct mlx5e_tc_flow_parse_attr * parse_attr,struct netlink_ext_ack * extack)3075 parse_pedit_to_reformat(struct mlx5e_priv *priv,
3076 			const struct flow_action_entry *act,
3077 			struct mlx5e_tc_flow_parse_attr *parse_attr,
3078 			struct netlink_ext_ack *extack)
3079 {
3080 	u32 mask, val, offset;
3081 	u32 *p;
3082 
3083 	if (act->id != FLOW_ACTION_MANGLE)
3084 		return -EOPNOTSUPP;
3085 
3086 	if (act->mangle.htype != FLOW_ACT_MANGLE_HDR_TYPE_ETH) {
3087 		NL_SET_ERR_MSG_MOD(extack, "Only Ethernet modification is supported");
3088 		return -EOPNOTSUPP;
3089 	}
3090 
3091 	mask = ~act->mangle.mask;
3092 	val = act->mangle.val;
3093 	offset = act->mangle.offset;
3094 	p = (u32 *)&parse_attr->eth;
3095 	*(p + (offset >> 2)) |= (val & mask);
3096 
3097 	return 0;
3098 }
3099 
parse_tc_pedit_action(struct mlx5e_priv * priv,const struct flow_action_entry * act,int namespace,struct mlx5e_tc_flow_parse_attr * parse_attr,struct pedit_headers_action * hdrs,struct mlx5e_tc_flow * flow,struct netlink_ext_ack * extack)3100 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
3101 				 const struct flow_action_entry *act, int namespace,
3102 				 struct mlx5e_tc_flow_parse_attr *parse_attr,
3103 				 struct pedit_headers_action *hdrs,
3104 				 struct mlx5e_tc_flow *flow,
3105 				 struct netlink_ext_ack *extack)
3106 {
3107 	if (flow && flow_flag_test(flow, L3_TO_L2_DECAP))
3108 		return parse_pedit_to_reformat(priv, act, parse_attr, extack);
3109 
3110 	return parse_pedit_to_modify_hdr(priv, act, namespace,
3111 					 parse_attr, hdrs, extack);
3112 }
3113 
alloc_tc_pedit_action(struct mlx5e_priv * priv,int namespace,struct mlx5e_tc_flow_parse_attr * parse_attr,struct pedit_headers_action * hdrs,u32 * action_flags,struct netlink_ext_ack * extack)3114 static int alloc_tc_pedit_action(struct mlx5e_priv *priv, int namespace,
3115 				 struct mlx5e_tc_flow_parse_attr *parse_attr,
3116 				 struct pedit_headers_action *hdrs,
3117 				 u32 *action_flags,
3118 				 struct netlink_ext_ack *extack)
3119 {
3120 	struct pedit_headers *cmd_masks;
3121 	int err;
3122 	u8 cmd;
3123 
3124 	err = offload_pedit_fields(priv, namespace, hdrs, parse_attr,
3125 				   action_flags, extack);
3126 	if (err < 0)
3127 		goto out_dealloc_parsed_actions;
3128 
3129 	for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
3130 		cmd_masks = &hdrs[cmd].masks;
3131 		if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
3132 			NL_SET_ERR_MSG_MOD(extack,
3133 					   "attempt to offload an unsupported field");
3134 			netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
3135 			print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
3136 				       16, 1, cmd_masks, sizeof(zero_masks), true);
3137 			err = -EOPNOTSUPP;
3138 			goto out_dealloc_parsed_actions;
3139 		}
3140 	}
3141 
3142 	return 0;
3143 
3144 out_dealloc_parsed_actions:
3145 	dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
3146 	return err;
3147 }
3148 
csum_offload_supported(struct mlx5e_priv * priv,u32 action,u32 update_flags,struct netlink_ext_ack * extack)3149 static bool csum_offload_supported(struct mlx5e_priv *priv,
3150 				   u32 action,
3151 				   u32 update_flags,
3152 				   struct netlink_ext_ack *extack)
3153 {
3154 	u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
3155 			 TCA_CSUM_UPDATE_FLAG_UDP;
3156 
3157 	/*  The HW recalcs checksums only if re-writing headers */
3158 	if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
3159 		NL_SET_ERR_MSG_MOD(extack,
3160 				   "TC csum action is only offloaded with pedit");
3161 		netdev_warn(priv->netdev,
3162 			    "TC csum action is only offloaded with pedit\n");
3163 		return false;
3164 	}
3165 
3166 	if (update_flags & ~prot_flags) {
3167 		NL_SET_ERR_MSG_MOD(extack,
3168 				   "can't offload TC csum action for some header/s");
3169 		netdev_warn(priv->netdev,
3170 			    "can't offload TC csum action for some header/s - flags %#x\n",
3171 			    update_flags);
3172 		return false;
3173 	}
3174 
3175 	return true;
3176 }
3177 
3178 struct ip_ttl_word {
3179 	__u8	ttl;
3180 	__u8	protocol;
3181 	__sum16	check;
3182 };
3183 
3184 struct ipv6_hoplimit_word {
3185 	__be16	payload_len;
3186 	__u8	nexthdr;
3187 	__u8	hop_limit;
3188 };
3189 
is_action_keys_supported(const struct flow_action_entry * act,bool ct_flow,bool * modify_ip_header,bool * modify_tuple,struct netlink_ext_ack * extack)3190 static int is_action_keys_supported(const struct flow_action_entry *act,
3191 				    bool ct_flow, bool *modify_ip_header,
3192 				    bool *modify_tuple,
3193 				    struct netlink_ext_ack *extack)
3194 {
3195 	u32 mask, offset;
3196 	u8 htype;
3197 
3198 	htype = act->mangle.htype;
3199 	offset = act->mangle.offset;
3200 	mask = ~act->mangle.mask;
3201 	/* For IPv4 & IPv6 header check 4 byte word,
3202 	 * to determine that modified fields
3203 	 * are NOT ttl & hop_limit only.
3204 	 */
3205 	if (htype == FLOW_ACT_MANGLE_HDR_TYPE_IP4) {
3206 		struct ip_ttl_word *ttl_word =
3207 			(struct ip_ttl_word *)&mask;
3208 
3209 		if (offset != offsetof(struct iphdr, ttl) ||
3210 		    ttl_word->protocol ||
3211 		    ttl_word->check) {
3212 			*modify_ip_header = true;
3213 		}
3214 
3215 		if (offset >= offsetof(struct iphdr, saddr))
3216 			*modify_tuple = true;
3217 
3218 		if (ct_flow && *modify_tuple) {
3219 			NL_SET_ERR_MSG_MOD(extack,
3220 					   "can't offload re-write of ipv4 address with action ct");
3221 			return -EOPNOTSUPP;
3222 		}
3223 	} else if (htype == FLOW_ACT_MANGLE_HDR_TYPE_IP6) {
3224 		struct ipv6_hoplimit_word *hoplimit_word =
3225 			(struct ipv6_hoplimit_word *)&mask;
3226 
3227 		if (offset != offsetof(struct ipv6hdr, payload_len) ||
3228 		    hoplimit_word->payload_len ||
3229 		    hoplimit_word->nexthdr) {
3230 			*modify_ip_header = true;
3231 		}
3232 
3233 		if (ct_flow && offset >= offsetof(struct ipv6hdr, saddr))
3234 			*modify_tuple = true;
3235 
3236 		if (ct_flow && *modify_tuple) {
3237 			NL_SET_ERR_MSG_MOD(extack,
3238 					   "can't offload re-write of ipv6 address with action ct");
3239 			return -EOPNOTSUPP;
3240 		}
3241 	} else if (htype == FLOW_ACT_MANGLE_HDR_TYPE_TCP ||
3242 		   htype == FLOW_ACT_MANGLE_HDR_TYPE_UDP) {
3243 		*modify_tuple = true;
3244 		if (ct_flow) {
3245 			NL_SET_ERR_MSG_MOD(extack,
3246 					   "can't offload re-write of transport header ports with action ct");
3247 			return -EOPNOTSUPP;
3248 		}
3249 	}
3250 
3251 	return 0;
3252 }
3253 
modify_tuple_supported(bool modify_tuple,bool ct_clear,bool ct_flow,struct netlink_ext_ack * extack,struct mlx5e_priv * priv,struct mlx5_flow_spec * spec)3254 static bool modify_tuple_supported(bool modify_tuple, bool ct_clear,
3255 				   bool ct_flow, struct netlink_ext_ack *extack,
3256 				   struct mlx5e_priv *priv,
3257 				   struct mlx5_flow_spec *spec)
3258 {
3259 	if (!modify_tuple || ct_clear)
3260 		return true;
3261 
3262 	if (ct_flow) {
3263 		NL_SET_ERR_MSG_MOD(extack,
3264 				   "can't offload tuple modification with non-clear ct()");
3265 		netdev_info(priv->netdev,
3266 			    "can't offload tuple modification with non-clear ct()");
3267 		return false;
3268 	}
3269 
3270 	/* Add ct_state=-trk match so it will be offloaded for non ct flows
3271 	 * (or after clear action), as otherwise, since the tuple is changed,
3272 	 * we can't restore ct state
3273 	 */
3274 	if (mlx5_tc_ct_add_no_trk_match(spec)) {
3275 		NL_SET_ERR_MSG_MOD(extack,
3276 				   "can't offload tuple modification with ct matches and no ct(clear) action");
3277 		netdev_info(priv->netdev,
3278 			    "can't offload tuple modification with ct matches and no ct(clear) action");
3279 		return false;
3280 	}
3281 
3282 	return true;
3283 }
3284 
modify_header_match_supported(struct mlx5e_priv * priv,struct mlx5_flow_spec * spec,struct flow_action * flow_action,u32 actions,bool ct_flow,bool ct_clear,struct netlink_ext_ack * extack)3285 static bool modify_header_match_supported(struct mlx5e_priv *priv,
3286 					  struct mlx5_flow_spec *spec,
3287 					  struct flow_action *flow_action,
3288 					  u32 actions, bool ct_flow,
3289 					  bool ct_clear,
3290 					  struct netlink_ext_ack *extack)
3291 {
3292 	const struct flow_action_entry *act;
3293 	bool modify_ip_header, modify_tuple;
3294 	void *headers_c;
3295 	void *headers_v;
3296 	u16 ethertype;
3297 	u8 ip_proto;
3298 	int i, err;
3299 
3300 	headers_c = get_match_headers_criteria(actions, spec);
3301 	headers_v = get_match_headers_value(actions, spec);
3302 	ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
3303 
3304 	/* for non-IP we only re-write MACs, so we're okay */
3305 	if (MLX5_GET(fte_match_set_lyr_2_4, headers_c, ip_version) == 0 &&
3306 	    ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
3307 		goto out_ok;
3308 
3309 	modify_ip_header = false;
3310 	modify_tuple = false;
3311 	flow_action_for_each(i, act, flow_action) {
3312 		if (act->id != FLOW_ACTION_MANGLE &&
3313 		    act->id != FLOW_ACTION_ADD)
3314 			continue;
3315 
3316 		err = is_action_keys_supported(act, ct_flow,
3317 					       &modify_ip_header,
3318 					       &modify_tuple, extack);
3319 		if (err)
3320 			return err;
3321 	}
3322 
3323 	if (!modify_tuple_supported(modify_tuple, ct_clear, ct_flow, extack,
3324 				    priv, spec))
3325 		return false;
3326 
3327 	ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
3328 	if (modify_ip_header && ip_proto != IPPROTO_TCP &&
3329 	    ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
3330 		NL_SET_ERR_MSG_MOD(extack,
3331 				   "can't offload re-write of non TCP/UDP");
3332 		netdev_info(priv->netdev, "can't offload re-write of ip proto %d\n",
3333 			    ip_proto);
3334 		return false;
3335 	}
3336 
3337 out_ok:
3338 	return true;
3339 }
3340 
actions_match_supported(struct mlx5e_priv * priv,struct flow_action * flow_action,struct mlx5e_tc_flow_parse_attr * parse_attr,struct mlx5e_tc_flow * flow,struct netlink_ext_ack * extack)3341 static bool actions_match_supported(struct mlx5e_priv *priv,
3342 				    struct flow_action *flow_action,
3343 				    struct mlx5e_tc_flow_parse_attr *parse_attr,
3344 				    struct mlx5e_tc_flow *flow,
3345 				    struct netlink_ext_ack *extack)
3346 {
3347 	bool ct_flow = false, ct_clear = false;
3348 	u32 actions;
3349 
3350 	ct_clear = flow->attr->ct_attr.ct_action &
3351 		TCA_CT_ACT_CLEAR;
3352 	ct_flow = flow_flag_test(flow, CT) && !ct_clear;
3353 	actions = flow->attr->action;
3354 
3355 	if (mlx5e_is_eswitch_flow(flow)) {
3356 		if (flow->attr->esw_attr->split_count && ct_flow) {
3357 			/* All registers used by ct are cleared when using
3358 			 * split rules.
3359 			 */
3360 			NL_SET_ERR_MSG_MOD(extack,
3361 					   "Can't offload mirroring with action ct");
3362 			return false;
3363 		}
3364 	}
3365 
3366 	if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
3367 		return modify_header_match_supported(priv, &parse_attr->spec,
3368 						     flow_action, actions,
3369 						     ct_flow, ct_clear,
3370 						     extack);
3371 
3372 	return true;
3373 }
3374 
same_port_devs(struct mlx5e_priv * priv,struct mlx5e_priv * peer_priv)3375 static bool same_port_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
3376 {
3377 	return priv->mdev == peer_priv->mdev;
3378 }
3379 
same_hw_devs(struct mlx5e_priv * priv,struct mlx5e_priv * peer_priv)3380 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
3381 {
3382 	struct mlx5_core_dev *fmdev, *pmdev;
3383 	u64 fsystem_guid, psystem_guid;
3384 
3385 	fmdev = priv->mdev;
3386 	pmdev = peer_priv->mdev;
3387 
3388 	fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
3389 	psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
3390 
3391 	return (fsystem_guid == psystem_guid);
3392 }
3393 
add_vlan_rewrite_action(struct mlx5e_priv * priv,int namespace,const struct flow_action_entry * act,struct mlx5e_tc_flow_parse_attr * parse_attr,struct pedit_headers_action * hdrs,u32 * action,struct netlink_ext_ack * extack)3394 static int add_vlan_rewrite_action(struct mlx5e_priv *priv, int namespace,
3395 				   const struct flow_action_entry *act,
3396 				   struct mlx5e_tc_flow_parse_attr *parse_attr,
3397 				   struct pedit_headers_action *hdrs,
3398 				   u32 *action, struct netlink_ext_ack *extack)
3399 {
3400 	u16 mask16 = VLAN_VID_MASK;
3401 	u16 val16 = act->vlan.vid & VLAN_VID_MASK;
3402 	const struct flow_action_entry pedit_act = {
3403 		.id = FLOW_ACTION_MANGLE,
3404 		.mangle.htype = FLOW_ACT_MANGLE_HDR_TYPE_ETH,
3405 		.mangle.offset = offsetof(struct vlan_ethhdr, h_vlan_TCI),
3406 		.mangle.mask = ~(u32)be16_to_cpu(*(__be16 *)&mask16),
3407 		.mangle.val = (u32)be16_to_cpu(*(__be16 *)&val16),
3408 	};
3409 	u8 match_prio_mask, match_prio_val;
3410 	void *headers_c, *headers_v;
3411 	int err;
3412 
3413 	headers_c = get_match_headers_criteria(*action, &parse_attr->spec);
3414 	headers_v = get_match_headers_value(*action, &parse_attr->spec);
3415 
3416 	if (!(MLX5_GET(fte_match_set_lyr_2_4, headers_c, cvlan_tag) &&
3417 	      MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag))) {
3418 		NL_SET_ERR_MSG_MOD(extack,
3419 				   "VLAN rewrite action must have VLAN protocol match");
3420 		return -EOPNOTSUPP;
3421 	}
3422 
3423 	match_prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
3424 	match_prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
3425 	if (act->vlan.prio != (match_prio_val & match_prio_mask)) {
3426 		NL_SET_ERR_MSG_MOD(extack,
3427 				   "Changing VLAN prio is not supported");
3428 		return -EOPNOTSUPP;
3429 	}
3430 
3431 	err = parse_tc_pedit_action(priv, &pedit_act, namespace, parse_attr, hdrs, NULL, extack);
3432 	*action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3433 
3434 	return err;
3435 }
3436 
3437 static int
add_vlan_prio_tag_rewrite_action(struct mlx5e_priv * priv,struct mlx5e_tc_flow_parse_attr * parse_attr,struct pedit_headers_action * hdrs,u32 * action,struct netlink_ext_ack * extack)3438 add_vlan_prio_tag_rewrite_action(struct mlx5e_priv *priv,
3439 				 struct mlx5e_tc_flow_parse_attr *parse_attr,
3440 				 struct pedit_headers_action *hdrs,
3441 				 u32 *action, struct netlink_ext_ack *extack)
3442 {
3443 	const struct flow_action_entry prio_tag_act = {
3444 		.vlan.vid = 0,
3445 		.vlan.prio =
3446 			MLX5_GET(fte_match_set_lyr_2_4,
3447 				 get_match_headers_value(*action,
3448 							 &parse_attr->spec),
3449 				 first_prio) &
3450 			MLX5_GET(fte_match_set_lyr_2_4,
3451 				 get_match_headers_criteria(*action,
3452 							    &parse_attr->spec),
3453 				 first_prio),
3454 	};
3455 
3456 	return add_vlan_rewrite_action(priv, MLX5_FLOW_NAMESPACE_FDB,
3457 				       &prio_tag_act, parse_attr, hdrs, action,
3458 				       extack);
3459 }
3460 
validate_goto_chain(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,const struct flow_action_entry * act,u32 actions,struct netlink_ext_ack * extack)3461 static int validate_goto_chain(struct mlx5e_priv *priv,
3462 			       struct mlx5e_tc_flow *flow,
3463 			       const struct flow_action_entry *act,
3464 			       u32 actions,
3465 			       struct netlink_ext_ack *extack)
3466 {
3467 	bool is_esw = mlx5e_is_eswitch_flow(flow);
3468 	struct mlx5_flow_attr *attr = flow->attr;
3469 	bool ft_flow = mlx5e_is_ft_flow(flow);
3470 	u32 dest_chain = act->chain_index;
3471 	struct mlx5_fs_chains *chains;
3472 	struct mlx5_eswitch *esw;
3473 	u32 reformat_and_fwd;
3474 	u32 max_chain;
3475 
3476 	esw = priv->mdev->priv.eswitch;
3477 	chains = is_esw ? esw_chains(esw) : nic_chains(priv);
3478 	max_chain = mlx5_chains_get_chain_range(chains);
3479 	reformat_and_fwd = is_esw ?
3480 			   MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, reformat_and_fwd_to_table) :
3481 			   MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, reformat_and_fwd_to_table);
3482 
3483 	if (ft_flow) {
3484 		NL_SET_ERR_MSG_MOD(extack, "Goto action is not supported");
3485 		return -EOPNOTSUPP;
3486 	}
3487 
3488 	if (!mlx5_chains_backwards_supported(chains) &&
3489 	    dest_chain <= attr->chain) {
3490 		NL_SET_ERR_MSG_MOD(extack,
3491 				   "Goto lower numbered chain isn't supported");
3492 		return -EOPNOTSUPP;
3493 	}
3494 
3495 	if (dest_chain > max_chain) {
3496 		NL_SET_ERR_MSG_MOD(extack,
3497 				   "Requested destination chain is out of supported range");
3498 		return -EOPNOTSUPP;
3499 	}
3500 
3501 	if (actions & (MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |
3502 		       MLX5_FLOW_CONTEXT_ACTION_DECAP) &&
3503 	    !reformat_and_fwd) {
3504 		NL_SET_ERR_MSG_MOD(extack,
3505 				   "Goto chain is not allowed if action has reformat or decap");
3506 		return -EOPNOTSUPP;
3507 	}
3508 
3509 	return 0;
3510 }
3511 
parse_tc_nic_actions(struct mlx5e_priv * priv,struct flow_action * flow_action,struct mlx5e_tc_flow_parse_attr * parse_attr,struct mlx5e_tc_flow * flow,struct netlink_ext_ack * extack)3512 static int parse_tc_nic_actions(struct mlx5e_priv *priv,
3513 				struct flow_action *flow_action,
3514 				struct mlx5e_tc_flow_parse_attr *parse_attr,
3515 				struct mlx5e_tc_flow *flow,
3516 				struct netlink_ext_ack *extack)
3517 {
3518 	struct mlx5_flow_attr *attr = flow->attr;
3519 	struct pedit_headers_action hdrs[2] = {};
3520 	const struct flow_action_entry *act;
3521 	struct mlx5_nic_flow_attr *nic_attr;
3522 	u32 action = 0;
3523 	int err, i;
3524 
3525 	if (!flow_action_has_entries(flow_action))
3526 		return -EINVAL;
3527 
3528 	if (!flow_action_hw_stats_check(flow_action, extack,
3529 					FLOW_ACTION_HW_STATS_DELAYED_BIT))
3530 		return -EOPNOTSUPP;
3531 
3532 	nic_attr = attr->nic_attr;
3533 
3534 	nic_attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
3535 
3536 	flow_action_for_each(i, act, flow_action) {
3537 		switch (act->id) {
3538 		case FLOW_ACTION_ACCEPT:
3539 			action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
3540 				  MLX5_FLOW_CONTEXT_ACTION_COUNT;
3541 			break;
3542 		case FLOW_ACTION_DROP:
3543 			action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
3544 			if (MLX5_CAP_FLOWTABLE(priv->mdev,
3545 					       flow_table_properties_nic_receive.flow_counter))
3546 				action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3547 			break;
3548 		case FLOW_ACTION_MANGLE:
3549 		case FLOW_ACTION_ADD:
3550 			err = parse_tc_pedit_action(priv, act, MLX5_FLOW_NAMESPACE_KERNEL,
3551 						    parse_attr, hdrs, NULL, extack);
3552 			if (err)
3553 				return err;
3554 
3555 			action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3556 			break;
3557 		case FLOW_ACTION_VLAN_MANGLE:
3558 			err = add_vlan_rewrite_action(priv,
3559 						      MLX5_FLOW_NAMESPACE_KERNEL,
3560 						      act, parse_attr, hdrs,
3561 						      &action, extack);
3562 			if (err)
3563 				return err;
3564 
3565 			break;
3566 		case FLOW_ACTION_CSUM:
3567 			if (csum_offload_supported(priv, action,
3568 						   act->csum_flags,
3569 						   extack))
3570 				break;
3571 
3572 			return -EOPNOTSUPP;
3573 		case FLOW_ACTION_REDIRECT: {
3574 			struct net_device *peer_dev = act->dev;
3575 
3576 			if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
3577 			    same_hw_devs(priv, netdev_priv(peer_dev))) {
3578 				parse_attr->mirred_ifindex[0] = peer_dev->ifindex;
3579 				flow_flag_set(flow, HAIRPIN);
3580 				action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
3581 					  MLX5_FLOW_CONTEXT_ACTION_COUNT;
3582 			} else {
3583 				NL_SET_ERR_MSG_MOD(extack,
3584 						   "device is not on same HW, can't offload");
3585 				netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
3586 					    peer_dev->name);
3587 				return -EINVAL;
3588 			}
3589 			}
3590 			break;
3591 		case FLOW_ACTION_MARK: {
3592 			u32 mark = act->mark;
3593 
3594 			if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
3595 				NL_SET_ERR_MSG_MOD(extack,
3596 						   "Bad flow mark - only 16 bit is supported");
3597 				return -EINVAL;
3598 			}
3599 
3600 			nic_attr->flow_tag = mark;
3601 			action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3602 			}
3603 			break;
3604 		case FLOW_ACTION_GOTO:
3605 			err = validate_goto_chain(priv, flow, act, action,
3606 						  extack);
3607 			if (err)
3608 				return err;
3609 
3610 			action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3611 			attr->dest_chain = act->chain_index;
3612 			break;
3613 		case FLOW_ACTION_CT:
3614 			err = mlx5_tc_ct_parse_action(get_ct_priv(priv), attr, act, extack);
3615 			if (err)
3616 				return err;
3617 
3618 			flow_flag_set(flow, CT);
3619 			break;
3620 		default:
3621 			NL_SET_ERR_MSG_MOD(extack, "The offload action is not supported");
3622 			return -EOPNOTSUPP;
3623 		}
3624 	}
3625 
3626 	if (hdrs[TCA_PEDIT_KEY_EX_CMD_SET].pedits ||
3627 	    hdrs[TCA_PEDIT_KEY_EX_CMD_ADD].pedits) {
3628 		err = alloc_tc_pedit_action(priv, MLX5_FLOW_NAMESPACE_KERNEL,
3629 					    parse_attr, hdrs, &action, extack);
3630 		if (err)
3631 			return err;
3632 		/* in case all pedit actions are skipped, remove the MOD_HDR
3633 		 * flag.
3634 		 */
3635 		if (parse_attr->mod_hdr_acts.num_actions == 0) {
3636 			action &= ~MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3637 			dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
3638 		}
3639 	}
3640 
3641 	attr->action = action;
3642 
3643 	if (attr->dest_chain) {
3644 		if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
3645 			NL_SET_ERR_MSG(extack, "Mirroring goto chain rules isn't supported");
3646 			return -EOPNOTSUPP;
3647 		}
3648 		attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3649 	}
3650 
3651 	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
3652 		attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3653 
3654 	if (!actions_match_supported(priv, flow_action, parse_attr, flow, extack))
3655 		return -EOPNOTSUPP;
3656 
3657 	return 0;
3658 }
3659 
3660 struct encap_key {
3661 	const struct ip_tunnel_key *ip_tun_key;
3662 	struct mlx5e_tc_tunnel *tc_tunnel;
3663 };
3664 
cmp_encap_info(struct encap_key * a,struct encap_key * b)3665 static inline int cmp_encap_info(struct encap_key *a,
3666 				 struct encap_key *b)
3667 {
3668 	return memcmp(a->ip_tun_key, b->ip_tun_key, sizeof(*a->ip_tun_key)) ||
3669 	       a->tc_tunnel->tunnel_type != b->tc_tunnel->tunnel_type;
3670 }
3671 
cmp_decap_info(struct mlx5e_decap_key * a,struct mlx5e_decap_key * b)3672 static inline int cmp_decap_info(struct mlx5e_decap_key *a,
3673 				 struct mlx5e_decap_key *b)
3674 {
3675 	return memcmp(&a->key, &b->key, sizeof(b->key));
3676 }
3677 
hash_encap_info(struct encap_key * key)3678 static inline int hash_encap_info(struct encap_key *key)
3679 {
3680 	return jhash(key->ip_tun_key, sizeof(*key->ip_tun_key),
3681 		     key->tc_tunnel->tunnel_type);
3682 }
3683 
hash_decap_info(struct mlx5e_decap_key * key)3684 static inline int hash_decap_info(struct mlx5e_decap_key *key)
3685 {
3686 	return jhash(&key->key, sizeof(key->key), 0);
3687 }
3688 
is_merged_eswitch_vfs(struct mlx5e_priv * priv,struct net_device * peer_netdev)3689 static bool is_merged_eswitch_vfs(struct mlx5e_priv *priv,
3690 				  struct net_device *peer_netdev)
3691 {
3692 	struct mlx5e_priv *peer_priv;
3693 
3694 	peer_priv = netdev_priv(peer_netdev);
3695 
3696 	return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
3697 		mlx5e_eswitch_vf_rep(priv->netdev) &&
3698 		mlx5e_eswitch_vf_rep(peer_netdev) &&
3699 		same_hw_devs(priv, peer_priv));
3700 }
3701 
mlx5e_encap_take(struct mlx5e_encap_entry * e)3702 bool mlx5e_encap_take(struct mlx5e_encap_entry *e)
3703 {
3704 	return refcount_inc_not_zero(&e->refcnt);
3705 }
3706 
mlx5e_decap_take(struct mlx5e_decap_entry * e)3707 static bool mlx5e_decap_take(struct mlx5e_decap_entry *e)
3708 {
3709 	return refcount_inc_not_zero(&e->refcnt);
3710 }
3711 
3712 static struct mlx5e_encap_entry *
mlx5e_encap_get(struct mlx5e_priv * priv,struct encap_key * key,uintptr_t hash_key)3713 mlx5e_encap_get(struct mlx5e_priv *priv, struct encap_key *key,
3714 		uintptr_t hash_key)
3715 {
3716 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3717 	struct mlx5e_encap_entry *e;
3718 	struct encap_key e_key;
3719 
3720 	hash_for_each_possible_rcu(esw->offloads.encap_tbl, e,
3721 				   encap_hlist, hash_key) {
3722 		e_key.ip_tun_key = &e->tun_info->key;
3723 		e_key.tc_tunnel = e->tunnel;
3724 		if (!cmp_encap_info(&e_key, key) &&
3725 		    mlx5e_encap_take(e))
3726 			return e;
3727 	}
3728 
3729 	return NULL;
3730 }
3731 
3732 static struct mlx5e_decap_entry *
mlx5e_decap_get(struct mlx5e_priv * priv,struct mlx5e_decap_key * key,uintptr_t hash_key)3733 mlx5e_decap_get(struct mlx5e_priv *priv, struct mlx5e_decap_key *key,
3734 		uintptr_t hash_key)
3735 {
3736 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3737 	struct mlx5e_decap_key r_key;
3738 	struct mlx5e_decap_entry *e;
3739 
3740 	hash_for_each_possible_rcu(esw->offloads.decap_tbl, e,
3741 				   hlist, hash_key) {
3742 		r_key = e->key;
3743 		if (!cmp_decap_info(&r_key, key) &&
3744 		    mlx5e_decap_take(e))
3745 			return e;
3746 	}
3747 	return NULL;
3748 }
3749 
dup_tun_info(const struct ip_tunnel_info * tun_info)3750 static struct ip_tunnel_info *dup_tun_info(const struct ip_tunnel_info *tun_info)
3751 {
3752 	size_t tun_size = sizeof(*tun_info) + tun_info->options_len;
3753 
3754 	return kmemdup(tun_info, tun_size, GFP_KERNEL);
3755 }
3756 
is_duplicated_encap_entry(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,int out_index,struct mlx5e_encap_entry * e,struct netlink_ext_ack * extack)3757 static bool is_duplicated_encap_entry(struct mlx5e_priv *priv,
3758 				      struct mlx5e_tc_flow *flow,
3759 				      int out_index,
3760 				      struct mlx5e_encap_entry *e,
3761 				      struct netlink_ext_ack *extack)
3762 {
3763 	int i;
3764 
3765 	for (i = 0; i < out_index; i++) {
3766 		if (flow->encaps[i].e != e)
3767 			continue;
3768 		NL_SET_ERR_MSG_MOD(extack, "can't duplicate encap action");
3769 		netdev_err(priv->netdev, "can't duplicate encap action\n");
3770 		return true;
3771 	}
3772 
3773 	return false;
3774 }
3775 
mlx5e_attach_encap(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,struct net_device * mirred_dev,int out_index,struct netlink_ext_ack * extack,struct net_device ** encap_dev,bool * encap_valid)3776 static int mlx5e_attach_encap(struct mlx5e_priv *priv,
3777 			      struct mlx5e_tc_flow *flow,
3778 			      struct net_device *mirred_dev,
3779 			      int out_index,
3780 			      struct netlink_ext_ack *extack,
3781 			      struct net_device **encap_dev,
3782 			      bool *encap_valid)
3783 {
3784 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3785 	struct mlx5e_tc_flow_parse_attr *parse_attr;
3786 	struct mlx5_flow_attr *attr = flow->attr;
3787 	const struct ip_tunnel_info *tun_info;
3788 	struct encap_key key;
3789 	struct mlx5e_encap_entry *e;
3790 	unsigned short family;
3791 	uintptr_t hash_key;
3792 	int err = 0;
3793 
3794 	parse_attr = attr->parse_attr;
3795 	tun_info = parse_attr->tun_info[out_index];
3796 	family = ip_tunnel_info_af(tun_info);
3797 	key.ip_tun_key = &tun_info->key;
3798 	key.tc_tunnel = mlx5e_get_tc_tun(mirred_dev);
3799 	if (!key.tc_tunnel) {
3800 		NL_SET_ERR_MSG_MOD(extack, "Unsupported tunnel");
3801 		return -EOPNOTSUPP;
3802 	}
3803 
3804 	hash_key = hash_encap_info(&key);
3805 
3806 	mutex_lock(&esw->offloads.encap_tbl_lock);
3807 	e = mlx5e_encap_get(priv, &key, hash_key);
3808 
3809 	/* must verify if encap is valid or not */
3810 	if (e) {
3811 		/* Check that entry was not already attached to this flow */
3812 		if (is_duplicated_encap_entry(priv, flow, out_index, e, extack)) {
3813 			err = -EOPNOTSUPP;
3814 			goto out_err;
3815 		}
3816 
3817 		mutex_unlock(&esw->offloads.encap_tbl_lock);
3818 		wait_for_completion(&e->res_ready);
3819 
3820 		/* Protect against concurrent neigh update. */
3821 		mutex_lock(&esw->offloads.encap_tbl_lock);
3822 		if (e->compl_result < 0) {
3823 			err = -EREMOTEIO;
3824 			goto out_err;
3825 		}
3826 		goto attach_flow;
3827 	}
3828 
3829 	e = kzalloc(sizeof(*e), GFP_KERNEL);
3830 	if (!e) {
3831 		err = -ENOMEM;
3832 		goto out_err;
3833 	}
3834 
3835 	refcount_set(&e->refcnt, 1);
3836 	init_completion(&e->res_ready);
3837 
3838 	tun_info = dup_tun_info(tun_info);
3839 	if (!tun_info) {
3840 		err = -ENOMEM;
3841 		goto out_err_init;
3842 	}
3843 	e->tun_info = tun_info;
3844 	err = mlx5e_tc_tun_init_encap_attr(mirred_dev, priv, e, extack);
3845 	if (err)
3846 		goto out_err_init;
3847 
3848 	INIT_LIST_HEAD(&e->flows);
3849 	hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key);
3850 	mutex_unlock(&esw->offloads.encap_tbl_lock);
3851 
3852 	if (family == AF_INET)
3853 		err = mlx5e_tc_tun_create_header_ipv4(priv, mirred_dev, e);
3854 	else if (family == AF_INET6)
3855 		err = mlx5e_tc_tun_create_header_ipv6(priv, mirred_dev, e);
3856 
3857 	/* Protect against concurrent neigh update. */
3858 	mutex_lock(&esw->offloads.encap_tbl_lock);
3859 	complete_all(&e->res_ready);
3860 	if (err) {
3861 		e->compl_result = err;
3862 		goto out_err;
3863 	}
3864 	e->compl_result = 1;
3865 
3866 attach_flow:
3867 	flow->encaps[out_index].e = e;
3868 	list_add(&flow->encaps[out_index].list, &e->flows);
3869 	flow->encaps[out_index].index = out_index;
3870 	*encap_dev = e->out_dev;
3871 	if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
3872 		attr->esw_attr->dests[out_index].pkt_reformat = e->pkt_reformat;
3873 		attr->esw_attr->dests[out_index].flags |= MLX5_ESW_DEST_ENCAP_VALID;
3874 		*encap_valid = true;
3875 	} else {
3876 		*encap_valid = false;
3877 	}
3878 	mutex_unlock(&esw->offloads.encap_tbl_lock);
3879 
3880 	return err;
3881 
3882 out_err:
3883 	mutex_unlock(&esw->offloads.encap_tbl_lock);
3884 	if (e)
3885 		mlx5e_encap_put(priv, e);
3886 	return err;
3887 
3888 out_err_init:
3889 	mutex_unlock(&esw->offloads.encap_tbl_lock);
3890 	kfree(tun_info);
3891 	kfree(e);
3892 	return err;
3893 }
3894 
mlx5e_attach_decap(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,struct netlink_ext_ack * extack)3895 static int mlx5e_attach_decap(struct mlx5e_priv *priv,
3896 			      struct mlx5e_tc_flow *flow,
3897 			      struct netlink_ext_ack *extack)
3898 {
3899 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3900 	struct mlx5_esw_flow_attr *attr = flow->attr->esw_attr;
3901 	struct mlx5e_tc_flow_parse_attr *parse_attr;
3902 	struct mlx5e_decap_entry *d;
3903 	struct mlx5e_decap_key key;
3904 	uintptr_t hash_key;
3905 	int err = 0;
3906 
3907 	parse_attr = flow->attr->parse_attr;
3908 	if (sizeof(parse_attr->eth) > MLX5_CAP_ESW(priv->mdev, max_encap_header_size)) {
3909 		NL_SET_ERR_MSG_MOD(extack,
3910 				   "encap header larger than max supported");
3911 		return -EOPNOTSUPP;
3912 	}
3913 
3914 	key.key = parse_attr->eth;
3915 	hash_key = hash_decap_info(&key);
3916 	mutex_lock(&esw->offloads.decap_tbl_lock);
3917 	d = mlx5e_decap_get(priv, &key, hash_key);
3918 	if (d) {
3919 		mutex_unlock(&esw->offloads.decap_tbl_lock);
3920 		wait_for_completion(&d->res_ready);
3921 		mutex_lock(&esw->offloads.decap_tbl_lock);
3922 		if (d->compl_result) {
3923 			err = -EREMOTEIO;
3924 			goto out_free;
3925 		}
3926 		goto found;
3927 	}
3928 
3929 	d = kzalloc(sizeof(*d), GFP_KERNEL);
3930 	if (!d) {
3931 		err = -ENOMEM;
3932 		goto out_err;
3933 	}
3934 
3935 	d->key = key;
3936 	refcount_set(&d->refcnt, 1);
3937 	init_completion(&d->res_ready);
3938 	INIT_LIST_HEAD(&d->flows);
3939 	hash_add_rcu(esw->offloads.decap_tbl, &d->hlist, hash_key);
3940 	mutex_unlock(&esw->offloads.decap_tbl_lock);
3941 
3942 	d->pkt_reformat = mlx5_packet_reformat_alloc(priv->mdev,
3943 						     MLX5_REFORMAT_TYPE_L3_TUNNEL_TO_L2,
3944 						     sizeof(parse_attr->eth),
3945 						     &parse_attr->eth,
3946 						     MLX5_FLOW_NAMESPACE_FDB);
3947 	if (IS_ERR(d->pkt_reformat)) {
3948 		err = PTR_ERR(d->pkt_reformat);
3949 		d->compl_result = err;
3950 	}
3951 	mutex_lock(&esw->offloads.decap_tbl_lock);
3952 	complete_all(&d->res_ready);
3953 	if (err)
3954 		goto out_free;
3955 
3956 found:
3957 	flow->decap_reformat = d;
3958 	attr->decap_pkt_reformat = d->pkt_reformat;
3959 	list_add(&flow->l3_to_l2_reformat, &d->flows);
3960 	mutex_unlock(&esw->offloads.decap_tbl_lock);
3961 	return 0;
3962 
3963 out_free:
3964 	mutex_unlock(&esw->offloads.decap_tbl_lock);
3965 	mlx5e_decap_put(priv, d);
3966 	return err;
3967 
3968 out_err:
3969 	mutex_unlock(&esw->offloads.decap_tbl_lock);
3970 	return err;
3971 }
3972 
parse_tc_vlan_action(struct mlx5e_priv * priv,const struct flow_action_entry * act,struct mlx5_esw_flow_attr * attr,u32 * action)3973 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
3974 				const struct flow_action_entry *act,
3975 				struct mlx5_esw_flow_attr *attr,
3976 				u32 *action)
3977 {
3978 	u8 vlan_idx = attr->total_vlan;
3979 
3980 	if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
3981 		return -EOPNOTSUPP;
3982 
3983 	switch (act->id) {
3984 	case FLOW_ACTION_VLAN_POP:
3985 		if (vlan_idx) {
3986 			if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
3987 								 MLX5_FS_VLAN_DEPTH))
3988 				return -EOPNOTSUPP;
3989 
3990 			*action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
3991 		} else {
3992 			*action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
3993 		}
3994 		break;
3995 	case FLOW_ACTION_VLAN_PUSH:
3996 		attr->vlan_vid[vlan_idx] = act->vlan.vid;
3997 		attr->vlan_prio[vlan_idx] = act->vlan.prio;
3998 		attr->vlan_proto[vlan_idx] = act->vlan.proto;
3999 		if (!attr->vlan_proto[vlan_idx])
4000 			attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
4001 
4002 		if (vlan_idx) {
4003 			if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
4004 								 MLX5_FS_VLAN_DEPTH))
4005 				return -EOPNOTSUPP;
4006 
4007 			*action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
4008 		} else {
4009 			if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
4010 			    (act->vlan.proto != htons(ETH_P_8021Q) ||
4011 			     act->vlan.prio))
4012 				return -EOPNOTSUPP;
4013 
4014 			*action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
4015 		}
4016 		break;
4017 	default:
4018 		return -EINVAL;
4019 	}
4020 
4021 	attr->total_vlan = vlan_idx + 1;
4022 
4023 	return 0;
4024 }
4025 
get_fdb_out_dev(struct net_device * uplink_dev,struct net_device * out_dev)4026 static struct net_device *get_fdb_out_dev(struct net_device *uplink_dev,
4027 					  struct net_device *out_dev)
4028 {
4029 	struct net_device *fdb_out_dev = out_dev;
4030 	struct net_device *uplink_upper;
4031 
4032 	rcu_read_lock();
4033 	uplink_upper = netdev_master_upper_dev_get_rcu(uplink_dev);
4034 	if (uplink_upper && netif_is_lag_master(uplink_upper) &&
4035 	    uplink_upper == out_dev) {
4036 		fdb_out_dev = uplink_dev;
4037 	} else if (netif_is_lag_master(out_dev)) {
4038 		fdb_out_dev = bond_option_active_slave_get_rcu(netdev_priv(out_dev));
4039 		if (fdb_out_dev &&
4040 		    (!mlx5e_eswitch_rep(fdb_out_dev) ||
4041 		     !netdev_port_same_parent_id(fdb_out_dev, uplink_dev)))
4042 			fdb_out_dev = NULL;
4043 	}
4044 	rcu_read_unlock();
4045 	return fdb_out_dev;
4046 }
4047 
add_vlan_push_action(struct mlx5e_priv * priv,struct mlx5_flow_attr * attr,struct net_device ** out_dev,u32 * action)4048 static int add_vlan_push_action(struct mlx5e_priv *priv,
4049 				struct mlx5_flow_attr *attr,
4050 				struct net_device **out_dev,
4051 				u32 *action)
4052 {
4053 	struct net_device *vlan_dev = *out_dev;
4054 	struct flow_action_entry vlan_act = {
4055 		.id = FLOW_ACTION_VLAN_PUSH,
4056 		.vlan.vid = vlan_dev_vlan_id(vlan_dev),
4057 		.vlan.proto = vlan_dev_vlan_proto(vlan_dev),
4058 		.vlan.prio = 0,
4059 	};
4060 	int err;
4061 
4062 	err = parse_tc_vlan_action(priv, &vlan_act, attr->esw_attr, action);
4063 	if (err)
4064 		return err;
4065 
4066 	rcu_read_lock();
4067 	*out_dev = dev_get_by_index_rcu(dev_net(vlan_dev), dev_get_iflink(vlan_dev));
4068 	rcu_read_unlock();
4069 	if (!*out_dev)
4070 		return -ENODEV;
4071 
4072 	if (is_vlan_dev(*out_dev))
4073 		err = add_vlan_push_action(priv, attr, out_dev, action);
4074 
4075 	return err;
4076 }
4077 
add_vlan_pop_action(struct mlx5e_priv * priv,struct mlx5_flow_attr * attr,u32 * action)4078 static int add_vlan_pop_action(struct mlx5e_priv *priv,
4079 			       struct mlx5_flow_attr *attr,
4080 			       u32 *action)
4081 {
4082 	struct flow_action_entry vlan_act = {
4083 		.id = FLOW_ACTION_VLAN_POP,
4084 	};
4085 	int nest_level, err = 0;
4086 
4087 	nest_level = attr->parse_attr->filter_dev->lower_level -
4088 						priv->netdev->lower_level;
4089 	while (nest_level--) {
4090 		err = parse_tc_vlan_action(priv, &vlan_act, attr->esw_attr, action);
4091 		if (err)
4092 			return err;
4093 	}
4094 
4095 	return err;
4096 }
4097 
same_hw_reps(struct mlx5e_priv * priv,struct net_device * peer_netdev)4098 static bool same_hw_reps(struct mlx5e_priv *priv,
4099 			 struct net_device *peer_netdev)
4100 {
4101 	struct mlx5e_priv *peer_priv;
4102 
4103 	peer_priv = netdev_priv(peer_netdev);
4104 
4105 	return mlx5e_eswitch_rep(priv->netdev) &&
4106 	       mlx5e_eswitch_rep(peer_netdev) &&
4107 	       same_hw_devs(priv, peer_priv);
4108 }
4109 
is_lag_dev(struct mlx5e_priv * priv,struct net_device * peer_netdev)4110 static bool is_lag_dev(struct mlx5e_priv *priv,
4111 		       struct net_device *peer_netdev)
4112 {
4113 	return ((mlx5_lag_is_sriov(priv->mdev) ||
4114 		 mlx5_lag_is_multipath(priv->mdev)) &&
4115 		 same_hw_reps(priv, peer_netdev));
4116 }
4117 
mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv * priv,struct net_device * out_dev)4118 bool mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv *priv,
4119 				    struct net_device *out_dev)
4120 {
4121 	if (is_merged_eswitch_vfs(priv, out_dev))
4122 		return true;
4123 
4124 	if (is_lag_dev(priv, out_dev))
4125 		return true;
4126 
4127 	return mlx5e_eswitch_rep(out_dev) &&
4128 	       same_port_devs(priv, netdev_priv(out_dev));
4129 }
4130 
is_duplicated_output_device(struct net_device * dev,struct net_device * out_dev,int * ifindexes,int if_count,struct netlink_ext_ack * extack)4131 static bool is_duplicated_output_device(struct net_device *dev,
4132 					struct net_device *out_dev,
4133 					int *ifindexes, int if_count,
4134 					struct netlink_ext_ack *extack)
4135 {
4136 	int i;
4137 
4138 	for (i = 0; i < if_count; i++) {
4139 		if (ifindexes[i] == out_dev->ifindex) {
4140 			NL_SET_ERR_MSG_MOD(extack,
4141 					   "can't duplicate output to same device");
4142 			netdev_err(dev, "can't duplicate output to same device: %s\n",
4143 				   out_dev->name);
4144 			return true;
4145 		}
4146 	}
4147 
4148 	return false;
4149 }
4150 
verify_uplink_forwarding(struct mlx5e_priv * priv,struct mlx5e_tc_flow * flow,struct net_device * out_dev,struct netlink_ext_ack * extack)4151 static int verify_uplink_forwarding(struct mlx5e_priv *priv,
4152 				    struct mlx5e_tc_flow *flow,
4153 				    struct net_device *out_dev,
4154 				    struct netlink_ext_ack *extack)
4155 {
4156 	struct mlx5_esw_flow_attr *attr = flow->attr->esw_attr;
4157 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4158 	struct mlx5e_rep_priv *rep_priv;
4159 
4160 	/* Forwarding non encapsulated traffic between
4161 	 * uplink ports is allowed only if
4162 	 * termination_table_raw_traffic cap is set.
4163 	 *
4164 	 * Input vport was stored attr->in_rep.
4165 	 * In LAG case, *priv* is the private data of
4166 	 * uplink which may be not the input vport.
4167 	 */
4168 	rep_priv = mlx5e_rep_to_rep_priv(attr->in_rep);
4169 
4170 	if (!(mlx5e_eswitch_uplink_rep(rep_priv->netdev) &&
4171 	      mlx5e_eswitch_uplink_rep(out_dev)))
4172 		return 0;
4173 
4174 	if (!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev,
4175 					termination_table_raw_traffic)) {
4176 		NL_SET_ERR_MSG_MOD(extack,
4177 				   "devices are both uplink, can't offload forwarding");
4178 			pr_err("devices %s %s are both uplink, can't offload forwarding\n",
4179 			       priv->netdev->name, out_dev->name);
4180 			return -EOPNOTSUPP;
4181 	} else if (out_dev != rep_priv->netdev) {
4182 		NL_SET_ERR_MSG_MOD(extack,
4183 				   "devices are not the same uplink, can't offload forwarding");
4184 		pr_err("devices %s %s are both uplink but not the same, can't offload forwarding\n",
4185 		       priv->netdev->name, out_dev->name);
4186 		return -EOPNOTSUPP;
4187 	}
4188 	return 0;
4189 }
4190 
parse_tc_fdb_actions(struct mlx5e_priv * priv,struct flow_action * flow_action,struct mlx5e_tc_flow * flow,struct netlink_ext_ack * extack,struct net_device * filter_dev)4191 static int parse_tc_fdb_actions(struct mlx5e_priv *priv,
4192 				struct flow_action *flow_action,
4193 				struct mlx5e_tc_flow *flow,
4194 				struct netlink_ext_ack *extack,
4195 				struct net_device *filter_dev)
4196 {
4197 	struct pedit_headers_action hdrs[2] = {};
4198 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4199 	struct mlx5e_tc_flow_parse_attr *parse_attr;
4200 	struct mlx5e_rep_priv *rpriv = priv->ppriv;
4201 	const struct ip_tunnel_info *info = NULL;
4202 	struct mlx5_flow_attr *attr = flow->attr;
4203 	int ifindexes[MLX5_MAX_FLOW_FWD_VPORTS];
4204 	bool ft_flow = mlx5e_is_ft_flow(flow);
4205 	const struct flow_action_entry *act;
4206 	struct mlx5_esw_flow_attr *esw_attr;
4207 	bool encap = false, decap = false;
4208 	u32 action = attr->action;
4209 	int err, i, if_count = 0;
4210 	bool mpls_push = false;
4211 
4212 	if (!flow_action_has_entries(flow_action))
4213 		return -EINVAL;
4214 
4215 	if (!flow_action_hw_stats_check(flow_action, extack,
4216 					FLOW_ACTION_HW_STATS_DELAYED_BIT))
4217 		return -EOPNOTSUPP;
4218 
4219 	esw_attr = attr->esw_attr;
4220 	parse_attr = attr->parse_attr;
4221 
4222 	flow_action_for_each(i, act, flow_action) {
4223 		switch (act->id) {
4224 		case FLOW_ACTION_DROP:
4225 			action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
4226 				  MLX5_FLOW_CONTEXT_ACTION_COUNT;
4227 			break;
4228 		case FLOW_ACTION_TRAP:
4229 			if (!flow_offload_has_one_action(flow_action)) {
4230 				NL_SET_ERR_MSG_MOD(extack,
4231 						   "action trap is supported as a sole action only");
4232 				return -EOPNOTSUPP;
4233 			}
4234 			action |= (MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
4235 				   MLX5_FLOW_CONTEXT_ACTION_COUNT);
4236 			attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
4237 			break;
4238 		case FLOW_ACTION_MPLS_PUSH:
4239 			if (!MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
4240 							reformat_l2_to_l3_tunnel) ||
4241 			    act->mpls_push.proto != htons(ETH_P_MPLS_UC)) {
4242 				NL_SET_ERR_MSG_MOD(extack,
4243 						   "mpls push is supported only for mpls_uc protocol");
4244 				return -EOPNOTSUPP;
4245 			}
4246 			mpls_push = true;
4247 			break;
4248 		case FLOW_ACTION_MPLS_POP:
4249 			/* we only support mpls pop if it is the first action
4250 			 * and the filter net device is bareudp. Subsequent
4251 			 * actions can be pedit and the last can be mirred
4252 			 * egress redirect.
4253 			 */
4254 			if (i) {
4255 				NL_SET_ERR_MSG_MOD(extack,
4256 						   "mpls pop supported only as first action");
4257 				return -EOPNOTSUPP;
4258 			}
4259 			if (!netif_is_bareudp(filter_dev)) {
4260 				NL_SET_ERR_MSG_MOD(extack,
4261 						   "mpls pop supported only on bareudp devices");
4262 				return -EOPNOTSUPP;
4263 			}
4264 
4265 			parse_attr->eth.h_proto = act->mpls_pop.proto;
4266 			action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT;
4267 			flow_flag_set(flow, L3_TO_L2_DECAP);
4268 			break;
4269 		case FLOW_ACTION_MANGLE:
4270 		case FLOW_ACTION_ADD:
4271 			err = parse_tc_pedit_action(priv, act, MLX5_FLOW_NAMESPACE_FDB,
4272 						    parse_attr, hdrs, flow, extack);
4273 			if (err)
4274 				return err;
4275 
4276 			if (!flow_flag_test(flow, L3_TO_L2_DECAP)) {
4277 				action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
4278 				esw_attr->split_count = esw_attr->out_count;
4279 			}
4280 			break;
4281 		case FLOW_ACTION_CSUM:
4282 			if (csum_offload_supported(priv, action,
4283 						   act->csum_flags, extack))
4284 				break;
4285 
4286 			return -EOPNOTSUPP;
4287 		case FLOW_ACTION_REDIRECT:
4288 		case FLOW_ACTION_MIRRED: {
4289 			struct mlx5e_priv *out_priv;
4290 			struct net_device *out_dev;
4291 
4292 			out_dev = act->dev;
4293 			if (!out_dev) {
4294 				/* out_dev is NULL when filters with
4295 				 * non-existing mirred device are replayed to
4296 				 * the driver.
4297 				 */
4298 				return -EINVAL;
4299 			}
4300 
4301 			if (mpls_push && !netif_is_bareudp(out_dev)) {
4302 				NL_SET_ERR_MSG_MOD(extack,
4303 						   "mpls is supported only through a bareudp device");
4304 				return -EOPNOTSUPP;
4305 			}
4306 
4307 			if (ft_flow && out_dev == priv->netdev) {
4308 				/* Ignore forward to self rules generated
4309 				 * by adding both mlx5 devs to the flow table
4310 				 * block on a normal nft offload setup.
4311 				 */
4312 				return -EOPNOTSUPP;
4313 			}
4314 
4315 			if (esw_attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
4316 				NL_SET_ERR_MSG_MOD(extack,
4317 						   "can't support more output ports, can't offload forwarding");
4318 				netdev_warn(priv->netdev,
4319 					    "can't support more than %d output ports, can't offload forwarding\n",
4320 					    esw_attr->out_count);
4321 				return -EOPNOTSUPP;
4322 			}
4323 
4324 			action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
4325 				  MLX5_FLOW_CONTEXT_ACTION_COUNT;
4326 			if (encap) {
4327 				parse_attr->mirred_ifindex[esw_attr->out_count] =
4328 					out_dev->ifindex;
4329 				parse_attr->tun_info[esw_attr->out_count] = dup_tun_info(info);
4330 				if (!parse_attr->tun_info[esw_attr->out_count])
4331 					return -ENOMEM;
4332 				encap = false;
4333 				esw_attr->dests[esw_attr->out_count].flags |=
4334 					MLX5_ESW_DEST_ENCAP;
4335 				esw_attr->out_count++;
4336 				/* attr->dests[].rep is resolved when we
4337 				 * handle encap
4338 				 */
4339 			} else if (netdev_port_same_parent_id(priv->netdev, out_dev)) {
4340 				struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4341 				struct net_device *uplink_dev = mlx5_eswitch_uplink_get_proto_dev(esw, REP_ETH);
4342 
4343 				if (is_duplicated_output_device(priv->netdev,
4344 								out_dev,
4345 								ifindexes,
4346 								if_count,
4347 								extack))
4348 					return -EOPNOTSUPP;
4349 
4350 				ifindexes[if_count] = out_dev->ifindex;
4351 				if_count++;
4352 
4353 				out_dev = get_fdb_out_dev(uplink_dev, out_dev);
4354 				if (!out_dev)
4355 					return -ENODEV;
4356 
4357 				if (is_vlan_dev(out_dev)) {
4358 					err = add_vlan_push_action(priv, attr,
4359 								   &out_dev,
4360 								   &action);
4361 					if (err)
4362 						return err;
4363 				}
4364 
4365 				if (is_vlan_dev(parse_attr->filter_dev)) {
4366 					err = add_vlan_pop_action(priv, attr,
4367 								  &action);
4368 					if (err)
4369 						return err;
4370 				}
4371 
4372 				err = verify_uplink_forwarding(priv, flow, out_dev, extack);
4373 				if (err)
4374 					return err;
4375 
4376 				if (!mlx5e_is_valid_eswitch_fwd_dev(priv, out_dev)) {
4377 					NL_SET_ERR_MSG_MOD(extack,
4378 							   "devices are not on same switch HW, can't offload forwarding");
4379 					return -EOPNOTSUPP;
4380 				}
4381 
4382 				out_priv = netdev_priv(out_dev);
4383 				rpriv = out_priv->ppriv;
4384 				esw_attr->dests[esw_attr->out_count].rep = rpriv->rep;
4385 				esw_attr->dests[esw_attr->out_count].mdev = out_priv->mdev;
4386 				esw_attr->out_count++;
4387 			} else if (parse_attr->filter_dev != priv->netdev) {
4388 				/* All mlx5 devices are called to configure
4389 				 * high level device filters. Therefore, the
4390 				 * *attempt* to  install a filter on invalid
4391 				 * eswitch should not trigger an explicit error
4392 				 */
4393 				return -EINVAL;
4394 			} else {
4395 				NL_SET_ERR_MSG_MOD(extack,
4396 						   "devices are not on same switch HW, can't offload forwarding");
4397 				netdev_warn(priv->netdev,
4398 					    "devices %s %s not on same switch HW, can't offload forwarding\n",
4399 					    priv->netdev->name,
4400 					    out_dev->name);
4401 				return -EINVAL;
4402 			}
4403 			}
4404 			break;
4405 		case FLOW_ACTION_TUNNEL_ENCAP:
4406 			info = act->tunnel;
4407 			if (info)
4408 				encap = true;
4409 			else
4410 				return -EOPNOTSUPP;
4411 
4412 			break;
4413 		case FLOW_ACTION_VLAN_PUSH:
4414 		case FLOW_ACTION_VLAN_POP:
4415 			if (act->id == FLOW_ACTION_VLAN_PUSH &&
4416 			    (action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP)) {
4417 				/* Replace vlan pop+push with vlan modify */
4418 				action &= ~MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
4419 				err = add_vlan_rewrite_action(priv,
4420 							      MLX5_FLOW_NAMESPACE_FDB,
4421 							      act, parse_attr, hdrs,
4422 							      &action, extack);
4423 			} else {
4424 				err = parse_tc_vlan_action(priv, act, esw_attr, &action);
4425 			}
4426 			if (err)
4427 				return err;
4428 
4429 			esw_attr->split_count = esw_attr->out_count;
4430 			break;
4431 		case FLOW_ACTION_VLAN_MANGLE:
4432 			err = add_vlan_rewrite_action(priv,
4433 						      MLX5_FLOW_NAMESPACE_FDB,
4434 						      act, parse_attr, hdrs,
4435 						      &action, extack);
4436 			if (err)
4437 				return err;
4438 
4439 			esw_attr->split_count = esw_attr->out_count;
4440 			break;
4441 		case FLOW_ACTION_TUNNEL_DECAP:
4442 			decap = true;
4443 			break;
4444 		case FLOW_ACTION_GOTO:
4445 			err = validate_goto_chain(priv, flow, act, action,
4446 						  extack);
4447 			if (err)
4448 				return err;
4449 
4450 			action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
4451 			attr->dest_chain = act->chain_index;
4452 			break;
4453 		case FLOW_ACTION_CT:
4454 			err = mlx5_tc_ct_parse_action(get_ct_priv(priv), attr, act, extack);
4455 			if (err)
4456 				return err;
4457 
4458 			flow_flag_set(flow, CT);
4459 			break;
4460 		default:
4461 			NL_SET_ERR_MSG_MOD(extack, "The offload action is not supported");
4462 			return -EOPNOTSUPP;
4463 		}
4464 	}
4465 
4466 	if (MLX5_CAP_GEN(esw->dev, prio_tag_required) &&
4467 	    action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP) {
4468 		/* For prio tag mode, replace vlan pop with rewrite vlan prio
4469 		 * tag rewrite.
4470 		 */
4471 		action &= ~MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
4472 		err = add_vlan_prio_tag_rewrite_action(priv, parse_attr, hdrs,
4473 						       &action, extack);
4474 		if (err)
4475 			return err;
4476 	}
4477 
4478 	if (hdrs[TCA_PEDIT_KEY_EX_CMD_SET].pedits ||
4479 	    hdrs[TCA_PEDIT_KEY_EX_CMD_ADD].pedits) {
4480 		err = alloc_tc_pedit_action(priv, MLX5_FLOW_NAMESPACE_FDB,
4481 					    parse_attr, hdrs, &action, extack);
4482 		if (err)
4483 			return err;
4484 		/* in case all pedit actions are skipped, remove the MOD_HDR
4485 		 * flag. we might have set split_count either by pedit or
4486 		 * pop/push. if there is no pop/push either, reset it too.
4487 		 */
4488 		if (parse_attr->mod_hdr_acts.num_actions == 0) {
4489 			action &= ~MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
4490 			dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
4491 			if (!((action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP) ||
4492 			      (action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH)))
4493 				esw_attr->split_count = 0;
4494 		}
4495 	}
4496 
4497 	attr->action = action;
4498 	if (!actions_match_supported(priv, flow_action, parse_attr, flow, extack))
4499 		return -EOPNOTSUPP;
4500 
4501 	if (attr->dest_chain) {
4502 		if (decap) {
4503 			/* It can be supported if we'll create a mapping for
4504 			 * the tunnel device only (without tunnel), and set
4505 			 * this tunnel id with this decap flow.
4506 			 *
4507 			 * On restore (miss), we'll just set this saved tunnel
4508 			 * device.
4509 			 */
4510 
4511 			NL_SET_ERR_MSG(extack,
4512 				       "Decap with goto isn't supported");
4513 			netdev_warn(priv->netdev,
4514 				    "Decap with goto isn't supported");
4515 			return -EOPNOTSUPP;
4516 		}
4517 
4518 		if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
4519 			NL_SET_ERR_MSG_MOD(extack,
4520 					   "Mirroring goto chain rules isn't supported");
4521 			return -EOPNOTSUPP;
4522 		}
4523 		attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
4524 	}
4525 
4526 	if (!(attr->action &
4527 	      (MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | MLX5_FLOW_CONTEXT_ACTION_DROP))) {
4528 		NL_SET_ERR_MSG_MOD(extack,
4529 				   "Rule must have at least one forward/drop action");
4530 		return -EOPNOTSUPP;
4531 	}
4532 
4533 	if (esw_attr->split_count > 0 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
4534 		NL_SET_ERR_MSG_MOD(extack,
4535 				   "current firmware doesn't support split rule for port mirroring");
4536 		netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
4537 		return -EOPNOTSUPP;
4538 	}
4539 
4540 	return 0;
4541 }
4542 
get_flags(int flags,unsigned long * flow_flags)4543 static void get_flags(int flags, unsigned long *flow_flags)
4544 {
4545 	unsigned long __flow_flags = 0;
4546 
4547 	if (flags & MLX5_TC_FLAG(INGRESS))
4548 		__flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_INGRESS);
4549 	if (flags & MLX5_TC_FLAG(EGRESS))
4550 		__flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_EGRESS);
4551 
4552 	if (flags & MLX5_TC_FLAG(ESW_OFFLOAD))
4553 		__flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_ESWITCH);
4554 	if (flags & MLX5_TC_FLAG(NIC_OFFLOAD))
4555 		__flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_NIC);
4556 	if (flags & MLX5_TC_FLAG(FT_OFFLOAD))
4557 		__flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_FT);
4558 
4559 	*flow_flags = __flow_flags;
4560 }
4561 
4562 static const struct rhashtable_params tc_ht_params = {
4563 	.head_offset = offsetof(struct mlx5e_tc_flow, node),
4564 	.key_offset = offsetof(struct mlx5e_tc_flow, cookie),
4565 	.key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
4566 	.automatic_shrinking = true,
4567 };
4568 
get_tc_ht(struct mlx5e_priv * priv,unsigned long flags)4569 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv,
4570 				    unsigned long flags)
4571 {
4572 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4573 	struct mlx5e_rep_priv *uplink_rpriv;
4574 
4575 	if (flags & MLX5_TC_FLAG(ESW_OFFLOAD)) {
4576 		uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
4577 		return &uplink_rpriv->uplink_priv.tc_ht;
4578 	} else /* NIC offload */
4579 		return &priv->fs.tc.ht;
4580 }
4581 
is_peer_flow_needed(struct mlx5e_tc_flow * flow)4582 static bool is_peer_flow_needed(struct mlx5e_tc_flow *flow)
4583 {
4584 	struct mlx5_esw_flow_attr *esw_attr = flow->attr->esw_attr;
4585 	struct mlx5_flow_attr *attr = flow->attr;
4586 	bool is_rep_ingress = esw_attr->in_rep->vport != MLX5_VPORT_UPLINK &&
4587 		flow_flag_test(flow, INGRESS);
4588 	bool act_is_encap = !!(attr->action &
4589 			       MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT);
4590 	bool esw_paired = mlx5_devcom_is_paired(esw_attr->in_mdev->priv.devcom,
4591 						MLX5_DEVCOM_ESW_OFFLOADS);
4592 
4593 	if (!esw_paired)
4594 		return false;
4595 
4596 	if ((mlx5_lag_is_sriov(esw_attr->in_mdev) ||
4597 	     mlx5_lag_is_multipath(esw_attr->in_mdev)) &&
4598 	    (is_rep_ingress || act_is_encap))
4599 		return true;
4600 
4601 	return false;
4602 }
4603 
4604 struct mlx5_flow_attr *
mlx5_alloc_flow_attr(enum mlx5_flow_namespace_type type)4605 mlx5_alloc_flow_attr(enum mlx5_flow_namespace_type type)
4606 {
4607 	u32 ex_attr_size = (type == MLX5_FLOW_NAMESPACE_FDB)  ?
4608 				sizeof(struct mlx5_esw_flow_attr) :
4609 				sizeof(struct mlx5_nic_flow_attr);
4610 	struct mlx5_flow_attr *attr;
4611 
4612 	return kzalloc(sizeof(*attr) + ex_attr_size, GFP_KERNEL);
4613 }
4614 
4615 static int
mlx5e_alloc_flow(struct mlx5e_priv * priv,int attr_size,struct flow_cls_offload * f,unsigned long flow_flags,struct mlx5e_tc_flow_parse_attr ** __parse_attr,struct mlx5e_tc_flow ** __flow)4616 mlx5e_alloc_flow(struct mlx5e_priv *priv, int attr_size,
4617 		 struct flow_cls_offload *f, unsigned long flow_flags,
4618 		 struct mlx5e_tc_flow_parse_attr **__parse_attr,
4619 		 struct mlx5e_tc_flow **__flow)
4620 {
4621 	struct mlx5e_tc_flow_parse_attr *parse_attr;
4622 	struct mlx5_flow_attr *attr;
4623 	struct mlx5e_tc_flow *flow;
4624 	int err = -ENOMEM;
4625 	int out_index;
4626 
4627 	flow = kzalloc(sizeof(*flow), GFP_KERNEL);
4628 	parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
4629 	if (!parse_attr || !flow)
4630 		goto err_free;
4631 
4632 	flow->flags = flow_flags;
4633 	flow->cookie = f->cookie;
4634 	flow->priv = priv;
4635 
4636 	attr = mlx5_alloc_flow_attr(get_flow_name_space(flow));
4637 	if (!attr)
4638 		goto err_free;
4639 
4640 	flow->attr = attr;
4641 
4642 	for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++)
4643 		INIT_LIST_HEAD(&flow->encaps[out_index].list);
4644 	INIT_LIST_HEAD(&flow->hairpin);
4645 	INIT_LIST_HEAD(&flow->l3_to_l2_reformat);
4646 	refcount_set(&flow->refcnt, 1);
4647 	init_completion(&flow->init_done);
4648 
4649 	*__flow = flow;
4650 	*__parse_attr = parse_attr;
4651 
4652 	return 0;
4653 
4654 err_free:
4655 	kfree(flow);
4656 	kvfree(parse_attr);
4657 	return err;
4658 }
4659 
4660 static void
mlx5e_flow_attr_init(struct mlx5_flow_attr * attr,struct mlx5e_tc_flow_parse_attr * parse_attr,struct flow_cls_offload * f)4661 mlx5e_flow_attr_init(struct mlx5_flow_attr *attr,
4662 		     struct mlx5e_tc_flow_parse_attr *parse_attr,
4663 		     struct flow_cls_offload *f)
4664 {
4665 	attr->parse_attr = parse_attr;
4666 	attr->chain = f->common.chain_index;
4667 	attr->prio = f->common.prio;
4668 }
4669 
4670 static void
mlx5e_flow_esw_attr_init(struct mlx5_flow_attr * attr,struct mlx5e_priv * priv,struct mlx5e_tc_flow_parse_attr * parse_attr,struct flow_cls_offload * f,struct mlx5_eswitch_rep * in_rep,struct mlx5_core_dev * in_mdev)4671 mlx5e_flow_esw_attr_init(struct mlx5_flow_attr *attr,
4672 			 struct mlx5e_priv *priv,
4673 			 struct mlx5e_tc_flow_parse_attr *parse_attr,
4674 			 struct flow_cls_offload *f,
4675 			 struct mlx5_eswitch_rep *in_rep,
4676 			 struct mlx5_core_dev *in_mdev)
4677 {
4678 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4679 	struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;
4680 
4681 	mlx5e_flow_attr_init(attr, parse_attr, f);
4682 
4683 	esw_attr->in_rep = in_rep;
4684 	esw_attr->in_mdev = in_mdev;
4685 
4686 	if (MLX5_CAP_ESW(esw->dev, counter_eswitch_affinity) ==
4687 	    MLX5_COUNTER_SOURCE_ESWITCH)
4688 		esw_attr->counter_dev = in_mdev;
4689 	else
4690 		esw_attr->counter_dev = priv->mdev;
4691 }
4692 
4693 static struct mlx5e_tc_flow *
__mlx5e_add_fdb_flow(struct mlx5e_priv * priv,struct flow_cls_offload * f,unsigned long flow_flags,struct net_device * filter_dev,struct mlx5_eswitch_rep * in_rep,struct mlx5_core_dev * in_mdev)4694 __mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
4695 		     struct flow_cls_offload *f,
4696 		     unsigned long flow_flags,
4697 		     struct net_device *filter_dev,
4698 		     struct mlx5_eswitch_rep *in_rep,
4699 		     struct mlx5_core_dev *in_mdev)
4700 {
4701 	struct flow_rule *rule = flow_cls_offload_flow_rule(f);
4702 	struct netlink_ext_ack *extack = f->common.extack;
4703 	struct mlx5e_tc_flow_parse_attr *parse_attr;
4704 	struct mlx5e_tc_flow *flow;
4705 	int attr_size, err;
4706 
4707 	flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_ESWITCH);
4708 	attr_size  = sizeof(struct mlx5_esw_flow_attr);
4709 	err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
4710 			       &parse_attr, &flow);
4711 	if (err)
4712 		goto out;
4713 
4714 	parse_attr->filter_dev = filter_dev;
4715 	mlx5e_flow_esw_attr_init(flow->attr,
4716 				 priv, parse_attr,
4717 				 f, in_rep, in_mdev);
4718 
4719 	err = parse_cls_flower(flow->priv, flow, &parse_attr->spec,
4720 			       f, filter_dev);
4721 	if (err)
4722 		goto err_free;
4723 
4724 	/* actions validation depends on parsing the ct matches first */
4725 	err = mlx5_tc_ct_match_add(get_ct_priv(priv), &parse_attr->spec, f,
4726 				   &flow->attr->ct_attr, extack);
4727 	if (err)
4728 		goto err_free;
4729 
4730 	err = parse_tc_fdb_actions(priv, &rule->action, flow, extack, filter_dev);
4731 	if (err)
4732 		goto err_free;
4733 
4734 	err = mlx5e_tc_add_fdb_flow(priv, flow, extack);
4735 	complete_all(&flow->init_done);
4736 	if (err) {
4737 		if (!(err == -ENETUNREACH && mlx5_lag_is_multipath(in_mdev)))
4738 			goto err_free;
4739 
4740 		add_unready_flow(flow);
4741 	}
4742 
4743 	return flow;
4744 
4745 err_free:
4746 	dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
4747 	mlx5e_flow_put(priv, flow);
4748 out:
4749 	return ERR_PTR(err);
4750 }
4751 
mlx5e_tc_add_fdb_peer_flow(struct flow_cls_offload * f,struct mlx5e_tc_flow * flow,unsigned long flow_flags)4752 static int mlx5e_tc_add_fdb_peer_flow(struct flow_cls_offload *f,
4753 				      struct mlx5e_tc_flow *flow,
4754 				      unsigned long flow_flags)
4755 {
4756 	struct mlx5e_priv *priv = flow->priv, *peer_priv;
4757 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch, *peer_esw;
4758 	struct mlx5_esw_flow_attr *attr = flow->attr->esw_attr;
4759 	struct mlx5_devcom *devcom = priv->mdev->priv.devcom;
4760 	struct mlx5e_tc_flow_parse_attr *parse_attr;
4761 	struct mlx5e_rep_priv *peer_urpriv;
4762 	struct mlx5e_tc_flow *peer_flow;
4763 	struct mlx5_core_dev *in_mdev;
4764 	int err = 0;
4765 
4766 	peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
4767 	if (!peer_esw)
4768 		return -ENODEV;
4769 
4770 	peer_urpriv = mlx5_eswitch_get_uplink_priv(peer_esw, REP_ETH);
4771 	peer_priv = netdev_priv(peer_urpriv->netdev);
4772 
4773 	/* in_mdev is assigned of which the packet originated from.
4774 	 * So packets redirected to uplink use the same mdev of the
4775 	 * original flow and packets redirected from uplink use the
4776 	 * peer mdev.
4777 	 */
4778 	if (attr->in_rep->vport == MLX5_VPORT_UPLINK)
4779 		in_mdev = peer_priv->mdev;
4780 	else
4781 		in_mdev = priv->mdev;
4782 
4783 	parse_attr = flow->attr->parse_attr;
4784 	peer_flow = __mlx5e_add_fdb_flow(peer_priv, f, flow_flags,
4785 					 parse_attr->filter_dev,
4786 					 attr->in_rep, in_mdev);
4787 	if (IS_ERR(peer_flow)) {
4788 		err = PTR_ERR(peer_flow);
4789 		goto out;
4790 	}
4791 
4792 	flow->peer_flow = peer_flow;
4793 	flow_flag_set(flow, DUP);
4794 	mutex_lock(&esw->offloads.peer_mutex);
4795 	list_add_tail(&flow->peer, &esw->offloads.peer_flows);
4796 	mutex_unlock(&esw->offloads.peer_mutex);
4797 
4798 out:
4799 	mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
4800 	return err;
4801 }
4802 
4803 static int
mlx5e_add_fdb_flow(struct mlx5e_priv * priv,struct flow_cls_offload * f,unsigned long flow_flags,struct net_device * filter_dev,struct mlx5e_tc_flow ** __flow)4804 mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
4805 		   struct flow_cls_offload *f,
4806 		   unsigned long flow_flags,
4807 		   struct net_device *filter_dev,
4808 		   struct mlx5e_tc_flow **__flow)
4809 {
4810 	struct mlx5e_rep_priv *rpriv = priv->ppriv;
4811 	struct mlx5_eswitch_rep *in_rep = rpriv->rep;
4812 	struct mlx5_core_dev *in_mdev = priv->mdev;
4813 	struct mlx5e_tc_flow *flow;
4814 	int err;
4815 
4816 	flow = __mlx5e_add_fdb_flow(priv, f, flow_flags, filter_dev, in_rep,
4817 				    in_mdev);
4818 	if (IS_ERR(flow))
4819 		return PTR_ERR(flow);
4820 
4821 	if (is_peer_flow_needed(flow)) {
4822 		err = mlx5e_tc_add_fdb_peer_flow(f, flow, flow_flags);
4823 		if (err) {
4824 			mlx5e_tc_del_fdb_flow(priv, flow);
4825 			goto out;
4826 		}
4827 	}
4828 
4829 	*__flow = flow;
4830 
4831 	return 0;
4832 
4833 out:
4834 	return err;
4835 }
4836 
4837 static int
mlx5e_add_nic_flow(struct mlx5e_priv * priv,struct flow_cls_offload * f,unsigned long flow_flags,struct net_device * filter_dev,struct mlx5e_tc_flow ** __flow)4838 mlx5e_add_nic_flow(struct mlx5e_priv *priv,
4839 		   struct flow_cls_offload *f,
4840 		   unsigned long flow_flags,
4841 		   struct net_device *filter_dev,
4842 		   struct mlx5e_tc_flow **__flow)
4843 {
4844 	struct flow_rule *rule = flow_cls_offload_flow_rule(f);
4845 	struct netlink_ext_ack *extack = f->common.extack;
4846 	struct mlx5e_tc_flow_parse_attr *parse_attr;
4847 	struct mlx5e_tc_flow *flow;
4848 	int attr_size, err;
4849 
4850 	if (!MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level)) {
4851 		if (!tc_cls_can_offload_and_chain0(priv->netdev, &f->common))
4852 			return -EOPNOTSUPP;
4853 	} else if (!tc_can_offload_extack(priv->netdev, f->common.extack)) {
4854 		return -EOPNOTSUPP;
4855 	}
4856 
4857 	flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_NIC);
4858 	attr_size  = sizeof(struct mlx5_nic_flow_attr);
4859 	err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
4860 			       &parse_attr, &flow);
4861 	if (err)
4862 		goto out;
4863 
4864 	parse_attr->filter_dev = filter_dev;
4865 	mlx5e_flow_attr_init(flow->attr, parse_attr, f);
4866 
4867 	err = parse_cls_flower(flow->priv, flow, &parse_attr->spec,
4868 			       f, filter_dev);
4869 	if (err)
4870 		goto err_free;
4871 
4872 	err = mlx5_tc_ct_match_add(get_ct_priv(priv), &parse_attr->spec, f,
4873 				   &flow->attr->ct_attr, extack);
4874 	if (err)
4875 		goto err_free;
4876 
4877 	err = parse_tc_nic_actions(priv, &rule->action, parse_attr, flow, extack);
4878 	if (err)
4879 		goto err_free;
4880 
4881 	err = mlx5e_tc_add_nic_flow(priv, parse_attr, flow, extack);
4882 	if (err)
4883 		goto err_free;
4884 
4885 	flow_flag_set(flow, OFFLOADED);
4886 	*__flow = flow;
4887 
4888 	return 0;
4889 
4890 err_free:
4891 	dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
4892 	mlx5e_flow_put(priv, flow);
4893 out:
4894 	return err;
4895 }
4896 
4897 static int
mlx5e_tc_add_flow(struct mlx5e_priv * priv,struct flow_cls_offload * f,unsigned long flags,struct net_device * filter_dev,struct mlx5e_tc_flow ** flow)4898 mlx5e_tc_add_flow(struct mlx5e_priv *priv,
4899 		  struct flow_cls_offload *f,
4900 		  unsigned long flags,
4901 		  struct net_device *filter_dev,
4902 		  struct mlx5e_tc_flow **flow)
4903 {
4904 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4905 	unsigned long flow_flags;
4906 	int err;
4907 
4908 	get_flags(flags, &flow_flags);
4909 
4910 	if (!tc_can_offload_extack(priv->netdev, f->common.extack))
4911 		return -EOPNOTSUPP;
4912 
4913 	if (esw && esw->mode == MLX5_ESWITCH_OFFLOADS)
4914 		err = mlx5e_add_fdb_flow(priv, f, flow_flags,
4915 					 filter_dev, flow);
4916 	else
4917 		err = mlx5e_add_nic_flow(priv, f, flow_flags,
4918 					 filter_dev, flow);
4919 
4920 	return err;
4921 }
4922 
is_flow_rule_duplicate_allowed(struct net_device * dev,struct mlx5e_rep_priv * rpriv)4923 static bool is_flow_rule_duplicate_allowed(struct net_device *dev,
4924 					   struct mlx5e_rep_priv *rpriv)
4925 {
4926 	/* Offloaded flow rule is allowed to duplicate on non-uplink representor
4927 	 * sharing tc block with other slaves of a lag device. Rpriv can be NULL if this
4928 	 * function is called from NIC mode.
4929 	 */
4930 	return netif_is_lag_port(dev) && rpriv && rpriv->rep->vport != MLX5_VPORT_UPLINK;
4931 }
4932 
mlx5e_configure_flower(struct net_device * dev,struct mlx5e_priv * priv,struct flow_cls_offload * f,unsigned long flags)4933 int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv,
4934 			   struct flow_cls_offload *f, unsigned long flags)
4935 {
4936 	struct netlink_ext_ack *extack = f->common.extack;
4937 	struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4938 	struct mlx5e_rep_priv *rpriv = priv->ppriv;
4939 	struct mlx5e_tc_flow *flow;
4940 	int err = 0;
4941 
4942 	rcu_read_lock();
4943 	flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params);
4944 	if (flow) {
4945 		/* Same flow rule offloaded to non-uplink representor sharing tc block,
4946 		 * just return 0.
4947 		 */
4948 		if (is_flow_rule_duplicate_allowed(dev, rpriv) && flow->orig_dev != dev)
4949 			goto rcu_unlock;
4950 
4951 		NL_SET_ERR_MSG_MOD(extack,
4952 				   "flow cookie already exists, ignoring");
4953 		netdev_warn_once(priv->netdev,
4954 				 "flow cookie %lx already exists, ignoring\n",
4955 				 f->cookie);
4956 		err = -EEXIST;
4957 		goto rcu_unlock;
4958 	}
4959 rcu_unlock:
4960 	rcu_read_unlock();
4961 	if (flow)
4962 		goto out;
4963 
4964 	trace_mlx5e_configure_flower(f);
4965 	err = mlx5e_tc_add_flow(priv, f, flags, dev, &flow);
4966 	if (err)
4967 		goto out;
4968 
4969 	/* Flow rule offloaded to non-uplink representor sharing tc block,
4970 	 * set the flow's owner dev.
4971 	 */
4972 	if (is_flow_rule_duplicate_allowed(dev, rpriv))
4973 		flow->orig_dev = dev;
4974 
4975 	err = rhashtable_lookup_insert_fast(tc_ht, &flow->node, tc_ht_params);
4976 	if (err)
4977 		goto err_free;
4978 
4979 	return 0;
4980 
4981 err_free:
4982 	mlx5e_flow_put(priv, flow);
4983 out:
4984 	return err;
4985 }
4986 
same_flow_direction(struct mlx5e_tc_flow * flow,int flags)4987 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
4988 {
4989 	bool dir_ingress = !!(flags & MLX5_TC_FLAG(INGRESS));
4990 	bool dir_egress = !!(flags & MLX5_TC_FLAG(EGRESS));
4991 
4992 	return flow_flag_test(flow, INGRESS) == dir_ingress &&
4993 		flow_flag_test(flow, EGRESS) == dir_egress;
4994 }
4995 
mlx5e_delete_flower(struct net_device * dev,struct mlx5e_priv * priv,struct flow_cls_offload * f,unsigned long flags)4996 int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv,
4997 			struct flow_cls_offload *f, unsigned long flags)
4998 {
4999 	struct rhashtable *tc_ht = get_tc_ht(priv, flags);
5000 	struct mlx5e_tc_flow *flow;
5001 	int err;
5002 
5003 	rcu_read_lock();
5004 	flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params);
5005 	if (!flow || !same_flow_direction(flow, flags)) {
5006 		err = -EINVAL;
5007 		goto errout;
5008 	}
5009 
5010 	/* Only delete the flow if it doesn't have MLX5E_TC_FLOW_DELETED flag
5011 	 * set.
5012 	 */
5013 	if (flow_flag_test_and_set(flow, DELETED)) {
5014 		err = -EINVAL;
5015 		goto errout;
5016 	}
5017 	rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
5018 	rcu_read_unlock();
5019 
5020 	trace_mlx5e_delete_flower(f);
5021 	mlx5e_flow_put(priv, flow);
5022 
5023 	return 0;
5024 
5025 errout:
5026 	rcu_read_unlock();
5027 	return err;
5028 }
5029 
mlx5e_stats_flower(struct net_device * dev,struct mlx5e_priv * priv,struct flow_cls_offload * f,unsigned long flags)5030 int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
5031 		       struct flow_cls_offload *f, unsigned long flags)
5032 {
5033 	struct mlx5_devcom *devcom = priv->mdev->priv.devcom;
5034 	struct rhashtable *tc_ht = get_tc_ht(priv, flags);
5035 	struct mlx5_eswitch *peer_esw;
5036 	struct mlx5e_tc_flow *flow;
5037 	struct mlx5_fc *counter;
5038 	u64 lastuse = 0;
5039 	u64 packets = 0;
5040 	u64 bytes = 0;
5041 	int err = 0;
5042 
5043 	rcu_read_lock();
5044 	flow = mlx5e_flow_get(rhashtable_lookup(tc_ht, &f->cookie,
5045 						tc_ht_params));
5046 	rcu_read_unlock();
5047 	if (IS_ERR(flow))
5048 		return PTR_ERR(flow);
5049 
5050 	if (!same_flow_direction(flow, flags)) {
5051 		err = -EINVAL;
5052 		goto errout;
5053 	}
5054 
5055 	if (mlx5e_is_offloaded_flow(flow) || flow_flag_test(flow, CT)) {
5056 		counter = mlx5e_tc_get_counter(flow);
5057 		if (!counter)
5058 			goto errout;
5059 
5060 		mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
5061 	}
5062 
5063 	/* Under multipath it's possible for one rule to be currently
5064 	 * un-offloaded while the other rule is offloaded.
5065 	 */
5066 	peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
5067 	if (!peer_esw)
5068 		goto out;
5069 
5070 	if (flow_flag_test(flow, DUP) &&
5071 	    flow_flag_test(flow->peer_flow, OFFLOADED)) {
5072 		u64 bytes2;
5073 		u64 packets2;
5074 		u64 lastuse2;
5075 
5076 		counter = mlx5e_tc_get_counter(flow->peer_flow);
5077 		if (!counter)
5078 			goto no_peer_counter;
5079 		mlx5_fc_query_cached(counter, &bytes2, &packets2, &lastuse2);
5080 
5081 		bytes += bytes2;
5082 		packets += packets2;
5083 		lastuse = max_t(u64, lastuse, lastuse2);
5084 	}
5085 
5086 no_peer_counter:
5087 	mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
5088 out:
5089 	flow_stats_update(&f->stats, bytes, packets, 0, lastuse,
5090 			  FLOW_ACTION_HW_STATS_DELAYED);
5091 	trace_mlx5e_stats_flower(f);
5092 errout:
5093 	mlx5e_flow_put(priv, flow);
5094 	return err;
5095 }
5096 
apply_police_params(struct mlx5e_priv * priv,u64 rate,struct netlink_ext_ack * extack)5097 static int apply_police_params(struct mlx5e_priv *priv, u64 rate,
5098 			       struct netlink_ext_ack *extack)
5099 {
5100 	struct mlx5e_rep_priv *rpriv = priv->ppriv;
5101 	struct mlx5_eswitch *esw;
5102 	u32 rate_mbps = 0;
5103 	u16 vport_num;
5104 	int err;
5105 
5106 	vport_num = rpriv->rep->vport;
5107 	if (vport_num >= MLX5_VPORT_ECPF) {
5108 		NL_SET_ERR_MSG_MOD(extack,
5109 				   "Ingress rate limit is supported only for Eswitch ports connected to VFs");
5110 		return -EOPNOTSUPP;
5111 	}
5112 
5113 	esw = priv->mdev->priv.eswitch;
5114 	/* rate is given in bytes/sec.
5115 	 * First convert to bits/sec and then round to the nearest mbit/secs.
5116 	 * mbit means million bits.
5117 	 * Moreover, if rate is non zero we choose to configure to a minimum of
5118 	 * 1 mbit/sec.
5119 	 */
5120 	if (rate) {
5121 		rate = (rate * BITS_PER_BYTE) + 500000;
5122 		rate_mbps = max_t(u32, do_div(rate, 1000000), 1);
5123 	}
5124 
5125 	err = mlx5_esw_modify_vport_rate(esw, vport_num, rate_mbps);
5126 	if (err)
5127 		NL_SET_ERR_MSG_MOD(extack, "failed applying action to hardware");
5128 
5129 	return err;
5130 }
5131 
scan_tc_matchall_fdb_actions(struct mlx5e_priv * priv,struct flow_action * flow_action,struct netlink_ext_ack * extack)5132 static int scan_tc_matchall_fdb_actions(struct mlx5e_priv *priv,
5133 					struct flow_action *flow_action,
5134 					struct netlink_ext_ack *extack)
5135 {
5136 	struct mlx5e_rep_priv *rpriv = priv->ppriv;
5137 	const struct flow_action_entry *act;
5138 	int err;
5139 	int i;
5140 
5141 	if (!flow_action_has_entries(flow_action)) {
5142 		NL_SET_ERR_MSG_MOD(extack, "matchall called with no action");
5143 		return -EINVAL;
5144 	}
5145 
5146 	if (!flow_offload_has_one_action(flow_action)) {
5147 		NL_SET_ERR_MSG_MOD(extack, "matchall policing support only a single action");
5148 		return -EOPNOTSUPP;
5149 	}
5150 
5151 	if (!flow_action_basic_hw_stats_check(flow_action, extack))
5152 		return -EOPNOTSUPP;
5153 
5154 	flow_action_for_each(i, act, flow_action) {
5155 		switch (act->id) {
5156 		case FLOW_ACTION_POLICE:
5157 			err = apply_police_params(priv, act->police.rate_bytes_ps, extack);
5158 			if (err)
5159 				return err;
5160 
5161 			rpriv->prev_vf_vport_stats = priv->stats.vf_vport;
5162 			break;
5163 		default:
5164 			NL_SET_ERR_MSG_MOD(extack, "mlx5 supports only police action for matchall");
5165 			return -EOPNOTSUPP;
5166 		}
5167 	}
5168 
5169 	return 0;
5170 }
5171 
mlx5e_tc_configure_matchall(struct mlx5e_priv * priv,struct tc_cls_matchall_offload * ma)5172 int mlx5e_tc_configure_matchall(struct mlx5e_priv *priv,
5173 				struct tc_cls_matchall_offload *ma)
5174 {
5175 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
5176 	struct netlink_ext_ack *extack = ma->common.extack;
5177 
5178 	if (!mlx5_esw_qos_enabled(esw)) {
5179 		NL_SET_ERR_MSG_MOD(extack, "QoS is not supported on this device");
5180 		return -EOPNOTSUPP;
5181 	}
5182 
5183 	if (ma->common.prio != 1) {
5184 		NL_SET_ERR_MSG_MOD(extack, "only priority 1 is supported");
5185 		return -EINVAL;
5186 	}
5187 
5188 	return scan_tc_matchall_fdb_actions(priv, &ma->rule->action, extack);
5189 }
5190 
mlx5e_tc_delete_matchall(struct mlx5e_priv * priv,struct tc_cls_matchall_offload * ma)5191 int mlx5e_tc_delete_matchall(struct mlx5e_priv *priv,
5192 			     struct tc_cls_matchall_offload *ma)
5193 {
5194 	struct netlink_ext_ack *extack = ma->common.extack;
5195 
5196 	return apply_police_params(priv, 0, extack);
5197 }
5198 
mlx5e_tc_stats_matchall(struct mlx5e_priv * priv,struct tc_cls_matchall_offload * ma)5199 void mlx5e_tc_stats_matchall(struct mlx5e_priv *priv,
5200 			     struct tc_cls_matchall_offload *ma)
5201 {
5202 	struct mlx5e_rep_priv *rpriv = priv->ppriv;
5203 	struct rtnl_link_stats64 cur_stats;
5204 	u64 dbytes;
5205 	u64 dpkts;
5206 
5207 	cur_stats = priv->stats.vf_vport;
5208 	dpkts = cur_stats.rx_packets - rpriv->prev_vf_vport_stats.rx_packets;
5209 	dbytes = cur_stats.rx_bytes - rpriv->prev_vf_vport_stats.rx_bytes;
5210 	rpriv->prev_vf_vport_stats = cur_stats;
5211 	flow_stats_update(&ma->stats, dbytes, dpkts, 0, jiffies,
5212 			  FLOW_ACTION_HW_STATS_DELAYED);
5213 }
5214 
mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv * priv,struct mlx5e_priv * peer_priv)5215 static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv,
5216 					      struct mlx5e_priv *peer_priv)
5217 {
5218 	struct mlx5_core_dev *peer_mdev = peer_priv->mdev;
5219 	struct mlx5e_hairpin_entry *hpe, *tmp;
5220 	LIST_HEAD(init_wait_list);
5221 	u16 peer_vhca_id;
5222 	int bkt;
5223 
5224 	if (!same_hw_devs(priv, peer_priv))
5225 		return;
5226 
5227 	peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
5228 
5229 	mutex_lock(&priv->fs.tc.hairpin_tbl_lock);
5230 	hash_for_each(priv->fs.tc.hairpin_tbl, bkt, hpe, hairpin_hlist)
5231 		if (refcount_inc_not_zero(&hpe->refcnt))
5232 			list_add(&hpe->dead_peer_wait_list, &init_wait_list);
5233 	mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
5234 
5235 	list_for_each_entry_safe(hpe, tmp, &init_wait_list, dead_peer_wait_list) {
5236 		wait_for_completion(&hpe->res_ready);
5237 		if (!IS_ERR_OR_NULL(hpe->hp) && hpe->peer_vhca_id == peer_vhca_id)
5238 			mlx5_core_hairpin_clear_dead_peer(hpe->hp->pair);
5239 
5240 		mlx5e_hairpin_put(priv, hpe);
5241 	}
5242 }
5243 
mlx5e_tc_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)5244 static int mlx5e_tc_netdev_event(struct notifier_block *this,
5245 				 unsigned long event, void *ptr)
5246 {
5247 	struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
5248 	struct mlx5e_flow_steering *fs;
5249 	struct mlx5e_priv *peer_priv;
5250 	struct mlx5e_tc_table *tc;
5251 	struct mlx5e_priv *priv;
5252 
5253 	if (ndev->netdev_ops != &mlx5e_netdev_ops ||
5254 	    event != NETDEV_UNREGISTER ||
5255 	    ndev->reg_state == NETREG_REGISTERED)
5256 		return NOTIFY_DONE;
5257 
5258 	tc = container_of(this, struct mlx5e_tc_table, netdevice_nb);
5259 	fs = container_of(tc, struct mlx5e_flow_steering, tc);
5260 	priv = container_of(fs, struct mlx5e_priv, fs);
5261 	peer_priv = netdev_priv(ndev);
5262 	if (priv == peer_priv ||
5263 	    !(priv->netdev->features & NETIF_F_HW_TC))
5264 		return NOTIFY_DONE;
5265 
5266 	mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv);
5267 
5268 	return NOTIFY_DONE;
5269 }
5270 
mlx5e_tc_nic_get_ft_size(struct mlx5_core_dev * dev)5271 static int mlx5e_tc_nic_get_ft_size(struct mlx5_core_dev *dev)
5272 {
5273 	int tc_grp_size, tc_tbl_size;
5274 	u32 max_flow_counter;
5275 
5276 	max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
5277 			    MLX5_CAP_GEN(dev, max_flow_counter_15_0);
5278 
5279 	tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
5280 
5281 	tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
5282 			    BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
5283 
5284 	return tc_tbl_size;
5285 }
5286 
mlx5e_tc_nic_init(struct mlx5e_priv * priv)5287 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
5288 {
5289 	struct mlx5e_tc_table *tc = &priv->fs.tc;
5290 	struct mlx5_core_dev *dev = priv->mdev;
5291 	struct mlx5_chains_attr attr = {};
5292 	int err;
5293 
5294 	mlx5e_mod_hdr_tbl_init(&tc->mod_hdr);
5295 	mutex_init(&tc->t_lock);
5296 	mutex_init(&tc->hairpin_tbl_lock);
5297 	hash_init(tc->hairpin_tbl);
5298 
5299 	err = rhashtable_init(&tc->ht, &tc_ht_params);
5300 	if (err)
5301 		return err;
5302 
5303 	if (MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level)) {
5304 		attr.flags = MLX5_CHAINS_AND_PRIOS_SUPPORTED |
5305 			MLX5_CHAINS_IGNORE_FLOW_LEVEL_SUPPORTED;
5306 		attr.max_restore_tag = MLX5E_TC_TABLE_CHAIN_TAG_MASK;
5307 	}
5308 	attr.ns = MLX5_FLOW_NAMESPACE_KERNEL;
5309 	attr.max_ft_sz = mlx5e_tc_nic_get_ft_size(dev);
5310 	attr.max_grp_num = MLX5E_TC_TABLE_NUM_GROUPS;
5311 	attr.default_ft = priv->fs.vlan.ft.t;
5312 
5313 	tc->chains = mlx5_chains_create(dev, &attr);
5314 	if (IS_ERR(tc->chains)) {
5315 		err = PTR_ERR(tc->chains);
5316 		goto err_chains;
5317 	}
5318 
5319 	tc->ct = mlx5_tc_ct_init(priv, tc->chains, &priv->fs.tc.mod_hdr,
5320 				 MLX5_FLOW_NAMESPACE_KERNEL);
5321 	if (IS_ERR(tc->ct)) {
5322 		err = PTR_ERR(tc->ct);
5323 		goto err_ct;
5324 	}
5325 
5326 	tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event;
5327 	err = register_netdevice_notifier_dev_net(priv->netdev,
5328 						  &tc->netdevice_nb,
5329 						  &tc->netdevice_nn);
5330 	if (err) {
5331 		tc->netdevice_nb.notifier_call = NULL;
5332 		mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n");
5333 		goto err_reg;
5334 	}
5335 
5336 	return 0;
5337 
5338 err_reg:
5339 	mlx5_tc_ct_clean(tc->ct);
5340 err_ct:
5341 	mlx5_chains_destroy(tc->chains);
5342 err_chains:
5343 	rhashtable_destroy(&tc->ht);
5344 	return err;
5345 }
5346 
_mlx5e_tc_del_flow(void * ptr,void * arg)5347 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
5348 {
5349 	struct mlx5e_tc_flow *flow = ptr;
5350 	struct mlx5e_priv *priv = flow->priv;
5351 
5352 	mlx5e_tc_del_flow(priv, flow);
5353 	kfree(flow);
5354 }
5355 
mlx5e_tc_nic_cleanup(struct mlx5e_priv * priv)5356 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
5357 {
5358 	struct mlx5e_tc_table *tc = &priv->fs.tc;
5359 
5360 	if (tc->netdevice_nb.notifier_call)
5361 		unregister_netdevice_notifier_dev_net(priv->netdev,
5362 						      &tc->netdevice_nb,
5363 						      &tc->netdevice_nn);
5364 
5365 	mlx5e_mod_hdr_tbl_destroy(&tc->mod_hdr);
5366 	mutex_destroy(&tc->hairpin_tbl_lock);
5367 
5368 	rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
5369 
5370 	if (!IS_ERR_OR_NULL(tc->t)) {
5371 		mlx5_chains_put_table(tc->chains, 0, 1, MLX5E_TC_FT_LEVEL);
5372 		tc->t = NULL;
5373 	}
5374 	mutex_destroy(&tc->t_lock);
5375 
5376 	mlx5_tc_ct_clean(tc->ct);
5377 	mlx5_chains_destroy(tc->chains);
5378 }
5379 
mlx5e_tc_esw_init(struct rhashtable * tc_ht)5380 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
5381 {
5382 	const size_t sz_enc_opts = sizeof(struct tunnel_match_enc_opts);
5383 	struct mlx5_rep_uplink_priv *uplink_priv;
5384 	struct mlx5e_rep_priv *rpriv;
5385 	struct mapping_ctx *mapping;
5386 	struct mlx5_eswitch *esw;
5387 	struct mlx5e_priv *priv;
5388 	int err = 0;
5389 
5390 	uplink_priv = container_of(tc_ht, struct mlx5_rep_uplink_priv, tc_ht);
5391 	rpriv = container_of(uplink_priv, struct mlx5e_rep_priv, uplink_priv);
5392 	priv = netdev_priv(rpriv->netdev);
5393 	esw = priv->mdev->priv.eswitch;
5394 
5395 	uplink_priv->ct_priv = mlx5_tc_ct_init(netdev_priv(priv->netdev),
5396 					       esw_chains(esw),
5397 					       &esw->offloads.mod_hdr,
5398 					       MLX5_FLOW_NAMESPACE_FDB);
5399 	if (IS_ERR(uplink_priv->ct_priv))
5400 		goto err_ct;
5401 
5402 	mapping = mapping_create(sizeof(struct tunnel_match_key),
5403 				 TUNNEL_INFO_BITS_MASK, true);
5404 	if (IS_ERR(mapping)) {
5405 		err = PTR_ERR(mapping);
5406 		goto err_tun_mapping;
5407 	}
5408 	uplink_priv->tunnel_mapping = mapping;
5409 
5410 	mapping = mapping_create(sz_enc_opts, ENC_OPTS_BITS_MASK, true);
5411 	if (IS_ERR(mapping)) {
5412 		err = PTR_ERR(mapping);
5413 		goto err_enc_opts_mapping;
5414 	}
5415 	uplink_priv->tunnel_enc_opts_mapping = mapping;
5416 
5417 	err = rhashtable_init(tc_ht, &tc_ht_params);
5418 	if (err)
5419 		goto err_ht_init;
5420 
5421 	return err;
5422 
5423 err_ht_init:
5424 	mapping_destroy(uplink_priv->tunnel_enc_opts_mapping);
5425 err_enc_opts_mapping:
5426 	mapping_destroy(uplink_priv->tunnel_mapping);
5427 err_tun_mapping:
5428 	mlx5_tc_ct_clean(uplink_priv->ct_priv);
5429 err_ct:
5430 	netdev_warn(priv->netdev,
5431 		    "Failed to initialize tc (eswitch), err: %d", err);
5432 	return err;
5433 }
5434 
mlx5e_tc_esw_cleanup(struct rhashtable * tc_ht)5435 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
5436 {
5437 	struct mlx5_rep_uplink_priv *uplink_priv;
5438 
5439 	rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
5440 
5441 	uplink_priv = container_of(tc_ht, struct mlx5_rep_uplink_priv, tc_ht);
5442 
5443 	mapping_destroy(uplink_priv->tunnel_enc_opts_mapping);
5444 	mapping_destroy(uplink_priv->tunnel_mapping);
5445 
5446 	mlx5_tc_ct_clean(uplink_priv->ct_priv);
5447 }
5448 
mlx5e_tc_num_filters(struct mlx5e_priv * priv,unsigned long flags)5449 int mlx5e_tc_num_filters(struct mlx5e_priv *priv, unsigned long flags)
5450 {
5451 	struct rhashtable *tc_ht = get_tc_ht(priv, flags);
5452 
5453 	return atomic_read(&tc_ht->nelems);
5454 }
5455 
mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch * esw)5456 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw)
5457 {
5458 	struct mlx5e_tc_flow *flow, *tmp;
5459 
5460 	list_for_each_entry_safe(flow, tmp, &esw->offloads.peer_flows, peer)
5461 		__mlx5e_tc_del_fdb_peer_flow(flow);
5462 }
5463 
mlx5e_tc_reoffload_flows_work(struct work_struct * work)5464 void mlx5e_tc_reoffload_flows_work(struct work_struct *work)
5465 {
5466 	struct mlx5_rep_uplink_priv *rpriv =
5467 		container_of(work, struct mlx5_rep_uplink_priv,
5468 			     reoffload_flows_work);
5469 	struct mlx5e_tc_flow *flow, *tmp;
5470 
5471 	mutex_lock(&rpriv->unready_flows_lock);
5472 	list_for_each_entry_safe(flow, tmp, &rpriv->unready_flows, unready) {
5473 		if (!mlx5e_tc_add_fdb_flow(flow->priv, flow, NULL))
5474 			unready_flow_del(flow);
5475 	}
5476 	mutex_unlock(&rpriv->unready_flows_lock);
5477 }
5478 
mlx5e_setup_tc_cls_flower(struct mlx5e_priv * priv,struct flow_cls_offload * cls_flower,unsigned long flags)5479 static int mlx5e_setup_tc_cls_flower(struct mlx5e_priv *priv,
5480 				     struct flow_cls_offload *cls_flower,
5481 				     unsigned long flags)
5482 {
5483 	switch (cls_flower->command) {
5484 	case FLOW_CLS_REPLACE:
5485 		return mlx5e_configure_flower(priv->netdev, priv, cls_flower,
5486 					      flags);
5487 	case FLOW_CLS_DESTROY:
5488 		return mlx5e_delete_flower(priv->netdev, priv, cls_flower,
5489 					   flags);
5490 	case FLOW_CLS_STATS:
5491 		return mlx5e_stats_flower(priv->netdev, priv, cls_flower,
5492 					  flags);
5493 	default:
5494 		return -EOPNOTSUPP;
5495 	}
5496 }
5497 
mlx5e_setup_tc_block_cb(enum tc_setup_type type,void * type_data,void * cb_priv)5498 int mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
5499 			    void *cb_priv)
5500 {
5501 	unsigned long flags = MLX5_TC_FLAG(INGRESS) | MLX5_TC_FLAG(NIC_OFFLOAD);
5502 	struct mlx5e_priv *priv = cb_priv;
5503 
5504 	switch (type) {
5505 	case TC_SETUP_CLSFLOWER:
5506 		return mlx5e_setup_tc_cls_flower(priv, type_data, flags);
5507 	default:
5508 		return -EOPNOTSUPP;
5509 	}
5510 }
5511 
mlx5e_tc_update_skb(struct mlx5_cqe64 * cqe,struct sk_buff * skb)5512 bool mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe,
5513 			 struct sk_buff *skb)
5514 {
5515 #if IS_ENABLED(CONFIG_NET_TC_SKB_EXT)
5516 	u32 chain = 0, chain_tag, reg_b, zone_restore_id;
5517 	struct mlx5e_priv *priv = netdev_priv(skb->dev);
5518 	struct mlx5e_tc_table *tc = &priv->fs.tc;
5519 	struct tc_skb_ext *tc_skb_ext;
5520 	int err;
5521 
5522 	reg_b = be32_to_cpu(cqe->ft_metadata);
5523 
5524 	chain_tag = reg_b & MLX5E_TC_TABLE_CHAIN_TAG_MASK;
5525 
5526 	err = mlx5_get_chain_for_tag(nic_chains(priv), chain_tag, &chain);
5527 	if (err) {
5528 		netdev_dbg(priv->netdev,
5529 			   "Couldn't find chain for chain tag: %d, err: %d\n",
5530 			   chain_tag, err);
5531 		return false;
5532 	}
5533 
5534 	if (chain) {
5535 		tc_skb_ext = tc_skb_ext_alloc(skb);
5536 		if (WARN_ON(!tc_skb_ext))
5537 			return false;
5538 
5539 		tc_skb_ext->chain = chain;
5540 
5541 		zone_restore_id = (reg_b >> REG_MAPPING_SHIFT(NIC_ZONE_RESTORE_TO_REG)) &
5542 				  ZONE_RESTORE_MAX;
5543 
5544 		if (!mlx5e_tc_ct_restore_flow(tc->ct, skb,
5545 					      zone_restore_id))
5546 			return false;
5547 	}
5548 #endif /* CONFIG_NET_TC_SKB_EXT */
5549 
5550 	return true;
5551 }
5552