Lines Matching full:defines
32 - rockchip,pd_idle : Configure the PD_IDLE value. Defines the
37 - rockchip,sr_idle : Configure the SR_IDLE value. Defines the
44 - rockchip,sr_mc_gate_idle : Defines the memory self-refresh and controller
50 - rockchip,srpd_lite_idle : Defines the self-refresh power down idle
56 - rockchip,standby_idle : Defines the standby idle period in which
62 - rockchip,dram_dll_dis_freq : Defines the DDR3 DLL bypass frequency in MHz.
67 - rockchip,phy_dll_dis_freq : Defines the PHY dll bypass frequency in
72 - rockchip,ddr3_odt_dis_freq : When the DRAM type is DDR3, this parameter defines
78 - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines
82 - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines
86 - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines
91 - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines
95 - rockchip,phy_ddr3_odt : When the DRAM type is DDR3, this parameter defines
99 - rockchip,lpddr3_odt_dis_freq : When the DRAM type is LPDDR3, this parameter defines
105 - rockchip,lpddr3_drv : When the DRAM type is LPDDR3, this parameter defines
109 - rockchip,lpddr3_odt : When the DRAM type is LPDDR3, this parameter defines
113 - rockchip,phy_lpddr3_ca_drv : When the DRAM type is LPDDR3, this parameter defines
118 - rockchip,phy_lpddr3_dq_drv : When the DRAM type is LPDDR3, this parameter defines
128 defines the ODT disable frequency in
133 - rockchip,lpddr4_drv : When the DRAM type is LPDDR4, this parameter defines
137 - rockchip,lpddr4_dq_odt : When the DRAM type is LPDDR4, this parameter defines
141 - rockchip,lpddr4_ca_odt : When the DRAM type is LPDDR4, this parameter defines
145 - rockchip,phy_lpddr4_ca_drv : When the DRAM type is LPDDR4, this parameter defines
150 - rockchip,phy_lpddr4_ck_cs_drv : When the DRAM type is LPDDR4, this parameter defines
154 - rockchip,phy_lpddr4_dq_drv : When the DRAM type is LPDDR4, this parameter defines
158 - rockchip,phy_lpddr4_odt : When the DRAM type is LPDDR4, this parameter defines