Lines Matching refs:cmu
58 clocks = <&cmu CLK_ARM_CLK>;
81 clocks = <&cmu CLK_ARM_CLK>;
168 clocks = <&cmu CLK_FIN_PLL>;
213 cmu: clock-controller@10030000 { label
214 compatible = "samsung,exynos3250-cmu";
217 assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>,
218 <&cmu CLK_MOUT_ACLK_266_SUB>;
219 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
220 <&cmu CLK_FIN_PLL>;
224 compatible = "samsung,exynos3250-cmu-dmc";
242 clocks = <&cmu CLK_TMU_APBIF>;
271 clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
296 clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>;
299 assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>;
301 assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>;
311 clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>;
323 clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>;
339 clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>;
351 clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>;
360 clocks = <&cmu CLK_USBOTG>;
371 clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
383 clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
395 clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
407 clocks = <&cmu CLK_USBOTG>, <&cmu CLK_SCLK_UPLL>;
417 clocks = <&cmu CLK_PDMA0>;
428 clocks = <&cmu CLK_PDMA1>;
440 clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
472 clocks = <&cmu CLK_G3D>,
473 <&cmu CLK_SCLK_G3D>;
485 clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>;
495 clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>;
504 clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
515 clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>;
526 clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
539 clocks = <&cmu CLK_I2C0>;
552 clocks = <&cmu CLK_I2C1>;
565 clocks = <&cmu CLK_I2C2>;
578 clocks = <&cmu CLK_I2C3>;
591 clocks = <&cmu CLK_I2C4>;
604 clocks = <&cmu CLK_I2C5>;
617 clocks = <&cmu CLK_I2C6>;
630 clocks = <&cmu CLK_I2C7>;
645 clocks = <&cmu CLK_SPI0>, <&cmu CLK_SCLK_SPI0>;
661 clocks = <&cmu CLK_SPI1>, <&cmu CLK_SCLK_SPI1>;
673 clocks = <&cmu CLK_I2S>, <&cmu CLK_SCLK_I2S>;
715 clocks = <&cmu CLK_PPMURIGHT>;
723 clocks = <&cmu CLK_PPMULEFT>;
731 clocks = <&cmu CLK_PPMUCAMIF>;
739 clocks = <&cmu CLK_PPMULCD0>;
747 clocks = <&cmu CLK_PPMUFILE>;
755 clocks = <&cmu CLK_PPMUG3D>;
763 clocks = <&cmu CLK_PPMUMFC_L>;
804 clocks = <&cmu CLK_DIV_GDL>;
812 clocks = <&cmu CLK_DIV_GDR>;
820 clocks = <&cmu CLK_DIV_ACLK_160>;
828 clocks = <&cmu CLK_DIV_ACLK_200>;
836 clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
844 clocks = <&cmu CLK_DIV_ACLK_266>;
852 clocks = <&cmu CLK_DIV_ACLK_100>;
860 clocks = <&cmu CLK_SCLK_MFC>;