Lines Matching +full:0 +full:x30390000
54 #size-cells = <0>;
61 arm,psci-suspend-param = <0x0010000>;
69 cpu0: cpu@0 {
72 reg = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
98 #phy-cells = <0>;
105 #phy-cells = <0>;
124 #size-cells = <0>;
126 port@0 {
127 reg = <0>;
168 reg = <0x30041000 0x1000>;
194 reg = <0x3007c000 0x1000>;
210 reg = <0x30083000 0x1000>;
216 #size-cells = <0>;
218 port@0 {
219 reg = <0>;
245 reg = <0x30084000 0x1000>;
268 reg = <0x30086000 0x1000>;
283 reg = <0x30087000 0x1000>;
302 reg = <0x31001000 0x1000>,
303 <0x31002000 0x2000>,
304 <0x31004000 0x2000>,
305 <0x31006000 0x2000>;
312 reg = <0x30000000 0x400000>;
317 reg = <0x30200000 0x10000>;
324 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
329 reg = <0x30210000 0x10000>;
336 gpio-ranges = <&iomuxc 0 13 32>;
341 reg = <0x30220000 0x10000>;
348 gpio-ranges = <&iomuxc 0 45 29>;
353 reg = <0x30230000 0x10000>;
360 gpio-ranges = <&iomuxc 0 74 24>;
365 reg = <0x30240000 0x10000>;
372 gpio-ranges = <&iomuxc 0 98 18>;
377 reg = <0x30250000 0x10000>;
384 gpio-ranges = <&iomuxc 0 116 23>;
389 reg = <0x30260000 0x10000>;
396 gpio-ranges = <&iomuxc 0 139 16>;
401 reg = <0x30280000 0x10000>;
408 reg = <0x30290000 0x10000>;
416 reg = <0x302a0000 0x10000>;
424 reg = <0x302b0000 0x10000>;
432 reg = <0x302c0000 0x10000>;
438 reg = <0x302d0000 0x10000>;
447 reg = <0x302e0000 0x10000>;
457 reg = <0x302f0000 0x10000>;
467 reg = <0x30300000 0x10000>;
477 reg = <0x30320000 0x10000>;
485 reg = <0x30330000 0x10000>;
492 reg = <0x30340000 0x10000>;
496 #mux-control-cells = <0>;
497 mux-reg-masks = <0x14 0x00000010>;
502 mux-controls = <&mux 0>;
504 #size-cells = <0>;
507 port@0 {
508 reg = <0>;
533 reg = <0x30350000 0x10000>;
537 reg = <0x3c 0x4>;
541 reg = <0x10 0x4>;
548 reg = <0x30360000 0x10000>;
557 anatop-reg-offset = <0x210>;
563 anatop-enable-bit = <0>;
571 anatop-reg-offset = <0x220>;
574 anatop-min-bit-val = <0x14>;
577 anatop-enable-bit = <0>;
592 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
593 reg = <0x30370000 0x10000>;
596 compatible = "fsl,sec-v4.0-mon-rtc-lp";
598 offset = <0x34>;
606 compatible = "fsl,sec-v4.0-pwrkey";
619 reg = <0x30380000 0x10000>;
629 reg = <0x30390000 0x10000>;
636 reg = <0x303a0000 0x10000>;
645 #size-cells = <0>;
647 pgc_mipi_phy: power-domain@0 {
648 #power-domain-cells = <0>;
649 reg = <0>;
654 #power-domain-cells = <0>;
660 #power-domain-cells = <0>;
672 reg = <0x30400000 0x400000>;
677 reg = <0x30610000 0x10000>;
687 reg = <0x30620000 0x10000>;
697 #size-cells = <0>;
699 reg = <0x30630000 0x10000>;
709 reg = <0x30660000 0x10000>;
720 reg = <0x30670000 0x10000>;
731 reg = <0x30680000 0x10000>;
742 reg = <0x30690000 0x10000>;
753 reg = <0x30710000 0x10000>;
770 reg = <0x30730000 0x10000>;
780 reg = <0x30750000 0x10000>;
782 #size-cells = <0>;
794 port@0 {
795 reg = <0>;
812 reg = <0x30800000 0x400000>;
819 reg = <0x30800000 0x100000>;
824 #size-cells = <0>;
826 reg = <0x30820000 0x10000>;
836 #size-cells = <0>;
838 reg = <0x30830000 0x10000>;
848 #size-cells = <0>;
850 reg = <0x30840000 0x10000>;
861 reg = <0x30860000 0x10000>;
872 reg = <0x30890000 0x10000>;
883 reg = <0x30880000 0x10000>;
892 #sound-dai-cells = <0>;
894 reg = <0x308a0000 0x10000>;
902 dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
907 #sound-dai-cells = <0>;
909 reg = <0x308b0000 0x10000>;
917 dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
922 #sound-dai-cells = <0>;
924 reg = <0x308c0000 0x10000>;
932 dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
938 compatible = "fsl,sec-v4.0";
941 reg = <0x30900000 0x40000>;
942 ranges = <0 0x30900000 0x40000>;
949 compatible = "fsl,sec-v4.0-job-ring";
950 reg = <0x1000 0x1000>;
955 compatible = "fsl,sec-v4.0-job-ring";
956 reg = <0x2000 0x1000>;
961 compatible = "fsl,sec-v4.0-job-ring";
962 reg = <0x3000 0x1000>;
969 reg = <0x30a00000 0x10000>;
974 fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
980 reg = <0x30a10000 0x10000>;
985 fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
991 #size-cells = <0>;
993 reg = <0x30a20000 0x10000>;
1001 #size-cells = <0>;
1003 reg = <0x30a30000 0x10000>;
1011 #size-cells = <0>;
1013 reg = <0x30a40000 0x10000>;
1021 #size-cells = <0>;
1023 reg = <0x30a50000 0x10000>;
1032 reg = <0x30a60000 0x10000>;
1043 reg = <0x30a70000 0x10000>;
1054 reg = <0x30a80000 0x10000>;
1065 reg = <0x30a90000 0x10000>;
1075 reg = <0x30aa0000 0x10000>;
1084 reg = <0x30ab0000 0x10000>;
1094 reg = <0x30b10000 0x200>;
1098 fsl,usbmisc = <&usbmisc1 0>;
1105 reg = <0x30b30000 0x200>;
1110 fsl,usbmisc = <&usbmisc3 0>;
1120 reg = <0x30b10200 0x200>;
1126 reg = <0x30b30200 0x200>;
1131 reg = <0x30b40000 0x10000>;
1143 reg = <0x30b50000 0x10000>;
1155 reg = <0x30b60000 0x10000>;
1167 reg = <0x30bb0000 0x10000>, <0x60000000 0x10000000>;
1170 #size-cells = <0>;
1180 reg = <0x30bd0000 0x10000>;
1191 reg = <0x30be0000 0x10000>;
1206 fsl,stop-mode = <&gpr 0x10 3>;
1213 reg = <0x33000000 0x2000>;
1228 reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
1235 dmas = <&dma_apbh 0>;