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Lines Matching full:clkc

7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
26 resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
28 clocks = <&clkc CLKID_CPUCLK>;
37 resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
39 clocks = <&clkc CLKID_CPUCLK>;
48 resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
50 clocks = <&clkc CLKID_CPUCLK>;
59 resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
61 clocks = <&clkc CLKID_CPUCLK>;
178 compatible = "amlogic,meson8b-ddr-clkc";
221 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
422 clocks = <&clkc CLKID_EFUSE>;
437 clocks = <&clkc CLKID_ETH>,
438 <&clkc CLKID_MPLL2>,
439 <&clkc CLKID_MPLL2>,
440 <&clkc CLKID_FCLK_DIV2>;
458 clkc: clock-controller { label
459 compatible = "amlogic,meson8b-clkc";
484 clocks = <&clkc CLKID_VPU>;
486 assigned-clocks = <&clkc CLKID_VPU>;
493 clocks = <&clkc CLKID_RNG0>;
498 clocks = <&clkc CLKID_CLK81>;
502 clocks = <&clkc CLKID_I2C>;
506 clocks = <&clkc CLKID_I2C>;
528 clocks = <&clkc CLKID_PERIPH>;
541 clocks = <&clkc CLKID_PERIPH>;
560 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
570 <&clkc CLKID_FCLK_DIV4>,
571 <&clkc CLKID_FCLK_DIV3>,
572 <&clkc CLKID_FCLK_DIV5>,
573 <&clkc CLKID_SDHC>;
579 clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;
584 clocks = <&xtal>, <&clkc CLKID_CLK81>;
590 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>;
596 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>;
602 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>;
608 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>;
614 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
620 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
626 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
633 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;