Lines Matching +full:- +full:pinmux
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 adc1_in6_pins_a: adc1-in6-0 {
11 pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
15 adc12_ain_pins_a: adc12-ain-0 {
17 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
24 adc12_ain_pins_b: adc12-ain-1 {
26 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
31 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
33 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
38 cec_pins_a: cec-0 {
40 pinmux = <STM32_PINMUX('A', 15, AF4)>;
41 bias-disable;
42 drive-open-drain;
43 slew-rate = <0>;
47 cec_sleep_pins_a: cec-sleep-0 {
49 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
53 cec_pins_b: cec-1 {
55 pinmux = <STM32_PINMUX('B', 6, AF5)>;
56 bias-disable;
57 drive-open-drain;
58 slew-rate = <0>;
62 cec_sleep_pins_b: cec-sleep-1 {
64 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
68 dac_ch1_pins_a: dac-ch1-0 {
70 pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
74 dac_ch2_pins_a: dac-ch2-0 {
76 pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
80 dcmi_pins_a: dcmi-0 {
82 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
97 bias-disable;
101 dcmi_sleep_pins_a: dcmi-sleep-0 {
103 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
121 ethernet0_rgmii_pins_a: rgmii-0 {
123 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
131 bias-disable;
132 drive-push-pull;
133 slew-rate = <2>;
136 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
137 bias-disable;
138 drive-push-pull;
139 slew-rate = <0>;
142 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
148 bias-disable;
152 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
154 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
172 ethernet0_rgmii_pins_b: rgmii-1 {
174 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
182 bias-disable;
183 drive-push-pull;
184 slew-rate = <2>;
187 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
188 bias-disable;
189 drive-push-pull;
190 slew-rate = <0>;
193 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
199 bias-disable;
203 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
205 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
223 ethernet0_rgmii_pins_c: rgmii-2 {
225 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
233 bias-disable;
234 drive-push-pull;
235 slew-rate = <2>;
238 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
239 bias-disable;
240 drive-push-pull;
241 slew-rate = <0>;
244 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
250 bias-disable;
254 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
256 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
274 ethernet0_rmii_pins_a: rmii-0 {
276 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
282 bias-disable;
283 drive-push-pull;
284 slew-rate = <2>;
287 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
290 bias-disable;
294 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
296 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
308 fmc_pins_a: fmc-0 {
310 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
323 bias-disable;
324 drive-push-pull;
325 slew-rate = <1>;
328 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
329 bias-pull-up;
333 fmc_sleep_pins_a: fmc-sleep-0 {
335 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
352 i2c1_pins_a: i2c1-0 {
354 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
356 bias-disable;
357 drive-open-drain;
358 slew-rate = <0>;
362 i2c1_sleep_pins_a: i2c1-sleep-0 {
364 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
369 i2c1_pins_b: i2c1-1 {
371 pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
373 bias-disable;
374 drive-open-drain;
375 slew-rate = <0>;
379 i2c1_sleep_pins_b: i2c1-sleep-1 {
381 pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
386 i2c2_pins_a: i2c2-0 {
388 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
390 bias-disable;
391 drive-open-drain;
392 slew-rate = <0>;
396 i2c2_sleep_pins_a: i2c2-sleep-0 {
398 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
403 i2c2_pins_b1: i2c2-1 {
405 pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
406 bias-disable;
407 drive-open-drain;
408 slew-rate = <0>;
412 i2c2_sleep_pins_b1: i2c2-sleep-1 {
414 pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
418 i2c2_pins_c: i2c2-2 {
420 pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
422 bias-disable;
423 drive-open-drain;
424 slew-rate = <0>;
428 i2c2_pins_sleep_c: i2c2-sleep-2 {
430 pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
435 i2c5_pins_a: i2c5-0 {
437 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
439 bias-disable;
440 drive-open-drain;
441 slew-rate = <0>;
445 i2c5_sleep_pins_a: i2c5-sleep-0 {
447 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
453 i2c5_pins_b: i2c5-1 {
455 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
457 bias-disable;
458 drive-open-drain;
459 slew-rate = <0>;
463 i2c5_sleep_pins_b: i2c5-sleep-1 {
465 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
470 i2s2_pins_a: i2s2-0 {
472 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
475 slew-rate = <1>;
476 drive-push-pull;
477 bias-disable;
481 i2s2_sleep_pins_a: i2s2-sleep-0 {
483 pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
489 ltdc_pins_a: ltdc-0 {
491 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
519 bias-disable;
520 drive-push-pull;
521 slew-rate = <1>;
525 ltdc_sleep_pins_a: ltdc-sleep-0 {
527 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
558 ltdc_pins_b: ltdc-1 {
560 pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
588 bias-disable;
589 drive-push-pull;
590 slew-rate = <1>;
594 ltdc_sleep_pins_b: ltdc-sleep-1 {
596 pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
627 ltdc_pins_c: ltdc-2 {
629 pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
650 bias-disable;
651 drive-push-pull;
652 slew-rate = <0>;
655 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
656 bias-disable;
657 drive-push-pull;
658 slew-rate = <1>;
662 ltdc_sleep_pins_c: ltdc-sleep-2 {
664 pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
689 ltdc_pins_d: ltdc-3 {
691 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
692 bias-disable;
693 drive-push-pull;
694 slew-rate = <3>;
697 pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
724 bias-disable;
725 drive-push-pull;
726 slew-rate = <2>;
730 ltdc_sleep_pins_d: ltdc-sleep-3 {
732 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
763 m_can1_pins_a: m-can1-0 {
765 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
766 slew-rate = <1>;
767 drive-push-pull;
768 bias-disable;
771 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
772 bias-disable;
776 m_can1_sleep_pins_a: m_can1-sleep-0 {
778 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
783 m_can1_pins_b: m-can1-1 {
785 pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
786 slew-rate = <1>;
787 drive-push-pull;
788 bias-disable;
791 pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
792 bias-disable;
796 m_can1_sleep_pins_b: m_can1-sleep-1 {
798 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
803 m_can2_pins_a: m-can2-0 {
805 pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
806 slew-rate = <1>;
807 drive-push-pull;
808 bias-disable;
811 pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
812 bias-disable;
816 m_can2_sleep_pins_a: m_can2-sleep-0 {
818 pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
823 pwm1_pins_a: pwm1-0 {
825 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
828 bias-pull-down;
829 drive-push-pull;
830 slew-rate = <0>;
834 pwm1_sleep_pins_a: pwm1-sleep-0 {
836 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
842 pwm2_pins_a: pwm2-0 {
844 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
845 bias-pull-down;
846 drive-push-pull;
847 slew-rate = <0>;
851 pwm2_sleep_pins_a: pwm2-sleep-0 {
853 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
857 pwm3_pins_a: pwm3-0 {
859 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
860 bias-pull-down;
861 drive-push-pull;
862 slew-rate = <0>;
866 pwm3_sleep_pins_a: pwm3-sleep-0 {
868 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
872 pwm3_pins_b: pwm3-1 {
874 pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
875 bias-disable;
876 drive-push-pull;
877 slew-rate = <0>;
881 pwm3_sleep_pins_b: pwm3-sleep-1 {
883 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
887 pwm4_pins_a: pwm4-0 {
889 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
891 bias-pull-down;
892 drive-push-pull;
893 slew-rate = <0>;
897 pwm4_sleep_pins_a: pwm4-sleep-0 {
899 pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
904 pwm4_pins_b: pwm4-1 {
906 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
907 bias-pull-down;
908 drive-push-pull;
909 slew-rate = <0>;
913 pwm4_sleep_pins_b: pwm4-sleep-1 {
915 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
919 pwm5_pins_a: pwm5-0 {
921 pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
922 bias-pull-down;
923 drive-push-pull;
924 slew-rate = <0>;
928 pwm5_sleep_pins_a: pwm5-sleep-0 {
930 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
934 pwm5_pins_b: pwm5-1 {
936 pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
939 bias-disable;
940 drive-push-pull;
941 slew-rate = <0>;
945 pwm5_sleep_pins_b: pwm5-sleep-1 {
947 pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
953 pwm8_pins_a: pwm8-0 {
955 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
956 bias-pull-down;
957 drive-push-pull;
958 slew-rate = <0>;
962 pwm8_sleep_pins_a: pwm8-sleep-0 {
964 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
968 pwm12_pins_a: pwm12-0 {
970 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
971 bias-pull-down;
972 drive-push-pull;
973 slew-rate = <0>;
977 pwm12_sleep_pins_a: pwm12-sleep-0 {
979 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
983 qspi_clk_pins_a: qspi-clk-0 {
985 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
986 bias-disable;
987 drive-push-pull;
988 slew-rate = <3>;
992 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
994 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
998 qspi_bk1_pins_a: qspi-bk1-0 {
1000 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1004 bias-disable;
1005 drive-push-pull;
1006 slew-rate = <1>;
1009 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1010 bias-pull-up;
1011 drive-push-pull;
1012 slew-rate = <1>;
1016 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1018 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
1026 qspi_bk2_pins_a: qspi-bk2-0 {
1028 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1032 bias-disable;
1033 drive-push-pull;
1034 slew-rate = <1>;
1037 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1038 bias-pull-up;
1039 drive-push-pull;
1040 slew-rate = <1>;
1044 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1046 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1054 sai2a_pins_a: sai2a-0 {
1056 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1060 slew-rate = <0>;
1061 drive-push-pull;
1062 bias-disable;
1066 sai2a_sleep_pins_a: sai2a-sleep-0 {
1068 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1075 sai2a_pins_b: sai2a-1 {
1077 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1080 slew-rate = <0>;
1081 drive-push-pull;
1082 bias-disable;
1086 sai2a_sleep_pins_b: sai2a-sleep-1 {
1088 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1094 sai2a_pins_c: sai2a-2 {
1096 pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1099 slew-rate = <0>;
1100 drive-push-pull;
1101 bias-disable;
1105 sai2a_sleep_pins_c: sai2a-2 {
1107 pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1113 sai2b_pins_a: sai2b-0 {
1115 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1118 slew-rate = <0>;
1119 drive-push-pull;
1120 bias-disable;
1123 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1124 bias-disable;
1128 sai2b_sleep_pins_a: sai2b-sleep-0 {
1130 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1137 sai2b_pins_b: sai2b-1 {
1139 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1140 bias-disable;
1144 sai2b_sleep_pins_b: sai2b-sleep-1 {
1146 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1150 sai2b_pins_c: sai2b-2 {
1152 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1153 bias-disable;
1157 sai2b_sleep_pins_c: sai2b-sleep-2 {
1159 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1163 sai4a_pins_a: sai4a-0 {
1165 pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1166 slew-rate = <0>;
1167 drive-push-pull;
1168 bias-disable;
1172 sai4a_sleep_pins_a: sai4a-sleep-0 {
1174 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1178 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1180 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1185 slew-rate = <1>;
1186 drive-push-pull;
1187 bias-disable;
1190 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1191 slew-rate = <2>;
1192 drive-push-pull;
1193 bias-disable;
1197 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1199 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1203 slew-rate = <1>;
1204 drive-push-pull;
1205 bias-disable;
1208 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1209 slew-rate = <2>;
1210 drive-push-pull;
1211 bias-disable;
1214 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1215 slew-rate = <1>;
1216 drive-open-drain;
1217 bias-disable;
1221 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1223 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1232 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1234 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1237 slew-rate = <1>;
1238 drive-push-pull;
1239 bias-pull-up;
1242 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1243 bias-pull-up;
1247 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
1249 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1256 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
1258 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1261 slew-rate = <1>;
1262 drive-push-pull;
1263 bias-pull-up;
1266 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1267 bias-pull-up;
1271 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
1273 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1280 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
1282 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1287 slew-rate = <1>;
1288 drive-push-pull;
1289 bias-pull-up;
1292 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1293 slew-rate = <2>;
1294 drive-push-pull;
1295 bias-pull-up;
1299 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
1301 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1305 slew-rate = <1>;
1306 drive-push-pull;
1307 bias-pull-up;
1310 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1311 slew-rate = <2>;
1312 drive-push-pull;
1313 bias-pull-up;
1316 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1317 slew-rate = <1>;
1318 drive-open-drain;
1319 bias-pull-up;
1323 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
1325 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
1334 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
1336 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1341 slew-rate = <1>;
1342 drive-push-pull;
1343 bias-disable;
1346 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1347 slew-rate = <2>;
1348 drive-push-pull;
1349 bias-disable;
1353 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
1355 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1359 slew-rate = <1>;
1360 drive-push-pull;
1361 bias-disable;
1364 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1365 slew-rate = <2>;
1366 drive-push-pull;
1367 bias-disable;
1370 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1371 slew-rate = <1>;
1372 drive-open-drain;
1373 bias-disable;
1377 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
1379 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1383 slew-rate = <1>;
1384 drive-push-pull;
1385 bias-pull-up;
1389 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
1391 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1398 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
1400 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1404 slew-rate = <1>;
1405 drive-push-pull;
1406 bias-disable;
1410 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
1412 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1419 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
1421 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1425 slew-rate = <1>;
1426 drive-push-pull;
1427 bias-pull-up;
1431 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
1433 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1440 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
1442 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1449 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
1451 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1458 sdmmc3_b4_pins_a: sdmmc3-b4-0 {
1460 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1465 slew-rate = <1>;
1466 drive-push-pull;
1467 bias-pull-up;
1470 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1471 slew-rate = <2>;
1472 drive-push-pull;
1473 bias-pull-up;
1477 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
1479 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1483 slew-rate = <1>;
1484 drive-push-pull;
1485 bias-pull-up;
1488 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1489 slew-rate = <2>;
1490 drive-push-pull;
1491 bias-pull-up;
1494 pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
1495 slew-rate = <1>;
1496 drive-open-drain;
1497 bias-pull-up;
1501 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
1503 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1512 sdmmc3_b4_pins_b: sdmmc3-b4-1 {
1514 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1519 slew-rate = <1>;
1520 drive-push-pull;
1521 bias-pull-up;
1524 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1525 slew-rate = <2>;
1526 drive-push-pull;
1527 bias-pull-up;
1531 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
1533 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1537 slew-rate = <1>;
1538 drive-push-pull;
1539 bias-pull-up;
1542 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1543 slew-rate = <2>;
1544 drive-push-pull;
1545 bias-pull-up;
1548 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
1549 slew-rate = <1>;
1550 drive-open-drain;
1551 bias-pull-up;
1555 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
1557 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1566 spdifrx_pins_a: spdifrx-0 {
1568 pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
1569 bias-disable;
1573 spdifrx_sleep_pins_a: spdifrx-sleep-0 {
1575 pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
1579 spi2_pins_a: spi2-0 {
1581 pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI1_SCK */
1583 bias-disable;
1584 drive-push-pull;
1585 slew-rate = <1>;
1589 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */
1590 bias-disable;
1594 uart4_pins_a: uart4-0 {
1596 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1597 bias-disable;
1598 drive-push-pull;
1599 slew-rate = <0>;
1602 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1603 bias-disable;
1607 uart4_idle_pins_a: uart4-idle-0 {
1609 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
1612 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1613 bias-disable;
1617 uart4_sleep_pins_a: uart4-sleep-0 {
1619 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
1624 uart4_pins_b: uart4-1 {
1626 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
1627 bias-disable;
1628 drive-push-pull;
1629 slew-rate = <0>;
1632 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1633 bias-disable;
1637 uart4_pins_c: uart4-2 {
1639 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1640 bias-disable;
1641 drive-push-pull;
1642 slew-rate = <0>;
1645 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1646 bias-disable;
1650 uart7_pins_a: uart7-0 {
1652 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
1653 bias-disable;
1654 drive-push-pull;
1655 slew-rate = <0>;
1658 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
1661 bias-disable;
1665 uart7_pins_b: uart7-1 {
1667 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
1668 bias-disable;
1669 drive-push-pull;
1670 slew-rate = <0>;
1673 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
1674 bias-disable;
1678 uart7_pins_c: uart7-2 {
1680 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
1681 bias-disable;
1682 drive-push-pull;
1683 slew-rate = <0>;
1686 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
1687 bias-disable;
1691 uart7_idle_pins_c: uart7-idle-2 {
1693 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
1696 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
1697 bias-disable;
1701 uart7_sleep_pins_c: uart7-sleep-2 {
1703 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
1708 uart8_pins_a: uart8-0 {
1710 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
1711 bias-disable;
1712 drive-push-pull;
1713 slew-rate = <0>;
1716 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
1717 bias-disable;
1721 uart8_rtscts_pins_a: uart8rtscts-0 {
1723 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
1725 bias-disable;
1729 spi4_pins_a: spi4-0 {
1731 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
1733 bias-disable;
1734 drive-push-pull;
1735 slew-rate = <1>;
1738 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
1739 bias-disable;
1743 usart2_pins_a: usart2-0 {
1745 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
1747 bias-disable;
1748 drive-push-pull;
1749 slew-rate = <0>;
1752 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
1754 bias-disable;
1758 usart2_sleep_pins_a: usart2-sleep-0 {
1760 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
1767 usart2_pins_b: usart2-1 {
1769 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
1771 bias-disable;
1772 drive-push-pull;
1773 slew-rate = <0>;
1776 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
1778 bias-disable;
1782 usart2_sleep_pins_b: usart2-sleep-1 {
1784 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
1791 usart2_pins_c: usart2-2 {
1793 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
1795 bias-disable;
1796 drive-push-pull;
1797 slew-rate = <3>;
1800 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
1802 bias-disable;
1806 usart2_idle_pins_c: usart2-idle-2 {
1808 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
1812 pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
1813 bias-disable;
1814 drive-push-pull;
1815 slew-rate = <3>;
1818 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
1819 bias-disable;
1823 usart2_sleep_pins_c: usart2-sleep-2 {
1825 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
1832 usart3_pins_a: usart3-0 {
1834 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
1835 bias-disable;
1836 drive-push-pull;
1837 slew-rate = <0>;
1840 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
1841 bias-disable;
1845 usart3_pins_b: usart3-1 {
1847 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
1849 bias-disable;
1850 drive-push-pull;
1851 slew-rate = <0>;
1854 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
1856 bias-disable;
1860 usart3_idle_pins_b: usart3-idle-1 {
1862 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
1866 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
1867 bias-disable;
1868 drive-push-pull;
1869 slew-rate = <0>;
1872 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
1873 bias-disable;
1877 usart3_sleep_pins_b: usart3-sleep-1 {
1879 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
1886 usart3_pins_c: usart3-2 {
1888 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
1890 bias-disable;
1891 drive-push-pull;
1892 slew-rate = <0>;
1895 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
1897 bias-disable;
1901 usart3_idle_pins_c: usart3-idle-2 {
1903 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
1907 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
1908 bias-disable;
1909 drive-push-pull;
1910 slew-rate = <0>;
1913 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
1914 bias-disable;
1918 usart3_sleep_pins_c: usart3-sleep-2 {
1920 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
1927 usbotg_hs_pins_a: usbotg-hs-0 {
1929 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
1933 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
1935 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
1942 i2c2_pins_b2: i2c2-0 {
1944 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
1945 bias-disable;
1946 drive-open-drain;
1947 slew-rate = <0>;
1951 i2c2_sleep_pins_b2: i2c2-sleep-0 {
1953 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
1957 i2c4_pins_a: i2c4-0 {
1959 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
1961 bias-disable;
1962 drive-open-drain;
1963 slew-rate = <0>;
1967 i2c4_sleep_pins_a: i2c4-sleep-0 {
1969 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
1974 spi1_pins_a: spi1-0 {
1976 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
1978 bias-disable;
1979 drive-push-pull;
1980 slew-rate = <1>;
1984 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
1985 bias-disable;