Lines Matching full:ccu
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
70 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
71 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
72 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>,
73 <&ccu CLK_HDMI>;
81 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>,
82 <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH0>,
83 <&ccu CLK_DRAM_DE_BE0>;
91 clocks = <&ccu CLK_AHB_TVE0>, <&ccu CLK_AHB_LCD0>,
92 <&ccu CLK_AHB_DE_BE0>,
93 <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH1>,
94 <&ccu CLK_DRAM_TVE0>, <&ccu CLK_DRAM_DE_BE0>;
107 clocks = <&ccu CLK_CPU>;
126 clocks = <&ccu CLK_CPU>;
333 clocks = <&ccu CLK_AHB_DMA>;
341 clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
354 clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
369 clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
384 clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
386 resets = <&ccu RST_CSI0>;
394 clocks = <&ccu CLK_AHB_EMAC>;
412 resets = <&ccu RST_TCON0>, <&ccu RST_LVDS>;
414 clocks = <&ccu CLK_AHB_LCD0>,
415 <&ccu CLK_TCON0_CH0>,
416 <&ccu CLK_TCON0_CH1>;
463 resets = <&ccu RST_TCON1>;
465 clocks = <&ccu CLK_AHB_LCD1>,
466 <&ccu CLK_TCON1_CH0>,
467 <&ccu CLK_TCON1_CH1>;
512 clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
513 <&ccu CLK_DRAM_VE>;
515 resets = <&ccu RST_VE>;
523 clocks = <&ccu CLK_AHB_MMC0>,
524 <&ccu CLK_MMC0>,
525 <&ccu CLK_MMC0_OUTPUT>,
526 <&ccu CLK_MMC0_SAMPLE>;
542 clocks = <&ccu CLK_AHB_MMC1>,
543 <&ccu CLK_MMC1>,
544 <&ccu CLK_MMC1_OUTPUT>,
545 <&ccu CLK_MMC1_SAMPLE>;
559 clocks = <&ccu CLK_AHB_MMC2>,
560 <&ccu CLK_MMC2>,
561 <&ccu CLK_MMC2_OUTPUT>,
562 <&ccu CLK_MMC2_SAMPLE>;
578 clocks = <&ccu CLK_AHB_MMC3>,
579 <&ccu CLK_MMC3>,
580 <&ccu CLK_MMC3_OUTPUT>,
581 <&ccu CLK_MMC3_SAMPLE>;
597 clocks = <&ccu CLK_AHB_OTG>;
613 clocks = <&ccu CLK_USB_PHY>;
615 resets = <&ccu RST_USB_PHY0>,
616 <&ccu RST_USB_PHY1>,
617 <&ccu RST_USB_PHY2>;
626 clocks = <&ccu CLK_AHB_EHCI0>;
636 clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>;
647 clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>;
656 clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
657 <&ccu CLK_PLL_VIDEO0_2X>,
658 <&ccu CLK_PLL_VIDEO1_2X>;
696 clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
711 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
719 clocks = <&ccu CLK_AHB_EHCI1>;
729 clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>;
740 clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>;
742 resets = <&ccu RST_CSI1>;
750 clocks = <&ccu CLK_AHB_SPI3>, <&ccu CLK_SPI3>;
761 ccu: clock@1c20000 { label
762 compatible = "allwinner,sun7i-a20-ccu";
774 clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
1222 clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>;
1232 clocks = <&ccu CLK_APB0_IR0>, <&ccu CLK_IR0>;
1241 clocks = <&ccu CLK_APB0_IR1>, <&ccu CLK_IR1>;
1253 clocks = <&ccu CLK_APB0_I2S1>, <&ccu CLK_I2S1>;
1266 clocks = <&ccu CLK_APB0_I2S0>, <&ccu CLK_I2S0>;
1286 clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
1304 clocks = <&ccu CLK_APB0_I2S2>, <&ccu CLK_I2S2>;
1325 clocks = <&ccu CLK_APB1_UART0>;
1335 clocks = <&ccu CLK_APB1_UART1>;
1345 clocks = <&ccu CLK_APB1_UART2>;
1355 clocks = <&ccu CLK_APB1_UART3>;
1365 clocks = <&ccu CLK_APB1_UART4>;
1375 clocks = <&ccu CLK_APB1_UART5>;
1385 clocks = <&ccu CLK_APB1_UART6>;
1395 clocks = <&ccu CLK_APB1_UART7>;
1403 clocks = <&ccu CLK_APB1_PS20>;
1411 clocks = <&ccu CLK_APB1_PS21>;
1420 clocks = <&ccu CLK_APB1_I2C0>;
1433 clocks = <&ccu CLK_APB1_I2C1>;
1446 clocks = <&ccu CLK_APB1_I2C2>;
1459 clocks = <&ccu CLK_APB1_I2C3>;
1472 clocks = <&ccu CLK_APB1_CAN>;
1481 clocks = <&ccu CLK_APB1_I2C4>;
1504 clocks = <&ccu CLK_AHB_GPU>, <&ccu CLK_GPU>;
1506 resets = <&ccu RST_GPU>;
1508 assigned-clocks = <&ccu CLK_GPU>;
1517 clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>;
1538 clocks = <&ccu CLK_AHB_HSTIMER>;
1556 clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>,
1557 <&ccu CLK_DRAM_DE_FE0>;
1560 resets = <&ccu RST_DE_FE0>;
1588 clocks = <&ccu CLK_AHB_DE_FE1>, <&ccu CLK_DE_FE1>,
1589 <&ccu CLK_DRAM_DE_FE1>;
1592 resets = <&ccu RST_DE_FE1>;
1620 clocks = <&ccu CLK_AHB_DE_BE1>, <&ccu CLK_DE_BE1>,
1621 <&ccu CLK_DRAM_DE_BE1>;
1624 resets = <&ccu RST_DE_BE1>;
1668 clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
1669 <&ccu CLK_DRAM_DE_BE0>;
1672 resets = <&ccu RST_DE_BE0>;