Lines Matching full:ccu
46 #include <dt-bindings/clock/sun8i-r40-ccu.h>
48 #include <dt-bindings/reset/sun8i-r40-ccu.h>
140 clocks = <&ccu CLK_BUS_DE>,
141 <&ccu CLK_DE>;
144 resets = <&ccu RST_BUS_DE>;
229 clocks = <&ccu CLK_BUS_DMA>;
232 resets = <&ccu RST_BUS_DMA>;
241 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
243 resets = <&ccu RST_BUS_SPI0>;
254 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
256 resets = <&ccu RST_BUS_SPI1>;
267 clocks = <&ccu CLK_BUS_CSI0>, <&ccu CLK_CSI_SCLK>,
268 <&ccu CLK_DRAM_CSI0>;
270 resets = <&ccu RST_BUS_CSI0>;
279 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
280 <&ccu CLK_DRAM_VE>;
282 resets = <&ccu RST_BUS_VE>;
291 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
293 resets = <&ccu RST_BUS_MMC0>;
307 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
309 resets = <&ccu RST_BUS_MMC1>;
321 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
323 resets = <&ccu RST_BUS_MMC2>;
337 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
339 resets = <&ccu RST_BUS_MMC3>;
357 clocks = <&ccu CLK_USB_PHY0>,
358 <&ccu CLK_USB_PHY1>,
359 <&ccu CLK_USB_PHY2>;
363 resets = <&ccu RST_USB_PHY0>,
364 <&ccu RST_USB_PHY1>,
365 <&ccu RST_USB_PHY2>;
377 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
379 resets = <&ccu RST_BUS_CE>;
387 clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
389 resets = <&ccu RST_BUS_SPI2>;
399 clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
400 resets = <&ccu RST_BUS_SATA>;
409 clocks = <&ccu CLK_BUS_EHCI1>;
410 resets = <&ccu RST_BUS_EHCI1>;
420 clocks = <&ccu CLK_BUS_OHCI1>,
421 <&ccu CLK_USB_OHCI1>;
422 resets = <&ccu RST_BUS_OHCI1>;
432 clocks = <&ccu CLK_BUS_EHCI2>;
433 resets = <&ccu RST_BUS_EHCI2>;
443 clocks = <&ccu CLK_BUS_OHCI2>,
444 <&ccu CLK_USB_OHCI2>;
445 resets = <&ccu RST_BUS_OHCI2>;
456 clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
458 resets = <&ccu RST_BUS_SPI3>;
464 ccu: clock@1c20000 { label
465 compatible = "allwinner,sun8i-r40-ccu";
486 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
644 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
647 resets = <&ccu RST_BUS_IR0>;
657 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
660 resets = <&ccu RST_BUS_IR1>;
667 clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
670 resets = <&ccu RST_BUS_THS>;
681 clocks = <&ccu CLK_BUS_UART0>;
682 resets = <&ccu RST_BUS_UART0>;
692 clocks = <&ccu CLK_BUS_UART1>;
693 resets = <&ccu RST_BUS_UART1>;
703 clocks = <&ccu CLK_BUS_UART2>;
704 resets = <&ccu RST_BUS_UART2>;
714 clocks = <&ccu CLK_BUS_UART3>;
715 resets = <&ccu RST_BUS_UART3>;
725 clocks = <&ccu CLK_BUS_UART4>;
726 resets = <&ccu RST_BUS_UART4>;
736 clocks = <&ccu CLK_BUS_UART5>;
737 resets = <&ccu RST_BUS_UART5>;
747 clocks = <&ccu CLK_BUS_UART6>;
748 resets = <&ccu RST_BUS_UART6>;
758 clocks = <&ccu CLK_BUS_UART7>;
759 resets = <&ccu RST_BUS_UART7>;
767 clocks = <&ccu CLK_BUS_I2C0>;
768 resets = <&ccu RST_BUS_I2C0>;
780 clocks = <&ccu CLK_BUS_I2C1>;
781 resets = <&ccu RST_BUS_I2C1>;
793 clocks = <&ccu CLK_BUS_I2C2>;
794 resets = <&ccu RST_BUS_I2C2>;
806 clocks = <&ccu CLK_BUS_I2C3>;
807 resets = <&ccu RST_BUS_I2C3>;
819 clocks = <&ccu CLK_BUS_I2C4>;
820 resets = <&ccu RST_BUS_I2C4>;
845 clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
847 resets = <&ccu RST_BUS_GPU>;
852 syscon = <&ccu>;
856 resets = <&ccu RST_BUS_GMAC>;
858 clocks = <&ccu CLK_BUS_GMAC>;
872 clocks = <&ccu 155>;
882 clocks = <&ccu CLK_BUS_TCON_TOP>,
883 <&ccu CLK_TCON_TV0>,
884 <&ccu CLK_TVE0>,
885 <&ccu CLK_TCON_TV1>,
886 <&ccu CLK_TVE1>,
887 <&ccu CLK_DSI_DPHY>;
897 resets = <&ccu RST_BUS_TCON_TOP>;
1001 clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top CLK_TCON_TOP_TV0>;
1003 resets = <&ccu RST_BUS_TCON_TV0>;
1044 clocks = <&ccu CLK_BUS_TCON_TV1>, <&tcon_top CLK_TCON_TOP_TV1>;
1046 resets = <&ccu RST_BUS_TCON_TV1>;
1100 clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>,
1101 <&ccu CLK_HDMI>;
1103 resets = <&ccu RST_BUS_HDMI1>;
1130 clocks = <&ccu CLK_BUS_HDMI1>, <&ccu CLK_HDMI_SLOW>,
1131 <&ccu CLK_PLL_VIDEO0>, <&ccu CLK_PLL_VIDEO1>;
1133 resets = <&ccu RST_BUS_HDMI0>;