Lines Matching refs:tmp1
19 tmp1 .req r4 label
27 1: ldr tmp1, [pmc, #AT91_PMC_SR]
28 tst tmp1, #AT91_PMC_MCKRDY
36 1: ldr tmp1, [pmc, #AT91_PMC_SR]
37 tst tmp1, #AT91_PMC_MOSCS
45 1: ldr tmp1, [pmc, #AT91_PMC_SR]
46 tst tmp1, #AT91_PMC_MOSCSELS
56 mov tmp1, #AT91_PMC_PCK
57 str tmp1, [pmc, #AT91_PMC_SCDR]
63 mcr p15, 0, tmp1, c7, c0, 4
84 mov tmp1, #0
85 mcr p15, 0, tmp1, c7, c10, 4
87 ldr tmp1, [r0, #PM_DATA_PMC]
88 str tmp1, .pmc_base
89 ldr tmp1, [r0, #PM_DATA_RAMC0]
90 str tmp1, .sramc_base
91 ldr tmp1, [r0, #PM_DATA_RAMC1]
92 str tmp1, .sramc1_base
93 ldr tmp1, [r0, #PM_DATA_MEMCTRL]
94 str tmp1, .memtype
95 ldr tmp1, [r0, #PM_DATA_MODE]
96 str tmp1, .pm_mode
97 ldr tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
98 str tmp1, .mckr_offset
99 ldr tmp1, [r0, #PM_DATA_PMC_VERSION]
100 str tmp1, .pmc_version
102 ldr tmp1, [r0, #PM_DATA_SHDWC]
103 str tmp1, .shdwc
104 cmp tmp1, #0
105 ldrne tmp2, [tmp1, #0]
106 ldr tmp1, [r0, #PM_DATA_SFRBU]
107 str tmp1, .sfrbu
108 cmp tmp1, #0
109 ldrne tmp2, [tmp1, #0x10]
147 ldr tmp1, [pmc, tmp2]
148 bic tmp1, tmp1, #AT91_PMC_CSS
149 str tmp1, [pmc, tmp2]
155 mov tmp1, #0x1
156 str tmp1, [r0, #0x10]
160 mov tmp1, #0xA5000000
161 add tmp1, tmp1, #0x1
162 str tmp1, [r0, #0]
175 ldr tmp1, [pmc, tmp3]
176 bic tmp1, tmp1, #AT91_PMC_PRES
177 orr tmp1, tmp1, #AT91_PMC_PRES_64
178 str tmp1, [pmc, tmp3]
184 ldr tmp1, [pmc, #AT91_CKGR_MOR]
185 bic tmp1, tmp1, #AT91_PMC_MOSCEN
186 orr tmp1, tmp1, #AT91_PMC_KEY
187 str tmp1, [pmc, #AT91_CKGR_MOR]
190 ldr tmp1, [pmc, #AT91_PMC_SR]
191 str tmp1, .saved_osc_status
192 tst tmp1, #AT91_PMC_MOSCRCS
196 ldr tmp1, [pmc, #AT91_CKGR_MOR]
197 bic tmp1, tmp1, #AT91_PMC_MOSCRCEN
198 bic tmp1, tmp1, #AT91_PMC_KEY_MASK
199 orr tmp1, tmp1, #AT91_PMC_KEY
200 str tmp1, [pmc, #AT91_CKGR_MOR]
203 2: ldr tmp1, [pmc, #AT91_PMC_SR]
204 tst tmp1, #AT91_PMC_MOSCRCS
215 ldr tmp1, [pmc, tmp3]
216 bic tmp1, tmp1, #AT91_PMC_PRES
217 str tmp1, [pmc, tmp3]
222 ldr tmp1, .saved_osc_status
223 tst tmp1, #AT91_PMC_MOSCRCS
227 ldr tmp1, [pmc, #AT91_CKGR_MOR]
228 orr tmp1, tmp1, #AT91_PMC_MOSCRCEN
229 bic tmp1, tmp1, #AT91_PMC_KEY_MASK
230 orr tmp1, tmp1, #AT91_PMC_KEY
231 str tmp1, [pmc, #AT91_CKGR_MOR]
234 3: ldr tmp1, [pmc, #AT91_PMC_SR]
235 tst tmp1, #AT91_PMC_MOSCRCS
239 4: ldr tmp1, [pmc, #AT91_CKGR_MOR]
240 orr tmp1, tmp1, #AT91_PMC_MOSCEN
241 orr tmp1, tmp1, #AT91_PMC_KEY
242 str tmp1, [pmc, #AT91_CKGR_MOR]
257 ldr tmp1, [pmc, #AT91_PMC_SR]
258 str tmp1, .saved_osc_status
259 tst tmp1, #AT91_PMC_MOSCRCS
263 ldr tmp1, [pmc, #AT91_CKGR_MOR]
264 orr tmp1, tmp1, #AT91_PMC_MOSCRCEN
265 bic tmp1, tmp1, #AT91_PMC_KEY_MASK
266 orr tmp1, tmp1, #AT91_PMC_KEY
267 str tmp1, [pmc, #AT91_CKGR_MOR]
270 1: ldr tmp1, [pmc, #AT91_PMC_SR]
271 tst tmp1, #AT91_PMC_MOSCRCS
275 2: ldr tmp1, [pmc, #AT91_CKGR_MOR]
276 bic tmp1, tmp1, #AT91_PMC_MOSCSEL
277 bic tmp1, tmp1, #AT91_PMC_KEY_MASK
278 orr tmp1, tmp1, #AT91_PMC_KEY
279 str tmp1, [pmc, #AT91_CKGR_MOR]
284 ldr tmp1, [pmc, #AT91_CKGR_MOR]
285 bic tmp1, tmp1, #AT91_PMC_MOSCEN
286 bic tmp1, tmp1, #AT91_PMC_KEY_MASK
287 orr tmp1, tmp1, #AT91_PMC_KEY
288 str tmp1, [pmc, #AT91_CKGR_MOR]
291 ldr tmp1, [pmc, tmp2]
292 bic tmp1, tmp1, #AT91_PMC_CSS
293 orr tmp1, tmp1, #AT91_PMC_CSS_MAIN
294 str tmp1, [pmc, tmp2]
299 ldr tmp1, [pmc, #AT91_CKGR_MOR]
300 orr tmp1, tmp1, #AT91_PMC_WAITMODE
301 bic tmp1, tmp1, #AT91_PMC_KEY_MASK
302 orr tmp1, tmp1, #AT91_PMC_KEY
303 str tmp1, [pmc, #AT91_CKGR_MOR]
312 ldr tmp1, [pmc, #AT91_CKGR_MOR]
313 orr tmp1, tmp1, #AT91_PMC_MOSCEN
314 bic tmp1, tmp1, #AT91_PMC_KEY_MASK
315 orr tmp1, tmp1, #AT91_PMC_KEY
316 str tmp1, [pmc, #AT91_CKGR_MOR]
321 ldr tmp1, [pmc, tmp2]
322 bic tmp1, tmp1, #AT91_PMC_CSS
323 str tmp1, [pmc, tmp2]
328 ldr tmp1, [pmc, #AT91_CKGR_MOR]
329 orr tmp1, tmp1, #AT91_PMC_MOSCSEL
330 bic tmp1, tmp1, #AT91_PMC_KEY_MASK
331 orr tmp1, tmp1, #AT91_PMC_KEY
332 str tmp1, [pmc, #AT91_CKGR_MOR]
337 ldr tmp1, [pmc, tmp2]
338 bic tmp1, tmp1, #AT91_PMC_CSS
339 orr tmp1, tmp1, #AT91_PMC_CSS_MAIN
340 str tmp1, [pmc, tmp2]
345 ldr tmp1, .saved_osc_status
346 tst tmp1, #AT91_PMC_MOSCRCS
350 ldr tmp1, [pmc, #AT91_CKGR_MOR]
351 bic tmp1, tmp1, #AT91_PMC_MOSCRCEN
352 bic tmp1, tmp1, #AT91_PMC_KEY_MASK
353 orr tmp1, tmp1, #AT91_PMC_KEY
354 str tmp1, [pmc, #AT91_CKGR_MOR]
357 4: ldr tmp1, [pmc, #AT91_PMC_SR]
358 tst tmp1, #AT91_PMC_MOSCRCS
366 ldr tmp1, .pmc_version
367 cmp tmp1, #AT91_PMC_V1
377 mov tmp1, #0
380 orr tmp1, tmp1, tmp2
385 orr tmp1, tmp1, tmp2
386 str tmp1, .saved_pllar
389 ldr tmp1, [pmc, #AT91_PMC_PLL_UPDT]
390 bic tmp1, tmp1, #AT91_PMC_PLL_UPDT_UPDATE
391 bic tmp1, tmp1, #AT91_PMC_PLL_UPDT_ID
392 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
395 ldr tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
396 bic tmp1, tmp1, #AT91_PMC_PLL_CTRL0_ENPLLCK
397 orr tmp1, tmp1, #AT91_PMC_PLL_CTRL0_ENPLL
398 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
401 ldr tmp1, [pmc, #AT91_PMC_PLL_UPDT]
402 orr tmp1, tmp1, #AT91_PMC_PLL_UPDT_UPDATE
403 bic tmp1, tmp1, #AT91_PMC_PLL_UPDT_ID
404 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
407 ldr tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
408 bic tmp1, tmp1, #AT91_PMC_PLL_CTRL0_ENPLL
409 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
412 ldr tmp1, [pmc, #AT91_PMC_PLL_UPDT]
413 orr tmp1, tmp1, #AT91_PMC_PLL_UPDT_UPDATE
414 bic tmp1, tmp1, #AT91_PMC_PLL_UPDT_ID
415 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
421 ldr tmp1, [pmc, #AT91_CKGR_PLLAR]
422 str tmp1, .saved_pllar
425 mov tmp1, #AT91_PMC_PLLCOUNT
426 orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */
427 str tmp1, [pmc, #AT91_CKGR_PLLAR]
439 ldr tmp1, [pmc, #AT91_PMC_PLL_UPDT]
440 bic tmp1, tmp1, #AT91_PMC_PLL_UPDT_ID
441 bic tmp1, tmp1, #AT91_PMC_PLL_UPDT_UPDATE
442 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
445 ldr tmp1, =AT91_PMC_PLL_ACR_DEFAULT_PLLA
446 str tmp1, [pmc, #AT91_PMC_PLL_ACR]
449 ldr tmp1, [pmc, #AT91_PMC_PLL_CTRL1]
452 orr tmp1, tmp1, tmp3
453 str tmp1, [pmc, #AT91_PMC_PLL_CTRL1]
456 ldr tmp1, [pmc, #AT91_PMC_PLL_UPDT]
457 bic tmp1, tmp1, #AT91_PMC_PLL_UPDT_ID
458 orr tmp1, tmp1, #AT91_PMC_PLL_UPDT_UPDATE
459 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
462 ldr tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
463 orr tmp1, tmp1, #AT91_PMC_PLL_CTRL0_ENLOCK
464 orr tmp1, tmp1, #AT91_PMC_PLL_CTRL0_ENPLL
465 orr tmp1, tmp1, #AT91_PMC_PLL_CTRL0_ENPLLCK
466 bic tmp1, tmp1, #0xff
469 orr tmp1, tmp1, tmp3
470 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
473 ldr tmp1, [pmc, #AT91_PMC_PLL_UPDT]
474 orr tmp1, tmp1, #AT91_PMC_PLL_UPDT_UPDATE
475 bic tmp1, tmp1, #AT91_PMC_PLL_UPDT_ID
476 str tmp1, [pmc, #AT91_PMC_PLL_UPDT]
479 3: ldr tmp1, [pmc, #AT91_PMC_PLL_ISR0]
480 tst tmp1, #0x1
494 1: ldr tmp1, [pmc, #AT91_PMC_SR]
495 tst tmp1, #AT91_PMC_LOCKA
506 ldr tmp1, [pmc, tmp2]
507 str tmp1, .saved_mckr
514 bic tmp1, tmp1, #AT91_PMC_CSS
517 orr tmp1, tmp1, #AT91_PMC_CSS_MAIN
519 str tmp1, [pmc, tmp2]
543 ldr tmp1, .mckr_offset
545 str tmp2, [pmc, tmp1]