Lines Matching +full:32 +full:k
3 * OMAP 32ksynctimer/counter_32k-related code
22 #include <plat/counter-32k.h>
24 /* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
31 * 32KHz clocksource ... always available, on pretty most chips except
47 * 32k sync timer. Convert the cycles elapsed since last read into
71 * omap_init_clocksource_32k - setup and register counter 32k as a
84 * 32k sync Counter IP register offsets vary between the in omap_init_clocksource_32k()
102 ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768, in omap_init_clocksource_32k()
103 250, 32, clocksource_mmio_readl_up); in omap_init_clocksource_32k()
105 pr_err("32k_counter: can't register clocksource\n"); in omap_init_clocksource_32k()
109 sched_clock_register(omap_32k_read_sched_clock, 32, 32768); in omap_init_clocksource_32k()
111 pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n"); in omap_init_clocksource_32k()