Lines Matching +full:0 +full:x19000000

13 		#size-cells = <0>;
15 		cpu0: cpu@0 {
17 			compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 			reg = <0>;
26 			compatible = "ingenic,xburst-fpu1.0-mxu1.1";
35 		#address-cells = <0>;
43 		reg = <0x10001000 0x50>;
54 		#clock-cells = <0>;
59 		#clock-cells = <0>;
65 		reg = <0x10000000 0x100>;
77 		reg = <0x10002000 0x1000>;
80 		ranges = <0x0 0x10002000 0x1000>;
95 		watchdog: watchdog@0 {
97 			reg = <0x0 0xc>;
105 			reg = <0x40 0x80>;
119 			reg = <0xe0 0x20>;
130 		reg = <0x10003000 0x4c>;
141 		reg = <0x10010000 0x600>;
144 		#size-cells = <0>;
146 		gpa: gpio@0 {
148 			reg = <0>;
151 			gpio-ranges = <&pinctrl 0 0 32>;
166 			gpio-ranges = <&pinctrl 0 32 32>;
181 			gpio-ranges = <&pinctrl 0 64 32>;
196 			gpio-ranges = <&pinctrl 0 96 32>;
211 			gpio-ranges = <&pinctrl 0 128 32>;
226 			gpio-ranges = <&pinctrl 0 160 32>;
240 		#size-cells = <0>;
243 		gpio-miso = <&gpe 14 0>;
244 		gpio-sck = <&gpe 15 0>;
245 		gpio-mosi = <&gpe 17 0>;
246 		cs-gpios = <&gpe 16 0>, <&gpe 18 0>;
248 		spidev@0 {
250 			reg = <0>;
257 		reg = <0x10030000 0x100>;
270 		reg = <0x10031000 0x100>;
283 		reg = <0x10032000 0x100>;
296 		reg = <0x10033000 0x100>;
309 		reg = <0x10034000 0x100>;
323 		#size-cells = <0>;
325 		reg = <0x10050000 0x1000>;
333 		pinctrl-0 = <&pins_i2c0_data>;
341 		#size-cells = <0>;
342 		reg = <0x10051000 0x1000>;
350 		pinctrl-0 = <&pins_i2c1_data>;
358 		#size-cells = <0>;
359 		reg = <0x10052000 0x1000>;
367 		pinctrl-0 = <&pins_i2c2_data>;
375 		#size-cells = <0>;
376 		reg = <0x10053000 0x1000>;
384 		pinctrl-0 = <&pins_i2c3_data>;
392 		#size-cells = <0>;
393 		reg = <0x10054000 0x1000>;
401 		pinctrl-0 = <&pins_i2c4_data>;
408 		reg = <0x13410000 0x10000>;
411 		ranges = <0 0 0x13410000 0x10000>,
412 			 <1 0 0x1b000000 0x1000000>,
413 			 <2 0 0x1a000000 0x1000000>,
414 			 <3 0 0x19000000 0x1000000>,
415 			 <4 0 0x18000000 0x1000000>,
416 			 <5 0 0x17000000 0x1000000>,
417 			 <6 0 0x16000000 0x1000000>;
424 			reg = <0 0xd0 0x30>;
432 			eth0_addr: eth-mac-addr@0x22 {
433 				reg = <0x22 0x6>;
440 		reg = <0x13420000 0x400>, <0x13421000 0x40>;
451 		reg = <0x13450000 0x1000>;
462 		dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
463 		       <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
471 		reg = <0x13460000 0x1000>;
482 		dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
483 		       <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
491 		reg = <0x134d0000 0x10000>;