Lines Matching +full:0 +full:x1b000000
12 #size-cells = <0>;
14 cpu@0 {
18 reg = <0>;
34 #clock-cells = <0>;
57 reg = <0x18000000 0x100>;
64 reg = <0x18020000 0x14>;
76 reg = <0x18040000 0x34>;
92 reg = <0x18050000 0x100>;
102 reg = <0x18060010 0x8>;
113 reg = <0x1806001c 0x4>;
121 reg = <0x19000000 0x200>;
137 reg = <0x1a000000 0x200>;
155 #size-cells = <0>;
159 #size-cells = <0>;
162 reg = <0x10>;
174 #size-cells = <0>;
176 switch_port0: port@0 {
177 reg = <0x0>;
190 reg = <0x1>;
198 reg = <0x2>;
206 reg = <0x3>;
214 reg = <0x4>;
224 #size-cells = <0>;
228 phy_port0: phy@0 {
229 reg = <0x0>;
230 interrupts = <0>;
235 reg = <0x1>;
236 interrupts = <0>;
241 reg = <0x2>;
242 interrupts = <0>;
247 reg = <0x3>;
248 interrupts = <0>;
253 reg = <0x4>;
254 interrupts = <0>;
264 reg = <0x1b000000 0x200>;
277 reg = <0x1f000000 0x10>;
283 #size-cells = <0>;
295 #phy-cells = <0>;