Lines Matching full:p
152 static void kvm_mips_build_save_scratch(u32 **p, unsigned int tmp, in kvm_mips_build_save_scratch() argument
156 UASM_i_MFC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_save_scratch()
157 UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame); in kvm_mips_build_save_scratch()
161 UASM_i_MFC0(p, tmp, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_save_scratch()
162 UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame); in kvm_mips_build_save_scratch()
166 static void kvm_mips_build_restore_scratch(u32 **p, unsigned int tmp, in kvm_mips_build_restore_scratch() argument
173 UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame); in kvm_mips_build_restore_scratch()
174 UASM_i_MTC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_restore_scratch()
177 UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame); in kvm_mips_build_restore_scratch()
178 UASM_i_MTC0(p, tmp, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_restore_scratch()
184 * @p: Code buffer pointer.
190 static inline void build_set_exc_base(u32 **p, unsigned int reg) in build_set_exc_base() argument
194 uasm_i_ori(p, reg, reg, MIPS_EBASE_WG); in build_set_exc_base()
195 UASM_i_MTC0(p, reg, C0_EBASE); in build_set_exc_base()
197 uasm_i_mtc0(p, reg, C0_EBASE); in build_set_exc_base()
217 u32 *p = addr; in kvm_mips_build_vcpu_run() local
225 UASM_i_ADDIU(&p, K1, SP, -(int)sizeof(struct pt_regs)); in kvm_mips_build_vcpu_run()
229 UASM_i_SW(&p, i, offsetof(struct pt_regs, regs[i]), K1); in kvm_mips_build_vcpu_run()
233 uasm_i_mfc0(&p, V0, C0_STATUS); in kvm_mips_build_vcpu_run()
234 UASM_i_SW(&p, V0, offsetof(struct pt_regs, cp0_status), K1); in kvm_mips_build_vcpu_run()
237 kvm_mips_build_save_scratch(&p, V1, K1); in kvm_mips_build_vcpu_run()
240 UASM_i_MTC0(&p, A0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_vcpu_run()
243 UASM_i_ADDIU(&p, K1, A0, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_vcpu_run()
249 UASM_i_SW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_vcpu_run()
252 UASM_i_SW(&p, GP, offsetof(struct kvm_vcpu_arch, host_gp), K1); in kvm_mips_build_vcpu_run()
258 UASM_i_LA(&p, K0, ST0_EXL | KSU_USER | ST0_BEV | ST0_KX_IF_64); in kvm_mips_build_vcpu_run()
259 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_vcpu_run()
260 uasm_i_ehb(&p); in kvm_mips_build_vcpu_run()
263 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1); in kvm_mips_build_vcpu_run()
264 build_set_exc_base(&p, K0); in kvm_mips_build_vcpu_run()
271 uasm_i_addiu(&p, K0, ZERO, ST0_EXL | KSU_USER | ST0_IE | ST0_KX_IF_64); in kvm_mips_build_vcpu_run()
272 uasm_i_andi(&p, V0, V0, ST0_IM); in kvm_mips_build_vcpu_run()
273 uasm_i_or(&p, K0, K0, V0); in kvm_mips_build_vcpu_run()
274 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_vcpu_run()
275 uasm_i_ehb(&p); in kvm_mips_build_vcpu_run()
277 p = kvm_mips_build_enter_guest(p); in kvm_mips_build_vcpu_run()
279 return p; in kvm_mips_build_vcpu_run()
294 u32 *p = addr; in kvm_mips_build_enter_guest() local
305 UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, pc), K1); in kvm_mips_build_enter_guest()
306 UASM_i_MTC0(&p, T0, C0_EPC); in kvm_mips_build_enter_guest()
311 UASM_i_MFC0(&p, K0, C0_PWBASE); in kvm_mips_build_enter_guest()
313 UASM_i_MFC0(&p, K0, c0_kscratch(), pgd_reg); in kvm_mips_build_enter_guest()
314 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_pgd), K1); in kvm_mips_build_enter_guest()
324 UASM_i_LW(&p, S0, (int)offsetof(struct kvm_vcpu, kvm) - in kvm_mips_build_enter_guest()
326 UASM_i_LW(&p, A0, offsetof(struct kvm, arch.gpa_mm.pgd), S0); in kvm_mips_build_enter_guest()
327 UASM_i_LA(&p, T9, (unsigned long)tlbmiss_handler_setup_pgd); in kvm_mips_build_enter_guest()
328 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_enter_guest()
331 UASM_i_MTC0(&p, A0, C0_PWBASE); in kvm_mips_build_enter_guest()
333 uasm_i_nop(&p); in kvm_mips_build_enter_guest()
336 uasm_i_addiu(&p, V1, ZERO, 1); in kvm_mips_build_enter_guest()
337 uasm_i_mfc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_enter_guest()
338 uasm_i_ins(&p, K0, V1, MIPS_GCTL0_GM_SHIFT, 1); in kvm_mips_build_enter_guest()
339 uasm_i_mtc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_enter_guest()
348 uasm_i_mfc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_enter_guest()
350 uasm_i_ext(&p, T1, T0, MIPS_GCTL1_ID_SHIFT, in kvm_mips_build_enter_guest()
352 uasm_i_ins(&p, T0, T1, MIPS_GCTL1_RID_SHIFT, in kvm_mips_build_enter_guest()
354 uasm_i_mtc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_enter_guest()
363 UASM_i_MFC0(&p, K0, C0_ENTRYHI); in kvm_mips_build_enter_guest()
364 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_entryhi), in kvm_mips_build_enter_guest()
368 UASM_i_ADDIU(&p, T1, S0, in kvm_mips_build_enter_guest()
372 UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, cop0), K1); in kvm_mips_build_enter_guest()
373 UASM_i_LW(&p, T0, offsetof(struct mips_coproc, reg[MIPS_CP0_STATUS][0]), in kvm_mips_build_enter_guest()
375 uasm_i_andi(&p, T0, T0, KSU_USER | ST0_ERL | ST0_EXL); in kvm_mips_build_enter_guest()
376 uasm_i_xori(&p, T0, T0, KSU_USER); in kvm_mips_build_enter_guest()
377 uasm_il_bnez(&p, &r, T0, label_kernel_asid); in kvm_mips_build_enter_guest()
378 UASM_i_ADDIU(&p, T1, K1, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_enter_guest()
381 UASM_i_ADDIU(&p, T1, K1, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_enter_guest()
383 uasm_l_kernel_asid(&l, p); in kvm_mips_build_enter_guest()
388 uasm_i_lw(&p, T2, offsetof(struct thread_info, cpu), GP); in kvm_mips_build_enter_guest()
390 uasm_i_sll(&p, T2, T2, ilog2(sizeof(long))); in kvm_mips_build_enter_guest()
391 UASM_i_ADDU(&p, T3, T1, T2); in kvm_mips_build_enter_guest()
392 UASM_i_LW(&p, K0, 0, T3); in kvm_mips_build_enter_guest()
398 uasm_i_addiu(&p, T3, ZERO, sizeof(struct cpuinfo_mips)/sizeof(long)); in kvm_mips_build_enter_guest()
399 uasm_i_mul(&p, T2, T2, T3); in kvm_mips_build_enter_guest()
401 UASM_i_LA_mostly(&p, AT, (long)&cpu_data[0].asid_mask); in kvm_mips_build_enter_guest()
402 UASM_i_ADDU(&p, AT, AT, T2); in kvm_mips_build_enter_guest()
403 UASM_i_LW(&p, T2, uasm_rel_lo((long)&cpu_data[0].asid_mask), AT); in kvm_mips_build_enter_guest()
404 uasm_i_and(&p, K0, K0, T2); in kvm_mips_build_enter_guest()
406 uasm_i_andi(&p, K0, K0, MIPS_ENTRYHI_ASID); in kvm_mips_build_enter_guest()
416 UASM_i_LW(&p, A0, (int)offsetof(struct mm_struct, pgd) - in kvm_mips_build_enter_guest()
419 UASM_i_LA(&p, T9, (unsigned long)tlbmiss_handler_setup_pgd); in kvm_mips_build_enter_guest()
420 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_enter_guest()
421 uasm_i_mtc0(&p, K0, C0_ENTRYHI); in kvm_mips_build_enter_guest()
424 uasm_i_mtc0(&p, K0, C0_ENTRYHI); in kvm_mips_build_enter_guest()
427 uasm_i_ehb(&p); in kvm_mips_build_enter_guest()
430 uasm_i_mtc0(&p, ZERO, C0_HWRENA); in kvm_mips_build_enter_guest()
437 UASM_i_LW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1); in kvm_mips_build_enter_guest()
442 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, hi), K1); in kvm_mips_build_enter_guest()
443 uasm_i_mthi(&p, K0); in kvm_mips_build_enter_guest()
445 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, lo), K1); in kvm_mips_build_enter_guest()
446 uasm_i_mtlo(&p, K0); in kvm_mips_build_enter_guest()
450 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1); in kvm_mips_build_enter_guest()
451 UASM_i_LW(&p, K1, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1); in kvm_mips_build_enter_guest()
454 uasm_i_eret(&p); in kvm_mips_build_enter_guest()
458 return p; in kvm_mips_build_enter_guest()
472 u32 *p = addr; in kvm_mips_build_tlb_refill_exception() local
484 UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_tlb_refill_exception()
487 UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_tlb_refill_exception()
490 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu, arch.gprs[K0]), K1); in kvm_mips_build_tlb_refill_exception()
499 UASM_i_MFC0(&p, K1, C0_PGD); in kvm_mips_build_tlb_refill_exception()
500 uasm_i_lddir(&p, K0, K1, 3); /* global page dir */ in kvm_mips_build_tlb_refill_exception()
502 uasm_i_lddir(&p, K1, K0, 1); /* middle page dir */ in kvm_mips_build_tlb_refill_exception()
504 uasm_i_ldpte(&p, K1, 0); /* even */ in kvm_mips_build_tlb_refill_exception()
505 uasm_i_ldpte(&p, K1, 1); /* odd */ in kvm_mips_build_tlb_refill_exception()
506 uasm_i_tlbwr(&p); in kvm_mips_build_tlb_refill_exception()
520 build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ in kvm_mips_build_tlb_refill_exception()
522 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ in kvm_mips_build_tlb_refill_exception()
527 build_get_ptep(&p, K0, K1); in kvm_mips_build_tlb_refill_exception()
528 build_update_entries(&p, K0, K1); in kvm_mips_build_tlb_refill_exception()
529 build_tlb_write_entry(&p, &l, &r, tlb_random); in kvm_mips_build_tlb_refill_exception()
535 UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_tlb_refill_exception()
538 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu, arch.gprs[K0]), K1); in kvm_mips_build_tlb_refill_exception()
539 uasm_i_ehb(&p); in kvm_mips_build_tlb_refill_exception()
540 UASM_i_MFC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_tlb_refill_exception()
543 uasm_i_eret(&p); in kvm_mips_build_tlb_refill_exception()
545 return p; in kvm_mips_build_tlb_refill_exception()
560 u32 *p = addr; in kvm_mips_build_exception() local
570 UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_exception()
573 UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_exception()
574 UASM_i_ADDIU(&p, K1, K1, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_exception()
577 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1); in kvm_mips_build_exception()
580 uasm_il_b(&p, &r, label_exit_common); in kvm_mips_build_exception()
581 uasm_i_nop(&p); in kvm_mips_build_exception()
586 return p; in kvm_mips_build_exception()
602 u32 *p = addr; in kvm_mips_build_exit() local
627 UASM_i_SW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1); in kvm_mips_build_exit()
632 uasm_i_mfhi(&p, T0); in kvm_mips_build_exit()
633 UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, hi), K1); in kvm_mips_build_exit()
635 uasm_i_mflo(&p, T0); in kvm_mips_build_exit()
636 UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, lo), K1); in kvm_mips_build_exit()
640 uasm_i_ehb(&p); in kvm_mips_build_exit()
641 UASM_i_MFC0(&p, T0, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_exit()
642 UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1); in kvm_mips_build_exit()
647 UASM_i_MFC0(&p, S0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_exit()
653 UASM_i_MFC0(&p, K0, C0_EPC); in kvm_mips_build_exit()
654 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, pc), K1); in kvm_mips_build_exit()
656 UASM_i_MFC0(&p, K0, C0_BADVADDR); in kvm_mips_build_exit()
657 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_badvaddr), in kvm_mips_build_exit()
660 uasm_i_mfc0(&p, K0, C0_CAUSE); in kvm_mips_build_exit()
661 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_cause), K1); in kvm_mips_build_exit()
664 uasm_i_mfc0(&p, K0, C0_BADINSTR); in kvm_mips_build_exit()
665 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_exit()
670 uasm_i_mfc0(&p, K0, C0_BADINSTRP); in kvm_mips_build_exit()
671 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_exit()
679 uasm_i_mfc0(&p, V0, C0_STATUS); in kvm_mips_build_exit()
681 uasm_i_lui(&p, AT, ST0_BEV >> 16); in kvm_mips_build_exit()
682 uasm_i_or(&p, K0, V0, AT); in kvm_mips_build_exit()
684 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_exit()
685 uasm_i_ehb(&p); in kvm_mips_build_exit()
687 UASM_i_LA_mostly(&p, K0, (long)&ebase); in kvm_mips_build_exit()
688 UASM_i_LW(&p, K0, uasm_rel_lo((long)&ebase), K0); in kvm_mips_build_exit()
689 build_set_exc_base(&p, K0); in kvm_mips_build_exit()
696 uasm_i_lui(&p, AT, ST0_CU1 >> 16); in kvm_mips_build_exit()
697 uasm_i_and(&p, V1, V0, AT); in kvm_mips_build_exit()
698 uasm_il_beqz(&p, &r, V1, label_fpu_1); in kvm_mips_build_exit()
699 uasm_i_nop(&p); in kvm_mips_build_exit()
700 uasm_i_cfc1(&p, T0, 31); in kvm_mips_build_exit()
701 uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.fcr31), in kvm_mips_build_exit()
703 uasm_i_ctc1(&p, ZERO, 31); in kvm_mips_build_exit()
704 uasm_l_fpu_1(&l, p); in kvm_mips_build_exit()
712 uasm_i_mfc0(&p, T0, C0_CONFIG5); in kvm_mips_build_exit()
713 uasm_i_ext(&p, T0, T0, 27, 1); /* MIPS_CONF5_MSAEN */ in kvm_mips_build_exit()
714 uasm_il_beqz(&p, &r, T0, label_msa_1); in kvm_mips_build_exit()
715 uasm_i_nop(&p); in kvm_mips_build_exit()
716 uasm_i_cfcmsa(&p, T0, MSA_CSR); in kvm_mips_build_exit()
717 uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.msacsr), in kvm_mips_build_exit()
719 uasm_i_ctcmsa(&p, MSA_CSR, ZERO); in kvm_mips_build_exit()
720 uasm_l_msa_1(&l, p); in kvm_mips_build_exit()
726 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, host_entryhi), in kvm_mips_build_exit()
728 UASM_i_MTC0(&p, K0, C0_ENTRYHI); in kvm_mips_build_exit()
737 UASM_i_LW(&p, A0, in kvm_mips_build_exit()
739 UASM_i_LA(&p, T9, (unsigned long)tlbmiss_handler_setup_pgd); in kvm_mips_build_exit()
740 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_exit()
743 UASM_i_MTC0(&p, A0, C0_PWBASE); in kvm_mips_build_exit()
745 uasm_i_nop(&p); in kvm_mips_build_exit()
748 uasm_i_mfc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_exit()
749 uasm_i_ins(&p, K0, ZERO, MIPS_GCTL0_GM_SHIFT, 1); in kvm_mips_build_exit()
750 uasm_i_mtc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_exit()
753 uasm_i_sw(&p, K0, in kvm_mips_build_exit()
761 uasm_i_mfc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_exit()
763 uasm_i_ins(&p, T0, ZERO, MIPS_GCTL1_RID_SHIFT, in kvm_mips_build_exit()
765 uasm_i_mtc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_exit()
770 uasm_i_addiu(&p, AT, ZERO, ~(ST0_EXL | KSU_USER | ST0_IE)); in kvm_mips_build_exit()
771 uasm_i_and(&p, V0, V0, AT); in kvm_mips_build_exit()
772 uasm_i_lui(&p, AT, ST0_CU0 >> 16); in kvm_mips_build_exit()
773 uasm_i_or(&p, V0, V0, AT); in kvm_mips_build_exit()
775 uasm_i_ori(&p, V0, V0, ST0_SX | ST0_UX); in kvm_mips_build_exit()
777 uasm_i_mtc0(&p, V0, C0_STATUS); in kvm_mips_build_exit()
778 uasm_i_ehb(&p); in kvm_mips_build_exit()
781 UASM_i_LW(&p, GP, offsetof(struct kvm_vcpu_arch, host_gp), K1); in kvm_mips_build_exit()
784 UASM_i_LW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_exit()
787 UASM_i_ADDIU(&p, SP, SP, -(int)sizeof(struct pt_regs)); in kvm_mips_build_exit()
795 kvm_mips_build_restore_scratch(&p, K0, SP); in kvm_mips_build_exit()
798 UASM_i_LA_mostly(&p, K0, (long)&hwrena); in kvm_mips_build_exit()
799 uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0); in kvm_mips_build_exit()
800 uasm_i_mtc0(&p, K0, C0_HWRENA); in kvm_mips_build_exit()
808 uasm_i_move(&p, A0, S0); in kvm_mips_build_exit()
809 UASM_i_LA(&p, T9, (unsigned long)kvm_mips_handle_exit); in kvm_mips_build_exit()
810 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_exit()
811 UASM_i_ADDIU(&p, SP, SP, -CALLFRAME_SIZ); in kvm_mips_build_exit()
815 p = kvm_mips_build_ret_from_exit(p); in kvm_mips_build_exit()
817 return p; in kvm_mips_build_exit()
831 u32 *p = addr; in kvm_mips_build_ret_from_exit() local
841 uasm_i_di(&p, ZERO); in kvm_mips_build_ret_from_exit()
842 uasm_i_ehb(&p); in kvm_mips_build_ret_from_exit()
850 uasm_i_move(&p, K1, S0); in kvm_mips_build_ret_from_exit()
851 UASM_i_ADDIU(&p, K1, K1, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_ret_from_exit()
857 uasm_i_andi(&p, T0, V0, RESUME_HOST); in kvm_mips_build_ret_from_exit()
858 uasm_il_bnez(&p, &r, T0, label_return_to_host); in kvm_mips_build_ret_from_exit()
859 uasm_i_nop(&p); in kvm_mips_build_ret_from_exit()
861 p = kvm_mips_build_ret_to_guest(p); in kvm_mips_build_ret_from_exit()
863 uasm_l_return_to_host(&l, p); in kvm_mips_build_ret_from_exit()
864 p = kvm_mips_build_ret_to_host(p); in kvm_mips_build_ret_from_exit()
868 return p; in kvm_mips_build_ret_from_exit()
882 u32 *p = addr; in kvm_mips_build_ret_to_guest() local
885 UASM_i_MTC0(&p, S0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_ret_to_guest()
888 UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1); in kvm_mips_build_ret_to_guest()
891 uasm_i_mfc0(&p, V1, C0_STATUS); in kvm_mips_build_ret_to_guest()
892 uasm_i_lui(&p, AT, ST0_BEV >> 16); in kvm_mips_build_ret_to_guest()
893 uasm_i_or(&p, K0, V1, AT); in kvm_mips_build_ret_to_guest()
894 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_ret_to_guest()
895 uasm_i_ehb(&p); in kvm_mips_build_ret_to_guest()
896 build_set_exc_base(&p, T0); in kvm_mips_build_ret_to_guest()
899 uasm_i_ori(&p, V1, V1, ST0_EXL | KSU_USER | ST0_IE); in kvm_mips_build_ret_to_guest()
900 UASM_i_LA(&p, AT, ~(ST0_CU0 | ST0_MX | ST0_SX | ST0_UX)); in kvm_mips_build_ret_to_guest()
901 uasm_i_and(&p, V1, V1, AT); in kvm_mips_build_ret_to_guest()
902 uasm_i_mtc0(&p, V1, C0_STATUS); in kvm_mips_build_ret_to_guest()
903 uasm_i_ehb(&p); in kvm_mips_build_ret_to_guest()
905 p = kvm_mips_build_enter_guest(p); in kvm_mips_build_ret_to_guest()
907 return p; in kvm_mips_build_ret_to_guest()
922 u32 *p = addr; in kvm_mips_build_ret_to_host() local
926 UASM_i_LW(&p, K1, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_ret_to_host()
927 UASM_i_ADDIU(&p, K1, K1, -(int)sizeof(struct pt_regs)); in kvm_mips_build_ret_to_host()
933 uasm_i_sra(&p, K0, V0, 2); in kvm_mips_build_ret_to_host()
934 uasm_i_move(&p, V0, K0); in kvm_mips_build_ret_to_host()
940 UASM_i_LW(&p, i, offsetof(struct pt_regs, regs[i]), K1); in kvm_mips_build_ret_to_host()
944 UASM_i_LA_mostly(&p, K0, (long)&hwrena); in kvm_mips_build_ret_to_host()
945 uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0); in kvm_mips_build_ret_to_host()
946 uasm_i_mtc0(&p, K0, C0_HWRENA); in kvm_mips_build_ret_to_host()
949 UASM_i_LW(&p, RA, offsetof(struct pt_regs, regs[RA]), K1); in kvm_mips_build_ret_to_host()
950 uasm_i_jr(&p, RA); in kvm_mips_build_ret_to_host()
951 uasm_i_nop(&p); in kvm_mips_build_ret_to_host()
953 return p; in kvm_mips_build_ret_to_host()