Lines Matching full:form
138 /* The BA field in an XL form instruction. */
140 /* The BI field in a B form or XL form instruction. */
145 /* The BA field in an XL form instruction when it must be the same
150 /* The BB field in an XL form instruction. */
155 /* The BB field in an XL form instruction when it must be the same
158 /* The VB field in a VX form instruction when it must be the same
163 /* The BD field in a B form instruction. The lower two bits are
168 /* The BD field in a B form instruction when absolute addressing is
173 /* The BD field in a B form instruction when the - modifier is used.
179 /* The BD field in a B form instruction when the - modifier is used
185 /* The BD field in a B form instruction when the + modifier is used.
191 /* The BD field in a B form instruction when the + modifier is used
197 /* The BF field in an X or XL form instruction. */
199 /* The CRFD field in an X form instruction. */
201 /* The CRD field in an XL form instruction. */
205 /* The BF field in an X or XL form instruction. */
214 /* The BFA field in an X or XL form instruction. */
218 /* The BO field in a B form instruction. Certain values are
224 /* The BO field in a B form instruction when the + or - modifier is
229 /* The RM field in an X form instruction. */
236 /* The BT field in an X or XL form instruction. */
240 /* The BI16 field in a BD8 form instruction. */
244 /* The BI32 field in a BD15 form instruction. */
248 /* The BO32 field in a BD15 form instruction. */
252 /* The B8 field in a BD8 form instruction. */
256 /* The B15 field in a BD15 form instruction. The lowest bit is
261 /* The B24 field in a BD24 form instruction. The lowest bit is
266 /* The condition register number portion of the BI field in a B form
267 or XL form instruction. This is used for the extended
273 /* The CRB field in an X form instruction. */
275 /* The MB field in an M form instruction. */
280 /* The CRD32 field in an XL form instruction. */
284 /* The CRFS field in an X form instruction. */
291 /* The CT field in an X form instruction. */
297 /* The D field in a D form instruction. This is a displacement off
303 /* The D8 field in a D form instruction. This is a displacement off
309 /* The DCMX field in an X form instruction. */
313 /* The split DCMX field in an X form instruction. */
317 /* The DQ field in a DQ form instruction. This is like D, but the
323 /* The DS field in a DS form instruction. This is like D, but the
329 /* The DUIS or BHRBE fields in a XFX form instruction, 10 bits
335 /* The split D field in a DX form instruction. */
340 /* The split ND field in a DX form instruction.
348 /* And the ST field in a VX form instruction. */
354 /* The FL1 field in a POWER SC form instruction. */
356 /* The U field in an X form instruction. */
360 /* The FL2 field in a POWER SC form instruction. */
364 /* The FLM field in an XFL form instruction. */
368 /* The FRA field in an X or A form instruction. */
377 /* The FRB field in an X or A form instruction. */
386 /* The FRC field in an A form instruction. */
391 /* The FRS field in an X form instruction or the FRT field in a D, X
392 or A form instruction. */
418 /* The L field in a D or X form instruction. */
424 /* The R field in a HTM X form instruction. */
436 /* The LEV field in a POWER SVC form instruction. */
440 /* The LEV field in an SC form instruction. */
444 /* The LI field in an I form instruction. The lower two bits are
449 /* The LI field in an I form instruction when used as an absolute
454 /* The LS or WC field in an X (sync or wait) form instruction. */
459 /* The ME field in an M form instruction. */
464 /* The MB and ME fields in an M form instruction expressed a single
466 is a two operand form using PPC_OPERAND_NEXT. See the
472 /* The MB or ME field in an MD or MDS form instruction. The high
479 /* The NB field in an X form instruction. The value 32 is stored as
489 /* The NSI field in a D form instruction. This is the same as the
495 /* The NSI field in a D form instruction when we accept a wide range
501 /* The RA field in an D, DS, DQ, X, XO, M, or MDS form instruction. */
510 /* The RA field in the DQ form lq or an lswx instruction, which have special
516 /* The RA field in a D or X form instruction which is an updating
527 /* The RA field in a D or X form instruction which is an updating
538 /* The RB field in an X, XO, M, or MDS form instruction. */
543 /* The RB field in an X form instruction when it must be the same as
562 /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form
563 instruction or the RT field in a D, DS, X, XFX or XO form
571 /* The RS and RT fields of the DS form stq and DQ form lq instructions,
582 /* The RX field of the SE_RR form instruction. */
586 /* The ARX field of the SE_RR form instruction. */
590 /* The RY field of the SE_RR form instruction. */
595 /* The ARY field of the SE_RR form instruction. */
599 /* The SCLSCI8 field in a D form instruction. */
603 /* The SCLSCI8N field in a D form instruction. This is the same as the
609 /* The SD field of the SD4 form instruction. */
613 /* The SD field of the SD4 form instruction, for halfword. */
617 /* The SD field of the SD4 form instruction, for word. */
621 /* The SH field in an X or M form instruction. */
624 /* The other UIMM field in a EVX form instruction. */
626 /* The FC field in an atomic X form instruction. */
630 /* The SI field in a HTM X form instruction. */
634 /* The SH field in an MD form instruction. This is split. */
643 /* The SI field in a D form instruction. */
647 /* The SI field in a D form instruction when we accept a wide range
652 /* The SI8 field in a D form instruction. */
656 /* The SPR field in an XFX form instruction. This is flipped--the
664 /* The BAT index number in an XFX form m[ft]ibat[lu] instruction. */
669 /* The SPRG register number in an XFX form m[ft]sprg instruction. */
673 /* The SR field in an X form instruction. */
675 /* The 4-bit UIMM field in a VX form instruction. */
679 /* The STRM field in an X AltiVec form instruction. */
681 /* The T field in a tlbilx form instruction. */
687 /* The ESYNC field in an X (sync) form instruction. */
691 /* The SV field in a POWER SC form instruction. */
695 /* The TBR field in an XFX form instruction. This is like the SPR
703 /* The TO field in a D or X form instruction. */
709 /* The UI field in a D form instruction. */
728 /* The VA field in a VA, VX or VXR form instruction. */
732 /* The VB field in a VA, VX or VXR form instruction. */
736 /* The VC field in a VA form instruction. */
740 /* The VD or VS field in a VA, VX, VXR or X form instruction. */
745 /* The SIMM field in a VX form instruction, and TE in Z form. */
750 /* The UIMM field in a VX form instruction. */
755 /* The 3-bit UIMM field in a VX form instruction. */
759 /* The 6-bit UIM field in a X form instruction. */
763 /* The SIX field in a VX form instruction. */
767 /* The PS field in a VX form instruction. */
771 /* The SHB field in a VA form instruction. */
775 /* The other UIMM field in a half word EVX form instruction. */
779 /* The other UIMM field in a word EVX form instruction. */
783 /* The other UIMM field in a double EVX form instruction. */
787 /* The WS or DRM field in an X form instruction. */
795 /* The BO16 field in a BD8 form instruction. */
811 /* The L field in an mtmsrd or A form instruction or R or W in an X form. */
817 /* The RMC or CY field in a Z23 form instruction. */
837 /* The S field in a XL form instruction. */
845 /* The DCM and DGM fields in a Z form instruction. */
854 /* The L field in an mtfsf or XFL form instruction. */
855 /* The A field in a HTM X form instruction. */
883 /* The VLESIMM field in a D form instruction. */
888 /* The VLENSIMM field in a D form instruction. */
893 /* The VLEUIMM field in a D form instruction. */
897 /* The VLEUIMML field in a D form instruction. */
901 /* The XT and XS fields in an XX1 or XX3 form instruction. This is split. */
906 /* The XT and XS fields in an DQ form VSX instruction. This is split. */
911 /* The XA field in an XX3 form instruction. This is split. */
915 /* The XB field in an XX2 or XX3 form instruction. This is split. */
919 /* The XB field in an XX3 form instruction when it must be the same as
925 /* The XC field in an XX4 form instruction. This is split. */
929 /* The DM or SHW field in an XX3 form instruction. */
934 /* The DM field in an extended mnemonic XX3 form instruction. */
938 /* The UIM field in an XX2 form instruction. */
940 /* The 2-bit UIMM field in a VX form instruction. */
952 /* The 8-bit IMM8 field in a XX1 form instruction. */
1068 /* The BA field in an XL form instruction when it must be the same as
1093 /* The BB field in an XL form instruction when it must be the same as
1118 /* The BD field in a B form instruction when the - modifier is used.
1124 we just want to print the normal form of the instruction.
1178 /* The BD field in a B form instruction when the + modifier is used.
1289 /* The BO field in a B form instruction. Warn about attempts to set
1318 /* The BO field in a B form instruction when the + or - modifier is
1351 /* The DCMX field in a X form instruction when the field is split
1371 /* The D field in a DX form instruction when the field is split
1428 /* If only one bit of the FXM field is set, we can use the new form in insert_fxm()
1431 new form unless -mpower4 has been given, or -many and the two in insert_fxm()
1432 operand form of mfcr was used. */ in insert_fxm()
1443 /* A value of -1 means we used the one operand form of in insert_fxm()
1468 /* Check that non-power4 form of mfcr has a zero MASK. */ in extract_fxm()
1555 /* The MB and ME fields in an M form instruction expressed as a single
1643 /* The MB or ME field in an MD or MDS form instruction. The high bit
1663 /* The NB field in an X form instruction. The value 32 is stored as
1699 /* The NSI field in a D form instruction. This is the same as the SI
1722 /* The RA field in a D or X form instruction which is an updating
1752 /* The RA field in the DQ form lq or an lswx instruction, which have special
1768 /* The RA field in a D or X form instruction which is an updating
1783 /* The RB field in an X form instruction when it must be the same as
1959 /* The SH field in an MD form instruction. This is split. */
1986 /* The SPR field in an XFX form instruction. This is flipped--the
2071 /* The XT and XS fields in an XX1 or XX3 form instruction. This is split. */
2090 /* The XT and XS fields in an DQ form VSX instruction. This is split. */
2108 /* The XA field in an XX3 form instruction. This is split. */
2127 /* The XB field in an XX3 form instruction. This is split. */
2146 /* The XB field in an XX3 form instruction when it must be the same as
2172 /* The XC field in an XX4 form instruction. This is split. */
2215 /* The VLESIMM field in an I16A form instruction. This is split. */
2257 /* The VLEUIMM field in an I16A form instruction. This is split. */
2276 /* The VLEUIMML field in an I16L form instruction. This is split. */
2296 /* Macros used to form opcodes. */
2303 form instruction. Used for extended mnemonics for the trap
2309 of a D form or X form instruction. Used for extended mnemonics for
2314 /* The main opcode combined with an update code in D form instruction.
2320 D form instruction. Used for VLE volatile context save/restore
2325 /* An A form instruction. */
2341 /* A B form instruction. */
2345 /* A BD8 form instruction. This is a 16-bit instruction. */
2349 /* Another BD8 form instruction. This is a 16-bit instruction. */
2353 /* A BD8 form instruction for simplified mnemonics. */
2362 /* A BD15 form instruction. */
2366 /* A BD15 form instruction for extended conditional branch mnemonics. */
2370 /* A BD15 form instruction for extended conditional branch mnemonics with BI. */
2378 /* A BD24 form instruction. */
2382 /* A B form instruction setting the BO field. */
2395 /* A B form instruction setting the BO field and the condition bits of
2410 /* A VLE C form instruction. */
2416 /* An Context form instruction. */
2420 /* A User Context form instruction. */
2427 /* A DQ form VSX instruction. */
2431 /* A DS form instruction. */
2435 /* An DX form instruction. */
2439 /* An EVSEL form instruction. */
2443 /* An IA16 form instruction. */
2447 /* An I16A form instruction. */
2451 /* An I16L form instruction. */
2455 /* An IM7 form instruction. */
2459 /* An M form instruction. */
2463 /* An LI20 form instruction. */
2467 /* An M form instruction with the ME field specified. */
2476 /* An MD form instruction. */
2486 /* An MDS form instruction. */
2493 /* An SC form instruction. */
2497 /* An SCI8 form instruction. */
2501 /* An SCI8 form instruction. */
2505 /* An SD4 form instruction. This is a 16-bit instruction. */
2509 /* An SE_IM5 form instruction. This is a 16-bit instruction. */
2513 /* An SE_R form instruction. This is a 16-bit instruction. */
2517 /* An SE_RR form instruction. This is a 16-bit instruction. */
2521 /* A VX form instruction. */
2524 /* The mask for an VX form instruction. */
2554 /* A VA form instruction. */
2557 /* The mask for an VA form instruction. */
2563 /* A VXR form instruction. */
2566 /* The mask for a VXR form instruction. */
2569 /* A VX form instruction with a VA tertiary opcode. */
2575 /* An X form instruction. */
2578 /* A X form instruction for Quad-Precision FP Instructions. */
2581 /* An EX form instruction. */
2584 /* The mask for an EX form instruction. */
2587 /* An XX2 form instruction. */
2590 /* A XX2 form instruction with the VA bits specified. */
2593 /* An XX3 form instruction. */
2596 /* An XX3 form instruction with the RC bit specified. */
2599 /* An XX4 form instruction. */
2602 /* A Z form instruction. */
2605 /* An X form instruction with the RC bit specified. */
2608 /* A X form instruction for Quad-Precision FP Instructions with RC bit. */
2611 /* An X form instruction with the RA bits specified as two ops. */
2614 /* A Z form instruction with the RC bit specified. */
2617 /* The mask for an X form instruction. */
2620 /* The mask for an X form instruction with the BF bits specified. */
2623 /* An X form wait instruction with everything filled in except the WC field. */
2626 /* The mask for an XX1 form instruction. */
2632 /* The mask for an XX2 form instruction. */
2635 /* The mask for an XX2 form instruction with the UIM bits specified. */
2638 /* The mask for an XX2 form instruction with the 4 UIM bits specified. */
2641 /* The mask for an XX2 form instruction with the BF bits specified. */
2644 /* The mask for an XX2 form instruction with the BF and DCMX bits specified. */
2647 /* The mask for an XX2 form instruction with a split DCMX bits specified. */
2650 /* The mask for an XX3 form instruction. */
2653 /* The mask for an XX3 form instruction with the BF bits specified. */
2656 /* The mask for an XX3 form instruction with the DM or SHW bits specified. */
2660 /* The mask for an XX4 form instruction. */
2663 /* An X form wait instruction with everything filled in except the WC field. */
2666 /* The mask for an XMMF form instruction. */
2669 /* The mask for a Z form instruction. */
2723 /* An X form instruction with the L bit specified. */
2726 /* An X form instruction with the L bits specified. */
2729 /* An X form instruction with the L bit and RC bit specified. */
2732 /* An X form instruction with RT fields specified */
2736 /* An X form instruction with RT and RA fields specified */
2741 /* The mask for an X form comparison instruction. */
2744 /* The mask for an X form comparison instruction with the L field
2748 /* An X form trap instruction with the TO field specified. */
2752 /* An X form tlb instruction with the SH field specified. */
2756 /* An X form sync instruction. */
2759 /* An X form sync instruction with everything filled in except the LS field. */
2762 /* An X form sync instruction with everything filled in except the L and E fields. */
2768 /* An X form AltiVec dss instruction. */
2772 /* An XFL form instruction. */
2776 /* An X form isel instruction. */
2780 /* An XL form instruction with the LK field set to 0. */
2783 /* An XL form instruction which uses the LK field. */
2786 /* The mask for an XL form instruction. */
2792 /* An XL form instruction which explicitly sets the BO field. */
2797 /* An XL form instruction which explicitly sets the y bit of the BO
2802 /* An XL form instruction which sets the BO field and the condition
2822 /* An X form mbar instruction with MO field. */
2825 /* An XO form instruction. */
2833 /* An XOPS form instruction for paired singles. */
2839 /* An XS form instruction. */
2843 /* A mask for the FXM version of an XFX form instruction. */
2846 /* An XFX form instruction with the FXM field filled in. */
2851 /* An XFX form instruction with the SPR field filled in. */
2856 /* An XFX form instruction with the SPR field filled in except for the
2860 /* An XFX form instruction with the SPR field filled in except for the
2864 /* An X form instruction with everything filled in except the E field. */
2867 /* An X form user context instruction. */
2871 /* An XW form instruction. */
2873 /* The mask for a G form instruction. rc not supported at present. */
2876 /* An APU form instruction. */
2879 /* The mask for an APU form instruction. */
7215 /* The expressions of the form (-x ! 31) & (x | 31) have the value 0