72 	u32 mult, mfn, mfd;  in clk_pllv4_recalc_rate()  local
75 	mult = readl_relaxed(pll->base + PLL_CFG_OFFSET);  in clk_pllv4_recalc_rate()
76 	mult &= BM_PLL_MULT;  in clk_pllv4_recalc_rate()
77 	mult >>= BP_PLL_MULT;  in clk_pllv4_recalc_rate()
85 	return (parent_rate * mult) + (u32)temp64;  in clk_pllv4_recalc_rate()
135 static bool clk_pllv4_is_valid_mult(unsigned int mult)  in clk_pllv4_is_valid_mult()  argument
141 		if (pllv4_mult_table[i] == mult)  in clk_pllv4_is_valid_mult()
152 	u32 val, mult, mfn, mfd = DEFAULT_MFD;  in clk_pllv4_set_rate()  local
155 	mult = rate / parent_rate;  in clk_pllv4_set_rate()
157 	if (!clk_pllv4_is_valid_mult(mult))  in clk_pllv4_set_rate()
163 	temp64 = (u64)(rate - mult * parent_rate);  in clk_pllv4_set_rate()
170 	val |= mult << BP_PLL_MULT;  in clk_pllv4_set_rate()