Lines Matching refs:DFLAGS
236 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
282 RK2928_CLKSEL_CON(0), 6, 2, DFLAGS | CLK_DIVIDER_READ_ONLY,
286 RK2928_CLKSEL_CON(32), 7, 1, MFLAGS, 0, 5, DFLAGS,
291 RK2928_CLKSEL_CON(32), 15, 1, MFLAGS, 8, 5, DFLAGS,
299 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
313 RK2928_CLKSEL_CON(31), 7, 1, MFLAGS, 0, 5, DFLAGS,
316 RK2928_CLKSEL_CON(31), 15, 1, MFLAGS, 8, 5, DFLAGS,
322 RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
325 RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
331 RK2928_CLKSEL_CON(29), 1, 5, DFLAGS,
353 RK2928_CLKSEL_CON(21), 0, 1, MFLAGS, 8, 5, DFLAGS,
361 RK2928_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
371 RK2928_CLKSEL_CON(24), 8, 8, DFLAGS,
375 RK2928_CLKSEL_CON(5), 0, 7, DFLAGS,
390 RK2928_CLKSEL_CON(25), 0, 7, DFLAGS,
393 RK2928_CLKSEL_CON(25), 8, 7, DFLAGS,
397 RK2928_CLKSEL_CON(11), 0, 6, DFLAGS,
400 RK2928_CLKSEL_CON(12), 0, 6, DFLAGS,
403 RK2928_CLKSEL_CON(12), 8, 6, DFLAGS,
409 RK2928_CLKSEL_CON(13), 0, 7, DFLAGS,
416 RK2928_CLKSEL_CON(14), 0, 7, DFLAGS,
423 RK2928_CLKSEL_CON(15), 0, 7, DFLAGS,
430 RK2928_CLKSEL_CON(16), 0, 7, DFLAGS,
559 RK2928_CLKSEL_CON(1), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY, div_aclk_cpu_t),
561 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
564 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
567 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
575 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
579 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
584 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
590 RK2928_CLKSEL_CON(29), 8, 5, DFLAGS,
601 RK2928_CLKSEL_CON(33), 8, 1, MFLAGS, 0, 5, DFLAGS,
610 RK2928_CLKSEL_CON(34), 0, 16, DFLAGS,
616 RK2928_CLKSEL_CON(2), 0, 7, DFLAGS,
623 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,
630 RK2928_CLKSEL_CON(4), 0, 7, DFLAGS,
675 RK2928_CLKSEL_CON(1), 3, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
680 RK2928_CLKSEL_CON(0), 5, 1, MFLAGS, 0, 5, DFLAGS),
682 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
684 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
686 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
693 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
697 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
700 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
704 RK2928_CLKSEL_CON(34), 7, 1, MFLAGS, 0, 5, DFLAGS,
716 RK2928_CLKSEL_CON(30), 0, 2, DFLAGS,
719 RK2928_CLKSEL_CON(11), 8, 6, DFLAGS),
724 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,