Lines Matching full:mux_reg
88 static void wait_until_mux_stable(void __iomem *mux_reg, u32 mux_pos, in wait_until_mux_stable() argument
94 if (((readl(mux_reg) >> mux_pos) & MUX_MASK) == mux_value) in wait_until_mux_stable()
98 if (((readl(mux_reg) >> mux_pos) & MUX_MASK) == mux_value) in wait_until_mux_stable()
155 unsigned long div0, div1 = 0, mux_reg; in exynos_cpuclk_pre_rate_change() local
207 mux_reg = readl(base + E4210_SRC_CPU); in exynos_cpuclk_pre_rate_change()
208 writel(mux_reg | (1 << 16), base + E4210_SRC_CPU); in exynos_cpuclk_pre_rate_change()
231 unsigned long mux_reg; in exynos_cpuclk_post_rate_change() local
246 mux_reg = readl(base + E4210_SRC_CPU); in exynos_cpuclk_post_rate_change()
247 writel(mux_reg & ~(1 << 16), base + E4210_SRC_CPU); in exynos_cpuclk_post_rate_change()
283 unsigned long div0, div1 = 0, mux_reg; in exynos5433_cpuclk_pre_rate_change() local
321 mux_reg = readl(base + E5433_MUX_SEL2); in exynos5433_cpuclk_pre_rate_change()
322 writel(mux_reg | 1, base + E5433_MUX_SEL2); in exynos5433_cpuclk_pre_rate_change()
341 unsigned long mux_reg; in exynos5433_cpuclk_post_rate_change() local
347 mux_reg = readl(base + E5433_MUX_SEL2); in exynos5433_cpuclk_post_rate_change()
348 writel(mux_reg & ~1, base + E5433_MUX_SEL2); in exynos5433_cpuclk_post_rate_change()