Lines Matching refs:ch
188 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_terminate_all() local
193 dev_dbg(chan2dev(chan), "%s: ch=%p\n", __func__, ch); in moxart_terminate_all()
195 spin_lock_irqsave(&ch->vc.lock, flags); in moxart_terminate_all()
197 if (ch->desc) { in moxart_terminate_all()
198 moxart_dma_desc_free(&ch->desc->vd); in moxart_terminate_all()
199 ch->desc = NULL; in moxart_terminate_all()
202 ctrl = readl(ch->base + REG_OFF_CTRL); in moxart_terminate_all()
204 writel(ctrl, ch->base + REG_OFF_CTRL); in moxart_terminate_all()
206 vchan_get_all_descriptors(&ch->vc, &head); in moxart_terminate_all()
207 spin_unlock_irqrestore(&ch->vc.lock, flags); in moxart_terminate_all()
208 vchan_dma_desc_free_list(&ch->vc, &head); in moxart_terminate_all()
216 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_slave_config() local
219 ch->cfg = *cfg; in moxart_slave_config()
221 ctrl = readl(ch->base + REG_OFF_CTRL); in moxart_slave_config()
226 switch (ch->cfg.src_addr_width) { in moxart_slave_config()
229 if (ch->cfg.direction != DMA_MEM_TO_DEV) in moxart_slave_config()
236 if (ch->cfg.direction != DMA_MEM_TO_DEV) in moxart_slave_config()
243 if (ch->cfg.direction != DMA_MEM_TO_DEV) in moxart_slave_config()
252 if (ch->cfg.direction == DMA_MEM_TO_DEV) { in moxart_slave_config()
255 ctrl |= (ch->line_reqno << 16 & in moxart_slave_config()
260 ctrl |= (ch->line_reqno << 24 & in moxart_slave_config()
264 writel(ctrl, ch->base + REG_OFF_CTRL); in moxart_slave_config()
274 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_prep_slave_sg() local
289 dev_addr = ch->cfg.src_addr; in moxart_prep_slave_sg()
290 dev_width = ch->cfg.src_addr_width; in moxart_prep_slave_sg()
292 dev_addr = ch->cfg.dst_addr; in moxart_prep_slave_sg()
293 dev_width = ch->cfg.dst_addr_width; in moxart_prep_slave_sg()
327 ch->error = 0; in moxart_prep_slave_sg()
329 return vchan_tx_prep(&ch->vc, &d->vd, tx_flags); in moxart_prep_slave_sg()
337 struct moxart_chan *ch; in moxart_of_xlate() local
343 ch = to_moxart_dma_chan(chan); in moxart_of_xlate()
344 ch->line_reqno = dma_spec->args[0]; in moxart_of_xlate()
351 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_alloc_chan_resources() local
354 __func__, ch->ch_num); in moxart_alloc_chan_resources()
355 ch->allocated = 1; in moxart_alloc_chan_resources()
362 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_free_chan_resources() local
364 vchan_free_chan_resources(&ch->vc); in moxart_free_chan_resources()
367 __func__, ch->ch_num); in moxart_free_chan_resources()
368 ch->allocated = 0; in moxart_free_chan_resources()
371 static void moxart_dma_set_params(struct moxart_chan *ch, dma_addr_t src_addr, in moxart_dma_set_params() argument
374 writel(src_addr, ch->base + REG_OFF_ADDRESS_SOURCE); in moxart_dma_set_params()
375 writel(dst_addr, ch->base + REG_OFF_ADDRESS_DEST); in moxart_dma_set_params()
378 static void moxart_set_transfer_params(struct moxart_chan *ch, unsigned int len) in moxart_set_transfer_params() argument
380 struct moxart_desc *d = ch->desc; in moxart_set_transfer_params()
389 writel(d->dma_cycles, ch->base + REG_OFF_CYCLES); in moxart_set_transfer_params()
391 dev_dbg(chan2dev(&ch->vc.chan), "%s: set %u DMA cycles (len=%u)\n", in moxart_set_transfer_params()
395 static void moxart_start_dma(struct moxart_chan *ch) in moxart_start_dma() argument
399 ctrl = readl(ch->base + REG_OFF_CTRL); in moxart_start_dma()
401 writel(ctrl, ch->base + REG_OFF_CTRL); in moxart_start_dma()
404 static void moxart_dma_start_sg(struct moxart_chan *ch, unsigned int idx) in moxart_dma_start_sg() argument
406 struct moxart_desc *d = ch->desc; in moxart_dma_start_sg()
407 struct moxart_sg *sg = ch->desc->sg + idx; in moxart_dma_start_sg()
409 if (ch->desc->dma_dir == DMA_MEM_TO_DEV) in moxart_dma_start_sg()
410 moxart_dma_set_params(ch, sg->addr, d->dev_addr); in moxart_dma_start_sg()
411 else if (ch->desc->dma_dir == DMA_DEV_TO_MEM) in moxart_dma_start_sg()
412 moxart_dma_set_params(ch, d->dev_addr, sg->addr); in moxart_dma_start_sg()
414 moxart_set_transfer_params(ch, sg->len); in moxart_dma_start_sg()
416 moxart_start_dma(ch); in moxart_dma_start_sg()
421 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_dma_start_desc() local
424 vd = vchan_next_desc(&ch->vc); in moxart_dma_start_desc()
427 ch->desc = NULL; in moxart_dma_start_desc()
433 ch->desc = to_moxart_dma_desc(&vd->tx); in moxart_dma_start_desc()
434 ch->sgidx = 0; in moxart_dma_start_desc()
436 moxart_dma_start_sg(ch, 0); in moxart_dma_start_desc()
441 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_issue_pending() local
444 spin_lock_irqsave(&ch->vc.lock, flags); in moxart_issue_pending()
445 if (vchan_issue_pending(&ch->vc) && !ch->desc) in moxart_issue_pending()
447 spin_unlock_irqrestore(&ch->vc.lock, flags); in moxart_issue_pending()
462 static size_t moxart_dma_desc_size_in_flight(struct moxart_chan *ch) in moxart_dma_desc_size_in_flight() argument
467 size = moxart_dma_desc_size(ch->desc, ch->sgidx); in moxart_dma_desc_size_in_flight()
468 cycles = readl(ch->base + REG_OFF_CYCLES); in moxart_dma_desc_size_in_flight()
469 completed_cycles = (ch->desc->dma_cycles - cycles); in moxart_dma_desc_size_in_flight()
470 size -= completed_cycles << es_bytes[ch->desc->es]; in moxart_dma_desc_size_in_flight()
472 dev_dbg(chan2dev(&ch->vc.chan), "%s: size=%zu\n", __func__, size); in moxart_dma_desc_size_in_flight()
481 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_tx_status() local
492 spin_lock_irqsave(&ch->vc.lock, flags); in moxart_tx_status()
493 vd = vchan_find_desc(&ch->vc, cookie); in moxart_tx_status()
497 } else if (ch->desc && ch->desc->vd.tx.cookie == cookie) { in moxart_tx_status()
498 txstate->residue = moxart_dma_desc_size_in_flight(ch); in moxart_tx_status()
500 spin_unlock_irqrestore(&ch->vc.lock, flags); in moxart_tx_status()
502 if (ch->error) in moxart_tx_status()
525 struct moxart_chan *ch = &mc->slave_chans[0]; in moxart_dma_interrupt() local
530 dev_dbg(chan2dev(&ch->vc.chan), "%s\n", __func__); in moxart_dma_interrupt()
532 for (i = 0; i < APB_DMA_MAX_CHANNEL; i++, ch++) { in moxart_dma_interrupt()
533 if (!ch->allocated) in moxart_dma_interrupt()
536 ctrl = readl(ch->base + REG_OFF_CTRL); in moxart_dma_interrupt()
538 dev_dbg(chan2dev(&ch->vc.chan), "%s: ch=%p ch->base=%p ctrl=%x\n", in moxart_dma_interrupt()
539 __func__, ch, ch->base, ctrl); in moxart_dma_interrupt()
543 if (ch->desc) { in moxart_dma_interrupt()
544 spin_lock_irqsave(&ch->vc.lock, flags); in moxart_dma_interrupt()
545 if (++ch->sgidx < ch->desc->sglen) { in moxart_dma_interrupt()
546 moxart_dma_start_sg(ch, ch->sgidx); in moxart_dma_interrupt()
548 vchan_cookie_complete(&ch->desc->vd); in moxart_dma_interrupt()
549 moxart_dma_start_desc(&ch->vc.chan); in moxart_dma_interrupt()
551 spin_unlock_irqrestore(&ch->vc.lock, flags); in moxart_dma_interrupt()
557 ch->error = 1; in moxart_dma_interrupt()
560 writel(ctrl, ch->base + REG_OFF_CTRL); in moxart_dma_interrupt()
574 struct moxart_chan *ch; in moxart_probe() local
598 ch = &mdc->slave_chans[0]; in moxart_probe()
599 for (i = 0; i < APB_DMA_MAX_CHANNEL; i++, ch++) { in moxart_probe()
600 ch->ch_num = i; in moxart_probe()
601 ch->base = dma_base_addr + i * REG_OFF_CHAN_SIZE; in moxart_probe()
602 ch->allocated = 0; in moxart_probe()
604 ch->vc.desc_free = moxart_dma_desc_free; in moxart_probe()
605 vchan_init(&ch->vc, &mdc->dma_slave); in moxart_probe()
608 __func__, i, ch->ch_num, ch->base); in moxart_probe()